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Differential D45475

[x86] Switch EFLAGS copy lowering to use reg-reg form of testing for a zero register.
ClosedPublic

Authored by chandlerc on Apr 9 2018, 11:59 PM.

Details

Reviewers
craig.topper
Commits
rGccd3ecb95a46: [x86] Switch EFLAGS copy lowering to use reg-reg form of testing for a zero…
rL330269: [x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
Summary

Previously I tried this and saw LLVM unable to transform this to fold
with memory operands such as spill slot rematerialization. However, it
clearly works as shown in this patch. We turn these into `cmpb $0,
<mem>` when useful for folding a memory operand without issue. This form
has no disadvantage compared te testb $-1, <mem>. So overall, this is
likely no worse and may be slightly smaller in some cases due to the
testb %reg, %reg form.

Diff Detail

Repository
rL LLVM

Event Timeline

chandlerc created this revision.Apr 9 2018, 11:59 PM
Herald added subscribers: hiraditya, mcrosier, sanjoy. · View Herald TranscriptApr 9 2018, 11:59 PM
craig.topper accepted this revision.Apr 11 2018, 10:43 AM

LGTM

This revision is now accepted and ready to land.Apr 11 2018, 10:43 AM
Closed by commit rL330269: [x86] Switch EFLAGS copy lowering to use reg-reg form of testing for (authored by chandlerc). · Explain WhyApr 18 2018, 8:56 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
X86/
2 lines
test/
CodeGen/
X86/
12 lines
16 lines
20 lines
10 lines
2 lines
2 lines

Diff 142949

llvm/trunk/lib/Target/X86/X86FlagsCopyLowering.cpp

Show First 20 Lines • Show All 630 Lines • ▼ Show 20 Linesvoid X86FlagsCopyLoweringPass::insertTest(MachineBasicBlock &MBB,
MachineBasicBlock::iterator Pos, MachineBasicBlock::iterator Pos,
DebugLoc Loc, unsigned Reg) { DebugLoc Loc, unsigned Reg) {
// We emit test instructions as register/immediate test against -1. This // We emit test instructions as register/immediate test against -1. This
// allows register allocation to fold a memory operand if needed (that will // allows register allocation to fold a memory operand if needed (that will
// happen often due to the places this code is emitted). But hopefully will // happen often due to the places this code is emitted). But hopefully will
// also allow us to select a shorter encoding of `testb %reg, %reg` when that // also allow us to select a shorter encoding of `testb %reg, %reg` when that
// would be equivalent. // would be equivalent.
auto TestI = auto TestI =
BuildMI(MBB, Pos, Loc, TII->get(X86::TEST8ri)).addReg(Reg).addImm(-1); BuildMI(MBB, Pos, Loc, TII->get(X86::TEST8rr)).addReg(Reg).addReg(Reg);
(void)TestI; (void)TestI;
DEBUG(dbgs() << " test cond: "; TestI->dump()); DEBUG(dbgs() << " test cond: "; TestI->dump());
++NumTestsInserted; ++NumTestsInserted;
} }
void X86FlagsCopyLoweringPass::rewriteArithmetic( void X86FlagsCopyLoweringPass::rewriteArithmetic(
MachineBasicBlock &TestMBB, MachineBasicBlock::iterator TestPos, MachineBasicBlock &TestMBB, MachineBasicBlock::iterator TestPos,
DebugLoc TestLoc, MachineInstr &MI, MachineOperand &FlagUse, DebugLoc TestLoc, MachineInstr &MI, MachineOperand &FlagUse,
▲ Show 20 Lines • Show All 149 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/cmpxchg-clobber-flags.ll

Show All 35 Lines
; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %esi ; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %esi
; 32-GOOD-RA-NEXT: lock cmpxchg8b (%esi) ; 32-GOOD-RA-NEXT: lock cmpxchg8b (%esi)
; 32-GOOD-RA-NEXT: setne %bl ; 32-GOOD-RA-NEXT: setne %bl
; 32-GOOD-RA-NEXT: subl $8, %esp ; 32-GOOD-RA-NEXT: subl $8, %esp
; 32-GOOD-RA-NEXT: pushl %edx ; 32-GOOD-RA-NEXT: pushl %edx
; 32-GOOD-RA-NEXT: pushl %eax ; 32-GOOD-RA-NEXT: pushl %eax
; 32-GOOD-RA-NEXT: calll bar ; 32-GOOD-RA-NEXT: calll bar
; 32-GOOD-RA-NEXT: addl $16, %esp ; 32-GOOD-RA-NEXT: addl $16, %esp
; 32-GOOD-RA-NEXT: testb $-1, %bl ; 32-GOOD-RA-NEXT: testb %bl, %bl
; 32-GOOD-RA-NEXT: jne .LBB0_3 ; 32-GOOD-RA-NEXT: jne .LBB0_3
; 32-GOOD-RA-NEXT: # %bb.1: # %t ; 32-GOOD-RA-NEXT: # %bb.1: # %t
; 32-GOOD-RA-NEXT: movl $42, %eax ; 32-GOOD-RA-NEXT: movl $42, %eax
; 32-GOOD-RA-NEXT: jmp .LBB0_2 ; 32-GOOD-RA-NEXT: jmp .LBB0_2
; 32-GOOD-RA-NEXT: .LBB0_3: # %f ; 32-GOOD-RA-NEXT: .LBB0_3: # %f
; 32-GOOD-RA-NEXT: xorl %eax, %eax ; 32-GOOD-RA-NEXT: xorl %eax, %eax
; 32-GOOD-RA-NEXT: .LBB0_2: # %t ; 32-GOOD-RA-NEXT: .LBB0_2: # %t
; 32-GOOD-RA-NEXT: xorl %edx, %edx ; 32-GOOD-RA-NEXT: xorl %edx, %edx
Show All 14 Lines
; 32-FAST-RA-NEXT: movl {{[0-9]+}}(%esp), %edx ; 32-FAST-RA-NEXT: movl {{[0-9]+}}(%esp), %edx
; 32-FAST-RA-NEXT: lock cmpxchg8b (%esi) ; 32-FAST-RA-NEXT: lock cmpxchg8b (%esi)
; 32-FAST-RA-NEXT: setne %bl ; 32-FAST-RA-NEXT: setne %bl
; 32-FAST-RA-NEXT: subl $8, %esp ; 32-FAST-RA-NEXT: subl $8, %esp
; 32-FAST-RA-NEXT: pushl %edx ; 32-FAST-RA-NEXT: pushl %edx
; 32-FAST-RA-NEXT: pushl %eax ; 32-FAST-RA-NEXT: pushl %eax
; 32-FAST-RA-NEXT: calll bar ; 32-FAST-RA-NEXT: calll bar
; 32-FAST-RA-NEXT: addl $16, %esp ; 32-FAST-RA-NEXT: addl $16, %esp
; 32-FAST-RA-NEXT: testb $-1, %bl ; 32-FAST-RA-NEXT: testb %bl, %bl
; 32-FAST-RA-NEXT: jne .LBB0_3 ; 32-FAST-RA-NEXT: jne .LBB0_3
; 32-FAST-RA-NEXT: # %bb.1: # %t ; 32-FAST-RA-NEXT: # %bb.1: # %t
; 32-FAST-RA-NEXT: movl $42, %eax ; 32-FAST-RA-NEXT: movl $42, %eax
; 32-FAST-RA-NEXT: jmp .LBB0_2 ; 32-FAST-RA-NEXT: jmp .LBB0_2
; 32-FAST-RA-NEXT: .LBB0_3: # %f ; 32-FAST-RA-NEXT: .LBB0_3: # %f
; 32-FAST-RA-NEXT: xorl %eax, %eax ; 32-FAST-RA-NEXT: xorl %eax, %eax
; 32-FAST-RA-NEXT: .LBB0_2: # %t ; 32-FAST-RA-NEXT: .LBB0_2: # %t
; 32-FAST-RA-NEXT: xorl %edx, %edx ; 32-FAST-RA-NEXT: xorl %edx, %edx
; 32-FAST-RA-NEXT: addl $4, %esp ; 32-FAST-RA-NEXT: addl $4, %esp
; 32-FAST-RA-NEXT: popl %esi ; 32-FAST-RA-NEXT: popl %esi
; 32-FAST-RA-NEXT: popl %ebx ; 32-FAST-RA-NEXT: popl %ebx
; 32-FAST-RA-NEXT: retl ; 32-FAST-RA-NEXT: retl
; ;
; 64-ALL-LABEL: test_intervening_call: ; 64-ALL-LABEL: test_intervening_call:
; 64-ALL: # %bb.0: # %entry ; 64-ALL: # %bb.0: # %entry
; 64-ALL-NEXT: pushq %rbx ; 64-ALL-NEXT: pushq %rbx
; 64-ALL-NEXT: movq %rsi, %rax ; 64-ALL-NEXT: movq %rsi, %rax
; 64-ALL-NEXT: lock cmpxchgq %rdx, (%rdi) ; 64-ALL-NEXT: lock cmpxchgq %rdx, (%rdi)
; 64-ALL-NEXT: setne %bl ; 64-ALL-NEXT: setne %bl
; 64-ALL-NEXT: movq %rax, %rdi ; 64-ALL-NEXT: movq %rax, %rdi
; 64-ALL-NEXT: callq bar ; 64-ALL-NEXT: callq bar
; 64-ALL-NEXT: testb $-1, %bl ; 64-ALL-NEXT: testb %bl, %bl
; 64-ALL-NEXT: jne .LBB0_2 ; 64-ALL-NEXT: jne .LBB0_2
; 64-ALL-NEXT: # %bb.1: # %t ; 64-ALL-NEXT: # %bb.1: # %t
; 64-ALL-NEXT: movl $42, %eax ; 64-ALL-NEXT: movl $42, %eax
; 64-ALL-NEXT: popq %rbx ; 64-ALL-NEXT: popq %rbx
; 64-ALL-NEXT: retq ; 64-ALL-NEXT: retq
; 64-ALL-NEXT: .LBB0_2: # %f ; 64-ALL-NEXT: .LBB0_2: # %f
; 64-ALL-NEXT: xorl %eax, %eax ; 64-ALL-NEXT: xorl %eax, %eax
; 64-ALL-NEXT: popq %rbx ; 64-ALL-NEXT: popq %rbx
▲ Show 20 Lines • Show All 108 Lines • ▼ Show 20 Lines
; 32-GOOD-RA-NEXT: pushl %esi ; 32-GOOD-RA-NEXT: pushl %esi
; 32-GOOD-RA-NEXT: pushl %eax ; 32-GOOD-RA-NEXT: pushl %eax
; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %eax ; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %esi ; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %esi
; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %ecx ; 32-GOOD-RA-NEXT: movl {{[0-9]+}}(%esp), %ecx
; 32-GOOD-RA-NEXT: lock cmpxchgl %esi, (%ecx) ; 32-GOOD-RA-NEXT: lock cmpxchgl %esi, (%ecx)
; 32-GOOD-RA-NEXT: sete %bl ; 32-GOOD-RA-NEXT: sete %bl
; 32-GOOD-RA-NEXT: calll foo ; 32-GOOD-RA-NEXT: calll foo
; 32-GOOD-RA-NEXT: testb $-1, %bl ; 32-GOOD-RA-NEXT: testb %bl, %bl
; 32-GOOD-RA-NEXT: jne .LBB2_2 ; 32-GOOD-RA-NEXT: jne .LBB2_2
; 32-GOOD-RA-NEXT: # %bb.1: # %entry ; 32-GOOD-RA-NEXT: # %bb.1: # %entry
; 32-GOOD-RA-NEXT: movl %eax, %esi ; 32-GOOD-RA-NEXT: movl %eax, %esi
; 32-GOOD-RA-NEXT: .LBB2_2: # %entry ; 32-GOOD-RA-NEXT: .LBB2_2: # %entry
; 32-GOOD-RA-NEXT: movl %esi, %eax ; 32-GOOD-RA-NEXT: movl %esi, %eax
; 32-GOOD-RA-NEXT: addl $4, %esp ; 32-GOOD-RA-NEXT: addl $4, %esp
; 32-GOOD-RA-NEXT: popl %esi ; 32-GOOD-RA-NEXT: popl %esi
; 32-GOOD-RA-NEXT: popl %ebx ; 32-GOOD-RA-NEXT: popl %ebx
; 32-GOOD-RA-NEXT: retl ; 32-GOOD-RA-NEXT: retl
; ;
; 32-FAST-RA-LABEL: test_feed_cmov: ; 32-FAST-RA-LABEL: test_feed_cmov:
; 32-FAST-RA: # %bb.0: # %entry ; 32-FAST-RA: # %bb.0: # %entry
; 32-FAST-RA-NEXT: pushl %ebx ; 32-FAST-RA-NEXT: pushl %ebx
; 32-FAST-RA-NEXT: pushl %esi ; 32-FAST-RA-NEXT: pushl %esi
; 32-FAST-RA-NEXT: pushl %eax ; 32-FAST-RA-NEXT: pushl %eax
; 32-FAST-RA-NEXT: movl {{[0-9]+}}(%esp), %ecx ; 32-FAST-RA-NEXT: movl {{[0-9]+}}(%esp), %ecx
; 32-FAST-RA-NEXT: movl {{[0-9]+}}(%esp), %esi ; 32-FAST-RA-NEXT: movl {{[0-9]+}}(%esp), %esi
; 32-FAST-RA-NEXT: movl {{[0-9]+}}(%esp), %eax ; 32-FAST-RA-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-FAST-RA-NEXT: lock cmpxchgl %esi, (%ecx) ; 32-FAST-RA-NEXT: lock cmpxchgl %esi, (%ecx)
; 32-FAST-RA-NEXT: sete %bl ; 32-FAST-RA-NEXT: sete %bl
; 32-FAST-RA-NEXT: calll foo ; 32-FAST-RA-NEXT: calll foo
; 32-FAST-RA-NEXT: testb $-1, %bl ; 32-FAST-RA-NEXT: testb %bl, %bl
; 32-FAST-RA-NEXT: jne .LBB2_2 ; 32-FAST-RA-NEXT: jne .LBB2_2
; 32-FAST-RA-NEXT: # %bb.1: # %entry ; 32-FAST-RA-NEXT: # %bb.1: # %entry
; 32-FAST-RA-NEXT: movl %eax, %esi ; 32-FAST-RA-NEXT: movl %eax, %esi
; 32-FAST-RA-NEXT: .LBB2_2: # %entry ; 32-FAST-RA-NEXT: .LBB2_2: # %entry
; 32-FAST-RA-NEXT: movl %esi, %eax ; 32-FAST-RA-NEXT: movl %esi, %eax
; 32-FAST-RA-NEXT: addl $4, %esp ; 32-FAST-RA-NEXT: addl $4, %esp
; 32-FAST-RA-NEXT: popl %esi ; 32-FAST-RA-NEXT: popl %esi
; 32-FAST-RA-NEXT: popl %ebx ; 32-FAST-RA-NEXT: popl %ebx
; 32-FAST-RA-NEXT: retl ; 32-FAST-RA-NEXT: retl
; ;
; 64-ALL-LABEL: test_feed_cmov: ; 64-ALL-LABEL: test_feed_cmov:
; 64-ALL: # %bb.0: # %entry ; 64-ALL: # %bb.0: # %entry
; 64-ALL-NEXT: pushq %rbp ; 64-ALL-NEXT: pushq %rbp
; 64-ALL-NEXT: pushq %rbx ; 64-ALL-NEXT: pushq %rbx
; 64-ALL-NEXT: pushq %rax ; 64-ALL-NEXT: pushq %rax
; 64-ALL-NEXT: movl %edx, %ebx ; 64-ALL-NEXT: movl %edx, %ebx
; 64-ALL-NEXT: movl %esi, %eax ; 64-ALL-NEXT: movl %esi, %eax
; 64-ALL-NEXT: lock cmpxchgl %edx, (%rdi) ; 64-ALL-NEXT: lock cmpxchgl %edx, (%rdi)
; 64-ALL-NEXT: sete %bpl ; 64-ALL-NEXT: sete %bpl
; 64-ALL-NEXT: callq foo ; 64-ALL-NEXT: callq foo
; 64-ALL-NEXT: testb $-1, %bpl ; 64-ALL-NEXT: testb %bpl, %bpl
; 64-ALL-NEXT: cmovnel %ebx, %eax ; 64-ALL-NEXT: cmovnel %ebx, %eax
; 64-ALL-NEXT: addq $8, %rsp ; 64-ALL-NEXT: addq $8, %rsp
; 64-ALL-NEXT: popq %rbx ; 64-ALL-NEXT: popq %rbx
; 64-ALL-NEXT: popq %rbp ; 64-ALL-NEXT: popq %rbp
; 64-ALL-NEXT: retq ; 64-ALL-NEXT: retq
entry: entry:
%res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst %res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
%success = extractvalue { i32, i1 } %res, 1 %success = extractvalue { i32, i1 } %res, 1
%rhs = call i32 @foo() %rhs = call i32 @foo()
%ret = select i1 %success, i32 %new, i32 %rhs %ret = select i1 %success, i32 %new, i32 %rhs
ret i32 %ret ret i32 %ret
} }

llvm/trunk/test/CodeGen/X86/copy-eflags.ll

Show All 24 Lines
; X32-NEXT: incl c ; X32-NEXT: incl c
; X32-NEXT: sete %dl ; X32-NEXT: sete %dl
; X32-NEXT: movb a, %ah ; X32-NEXT: movb a, %ah
; X32-NEXT: movb %ah, %ch ; X32-NEXT: movb %ah, %ch
; X32-NEXT: incb %ch ; X32-NEXT: incb %ch
; X32-NEXT: cmpb %cl, %ah ; X32-NEXT: cmpb %cl, %ah
; X32-NEXT: sete d ; X32-NEXT: sete d
; X32-NEXT: movb %ch, a ; X32-NEXT: movb %ch, a
; X32-NEXT: testb $-1, %dl ; X32-NEXT: testb %dl, %dl
; X32-NEXT: jne .LBB0_2 ; X32-NEXT: jne .LBB0_2
; X32-NEXT: # %bb.1: # %if.then ; X32-NEXT: # %bb.1: # %if.then
; X32-NEXT: movsbl %al, %eax ; X32-NEXT: movsbl %al, %eax
; X32-NEXT: pushl %eax ; X32-NEXT: pushl %eax
; X32-NEXT: calll external ; X32-NEXT: calll external
; X32-NEXT: addl $4, %esp ; X32-NEXT: addl $4, %esp
; X32-NEXT: .LBB0_2: # %if.end ; X32-NEXT: .LBB0_2: # %if.end
; X32-NEXT: xorl %eax, %eax ; X32-NEXT: xorl %eax, %eax
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: test1: ; X64-LABEL: test1:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: movb {{.*}}(%rip), %dil ; X64-NEXT: movb {{.*}}(%rip), %dil
; X64-NEXT: movl %edi, %eax ; X64-NEXT: movl %edi, %eax
; X64-NEXT: incb %al ; X64-NEXT: incb %al
; X64-NEXT: movb %al, {{.*}}(%rip) ; X64-NEXT: movb %al, {{.*}}(%rip)
; X64-NEXT: incl {{.*}}(%rip) ; X64-NEXT: incl {{.*}}(%rip)
; X64-NEXT: sete %sil ; X64-NEXT: sete %sil
; X64-NEXT: movb {{.*}}(%rip), %cl ; X64-NEXT: movb {{.*}}(%rip), %cl
; X64-NEXT: movl %ecx, %edx ; X64-NEXT: movl %ecx, %edx
; X64-NEXT: incb %dl ; X64-NEXT: incb %dl
; X64-NEXT: cmpb %dil, %cl ; X64-NEXT: cmpb %dil, %cl
; X64-NEXT: sete {{.*}}(%rip) ; X64-NEXT: sete {{.*}}(%rip)
; X64-NEXT: movb %dl, {{.*}}(%rip) ; X64-NEXT: movb %dl, {{.*}}(%rip)
; X64-NEXT: testb $-1, %sil ; X64-NEXT: testb %sil, %sil
; X64-NEXT: jne .LBB0_2 ; X64-NEXT: jne .LBB0_2
; X64-NEXT: # %bb.1: # %if.then ; X64-NEXT: # %bb.1: # %if.then
; X64-NEXT: pushq %rax ; X64-NEXT: pushq %rax
; X64-NEXT: movsbl %al, %edi ; X64-NEXT: movsbl %al, %edi
; X64-NEXT: callq external ; X64-NEXT: callq external
; X64-NEXT: addq $8, %rsp ; X64-NEXT: addq $8, %rsp
; X64-NEXT: .LBB0_2: # %if.end ; X64-NEXT: .LBB0_2: # %if.end
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
Show All 29 Lines
; X32: # %bb.0: # %entry ; X32: # %bb.0: # %entry
; X32-NEXT: pushl %ebx ; X32-NEXT: pushl %ebx
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: incl (%eax) ; X32-NEXT: incl (%eax)
; X32-NEXT: setne %bl ; X32-NEXT: setne %bl
; X32-NEXT: pushl $42 ; X32-NEXT: pushl $42
; X32-NEXT: calll external ; X32-NEXT: calll external
; X32-NEXT: addl $4, %esp ; X32-NEXT: addl $4, %esp
; X32-NEXT: testb $-1, %bl ; X32-NEXT: testb %bl, %bl
; X32-NEXT: je .LBB1_1 ; X32-NEXT: je .LBB1_1
; X32-NEXT: # %bb.2: # %else ; X32-NEXT: # %bb.2: # %else
; X32-NEXT: xorl %eax, %eax ; X32-NEXT: xorl %eax, %eax
; X32-NEXT: popl %ebx ; X32-NEXT: popl %ebx
; X32-NEXT: retl ; X32-NEXT: retl
; X32-NEXT: .LBB1_1: # %then ; X32-NEXT: .LBB1_1: # %then
; X32-NEXT: movl $64, %eax ; X32-NEXT: movl $64, %eax
; X32-NEXT: popl %ebx ; X32-NEXT: popl %ebx
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: test2: ; X64-LABEL: test2:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: pushq %rbx ; X64-NEXT: pushq %rbx
; X64-NEXT: incl (%rdi) ; X64-NEXT: incl (%rdi)
; X64-NEXT: setne %bl ; X64-NEXT: setne %bl
; X64-NEXT: movl $42, %edi ; X64-NEXT: movl $42, %edi
; X64-NEXT: callq external ; X64-NEXT: callq external
; X64-NEXT: testb $-1, %bl ; X64-NEXT: testb %bl, %bl
; X64-NEXT: je .LBB1_1 ; X64-NEXT: je .LBB1_1
; X64-NEXT: # %bb.2: # %else ; X64-NEXT: # %bb.2: # %else
; X64-NEXT: xorl %eax, %eax ; X64-NEXT: xorl %eax, %eax
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
; X64-NEXT: retq ; X64-NEXT: retq
; X64-NEXT: .LBB1_1: # %then ; X64-NEXT: .LBB1_1: # %then
; X64-NEXT: movl $64, %eax ; X64-NEXT: movl $64, %eax
; X64-NEXT: popq %rbx ; X64-NEXT: popq %rbx
Show All 24 Lines
define void @test_tail_call(i32* %ptr) nounwind optsize { define void @test_tail_call(i32* %ptr) nounwind optsize {
; X32-LABEL: test_tail_call: ; X32-LABEL: test_tail_call:
; X32: # %bb.0: # %entry ; X32: # %bb.0: # %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: incl (%eax) ; X32-NEXT: incl (%eax)
; X32-NEXT: setne %al ; X32-NEXT: setne %al
; X32-NEXT: incb a ; X32-NEXT: incb a
; X32-NEXT: sete d ; X32-NEXT: sete d
; X32-NEXT: testb $-1, %al ; X32-NEXT: testb %al, %al
; X32-NEXT: jne external_b # TAILCALL ; X32-NEXT: jne external_b # TAILCALL
; X32-NEXT: # %bb.1: # %then ; X32-NEXT: # %bb.1: # %then
; X32-NEXT: jmp external_a # TAILCALL ; X32-NEXT: jmp external_a # TAILCALL
; ;
; X64-LABEL: test_tail_call: ; X64-LABEL: test_tail_call:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: incl (%rdi) ; X64-NEXT: incl (%rdi)
; X64-NEXT: setne %al ; X64-NEXT: setne %al
; X64-NEXT: incb {{.*}}(%rip) ; X64-NEXT: incb {{.*}}(%rip)
; X64-NEXT: sete {{.*}}(%rip) ; X64-NEXT: sete {{.*}}(%rip)
; X64-NEXT: testb $-1, %al ; X64-NEXT: testb %al, %al
; X64-NEXT: jne external_b # TAILCALL ; X64-NEXT: jne external_b # TAILCALL
; X64-NEXT: # %bb.1: # %then ; X64-NEXT: # %bb.1: # %then
; X64-NEXT: jmp external_a # TAILCALL ; X64-NEXT: jmp external_a # TAILCALL
entry: entry:
%val = load i32, i32* %ptr %val = load i32, i32* %ptr
%inc = add i32 %val, 1 %inc = add i32 %val, 1
store i32 %inc, i32* %ptr store i32 %inc, i32* %ptr
%cmp = icmp eq i32 %inc, 0 %cmp = icmp eq i32 %inc, 0
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; X32-NEXT: sarl $31, %edx ; X32-NEXT: sarl $31, %edx
; X32-NEXT: cmpl %eax, %esi ; X32-NEXT: cmpl %eax, %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: sbbl %edx, %eax ; X32-NEXT: sbbl %edx, %eax
; X32-NEXT: setl %al ; X32-NEXT: setl %al
; X32-NEXT: setl %dl ; X32-NEXT: setl %dl
; X32-NEXT: movzbl %dl, %ebp ; X32-NEXT: movzbl %dl, %ebp
; X32-NEXT: negl %ebp ; X32-NEXT: negl %ebp
; X32-NEXT: testb $-1, %al ; X32-NEXT: testb %al, %al
; X32-NEXT: jne .LBB3_3 ; X32-NEXT: jne .LBB3_3
; X32-NEXT: # %bb.2: # %bb1 ; X32-NEXT: # %bb.2: # %bb1
; X32-NEXT: # in Loop: Header=BB3_1 Depth=1 ; X32-NEXT: # in Loop: Header=BB3_1 Depth=1
; X32-NEXT: movb %ch, %cl ; X32-NEXT: movb %ch, %cl
; X32-NEXT: .LBB3_3: # %bb1 ; X32-NEXT: .LBB3_3: # %bb1
; X32-NEXT: # in Loop: Header=BB3_1 Depth=1 ; X32-NEXT: # in Loop: Header=BB3_1 Depth=1
; X32-NEXT: movb %cl, (%ebx) ; X32-NEXT: movb %cl, (%ebx)
; X32-NEXT: movl (%edi), %edx ; X32-NEXT: movl (%edi), %edx
; X32-NEXT: testb $-1, %al ; X32-NEXT: testb %al, %al
; X32-NEXT: jne .LBB3_5 ; X32-NEXT: jne .LBB3_5
; X32-NEXT: # %bb.4: # %bb1 ; X32-NEXT: # %bb.4: # %bb1
; X32-NEXT: # in Loop: Header=BB3_1 Depth=1 ; X32-NEXT: # in Loop: Header=BB3_1 Depth=1
; X32-NEXT: movl %edx, %ebp ; X32-NEXT: movl %edx, %ebp
; X32-NEXT: jmp .LBB3_5 ; X32-NEXT: jmp .LBB3_5
; ;
; X64-LABEL: PR37100: ; X64-LABEL: PR37100:
; X64: # %bb.0: # %bb ; X64: # %bb.0: # %bb
▲ Show 20 Lines • Show All 47 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/flags-copy-lowering.mir

Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Lines ; CHECK-NOT: COPY{{( killed)?}} $eflags
ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
$eflags = COPY %2 $eflags = COPY %2
JA_1 %bb.1, implicit $eflags JA_1 %bb.1, implicit $eflags
JB_1 %bb.2, implicit $eflags JB_1 %bb.2, implicit $eflags
JMP_1 %bb.3 JMP_1 %bb.3
; CHECK-NOT: $eflags = ; CHECK-NOT: $eflags =
; ;
; CHECK: TEST8ri %[[A_REG]], -1, implicit-def $eflags ; CHECK: TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
; CHECK-NEXT: JNE_1 %bb.1, implicit killed $eflags ; CHECK-NEXT: JNE_1 %bb.1, implicit killed $eflags
; CHECK-SAME: {{$[[:space:]]}} ; CHECK-SAME: {{$[[:space:]]}}
; CHECK-NEXT: bb.4: ; CHECK-NEXT: bb.4:
; CHECK-NEXT: successors: {{.*$}} ; CHECK-NEXT: successors: {{.*$}}
; CHECK-SAME: {{$[[:space:]]}} ; CHECK-SAME: {{$[[:space:]]}}
; CHECK-NEXT: TEST8ri %[[B_REG]], -1, implicit-def $eflags ; CHECK-NEXT: TEST8rr %[[B_REG]], %[[B_REG]], implicit-def $eflags
; CHECK-NEXT: JNE_1 %bb.2, implicit killed $eflags ; CHECK-NEXT: JNE_1 %bb.2, implicit killed $eflags
; CHECK-NEXT: JMP_1 %bb.3 ; CHECK-NEXT: JMP_1 %bb.3
bb.1: bb.1:
%3:gr32 = MOV32ri64 42 %3:gr32 = MOV32ri64 42
$eax = COPY %3 $eax = COPY %3
RET 0, $eax RET 0, $eax
Show All 32 Lines ; CHECK-NOT: COPY{{( killed)?}} $eflags
CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
$eflags = COPY %2 $eflags = COPY %2
JA_1 %bb.2, implicit $eflags JA_1 %bb.2, implicit $eflags
JB_1 %bb.3, implicit $eflags JB_1 %bb.3, implicit $eflags
; CHECK-NOT: $eflags = ; CHECK-NOT: $eflags =
; ;
; CHECK: TEST8ri %[[A_REG]], -1, implicit-def $eflags ; CHECK: TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
; CHECK-NEXT: JNE_1 %bb.2, implicit killed $eflags ; CHECK-NEXT: JNE_1 %bb.2, implicit killed $eflags
; CHECK-SAME: {{$[[:space:]]}} ; CHECK-SAME: {{$[[:space:]]}}
; CHECK-NEXT: bb.4: ; CHECK-NEXT: bb.4:
; CHECK-NEXT: successors: {{.*$}} ; CHECK-NEXT: successors: {{.*$}}
; CHECK-SAME: {{$[[:space:]]}} ; CHECK-SAME: {{$[[:space:]]}}
; CHECK-NEXT: TEST8ri %[[B_REG]], -1, implicit-def $eflags ; CHECK-NEXT: TEST8rr %[[B_REG]], %[[B_REG]], implicit-def $eflags
; CHECK-NEXT: JNE_1 %bb.3, implicit killed $eflags ; CHECK-NEXT: JNE_1 %bb.3, implicit killed $eflags
; CHECK-SAME: {{$[[:space:]]}} ; CHECK-SAME: {{$[[:space:]]}}
; CHECK-NEXT: bb.1: ; CHECK-NEXT: bb.1:
bb.1: bb.1:
%5:gr32 = MOV32r0 implicit-def dead $eflags %5:gr32 = MOV32r0 implicit-def dead $eflags
$eax = COPY %5 $eax = COPY %5
RET 0, $eax RET 0, $eax
▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines ; CHECK-NOT: COPY{{( killed)?}} $eflags
ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
$eflags = COPY %2 $eflags = COPY %2
%3:gr64 = CMOVA64rr %0, %1, implicit $eflags %3:gr64 = CMOVA64rr %0, %1, implicit $eflags
%4:gr64 = CMOVB64rr %0, %1, implicit $eflags %4:gr64 = CMOVB64rr %0, %1, implicit $eflags
%5:gr64 = CMOVE64rr %0, %1, implicit $eflags %5:gr64 = CMOVE64rr %0, %1, implicit $eflags
%6:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags %6:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags
; CHECK-NOT: $eflags = ; CHECK-NOT: $eflags =
; CHECK: TEST8ri %[[A_REG]], -1, implicit-def $eflags ; CHECK: TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
; CHECK-NEXT: %3:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags ; CHECK-NEXT: %3:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags
; CHECK-NEXT: TEST8ri %[[B_REG]], -1, implicit-def $eflags ; CHECK-NEXT: TEST8rr %[[B_REG]], %[[B_REG]], implicit-def $eflags
; CHECK-NEXT: %4:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags ; CHECK-NEXT: %4:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags
; CHECK-NEXT: TEST8ri %[[E_REG]], -1, implicit-def $eflags ; CHECK-NEXT: TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
; CHECK-NEXT: %5:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags ; CHECK-NEXT: %5:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags
; CHECK-NEXT: TEST8ri %[[E_REG]], -1, implicit-def $eflags ; CHECK-NEXT: TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
; CHECK-NEXT: %6:gr64 = CMOVE64rr %0, %1, implicit killed $eflags ; CHECK-NEXT: %6:gr64 = CMOVE64rr %0, %1, implicit killed $eflags
MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3
MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4
MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5
MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6
RET 0 RET 0
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines ; CHECK-NOT: COPY{{( killed)?}} $eflags
CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
$eflags = COPY %3 $eflags = COPY %3
%4:gr64 = CMOVE64rr %0, %1, implicit $eflags %4:gr64 = CMOVE64rr %0, %1, implicit $eflags
%5:gr64 = MOV64ri32 42 %5:gr64 = MOV64ri32 42
%6:gr64 = ADCX64rr %2, %5, implicit-def $eflags, implicit $eflags %6:gr64 = ADCX64rr %2, %5, implicit-def $eflags, implicit $eflags
; CHECK-NOT: $eflags = ; CHECK-NOT: $eflags =
; CHECK: TEST8ri %[[E_REG]], -1, implicit-def $eflags ; CHECK: TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
; CHECK-NEXT: %4:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags ; CHECK-NEXT: %4:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags
; CHECK-NEXT: %5:gr64 = MOV64ri32 42 ; CHECK-NEXT: %5:gr64 = MOV64ri32 42
; CHECK-NEXT: dead %{{[^:]*}}:gr8 = ADD8ri %[[CF_REG]], 255, implicit-def $eflags ; CHECK-NEXT: dead %{{[^:]*}}:gr8 = ADD8ri %[[CF_REG]], 255, implicit-def $eflags
; CHECK-NEXT: %6:gr64 = ADCX64rr %2, %5, implicit-def{{( dead)?}} $eflags, implicit killed $eflags ; CHECK-NEXT: %6:gr64 = ADCX64rr %2, %5, implicit-def{{( dead)?}} $eflags, implicit killed $eflags
MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4
MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6
RET 0 RET 0
Show All 22 Lines ; CHECK-NOT: COPY{{( killed)?}} $eflags
CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
$eflags = COPY %3 $eflags = COPY %3
%4:gr64 = CMOVE64rr %0, %1, implicit $eflags %4:gr64 = CMOVE64rr %0, %1, implicit $eflags
%5:gr64 = MOV64ri32 42 %5:gr64 = MOV64ri32 42
%6:gr64 = ADOX64rr %2, %5, implicit-def $eflags, implicit $eflags %6:gr64 = ADOX64rr %2, %5, implicit-def $eflags, implicit $eflags
; CHECK-NOT: $eflags = ; CHECK-NOT: $eflags =
; CHECK: TEST8ri %[[E_REG]], -1, implicit-def $eflags ; CHECK: TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
; CHECK-NEXT: %4:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags ; CHECK-NEXT: %4:gr64 = CMOVNE64rr %0, %1, implicit killed $eflags
; CHECK-NEXT: %5:gr64 = MOV64ri32 42 ; CHECK-NEXT: %5:gr64 = MOV64ri32 42
; CHECK-NEXT: dead %{{[^:]*}}:gr8 = ADD8ri %[[OF_REG]], 127, implicit-def $eflags ; CHECK-NEXT: dead %{{[^:]*}}:gr8 = ADD8ri %[[OF_REG]], 127, implicit-def $eflags
; CHECK-NEXT: %6:gr64 = ADOX64rr %2, %5, implicit-def{{( dead)?}} $eflags, implicit killed $eflags ; CHECK-NEXT: %6:gr64 = ADOX64rr %2, %5, implicit-def{{( dead)?}} $eflags, implicit killed $eflags
MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4
MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6 MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6
RET 0 RET 0
▲ Show 20 Lines • Show All 70 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/peephole-na-phys-copy-folding.ll

Show First 20 Lines • Show All 215 Lines • ▼ Show 20 Lines
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK32-NEXT: lock cmpxchg8b (%esi) ; CHECK32-NEXT: lock cmpxchg8b (%esi)
; CHECK32-NEXT: setne %bl ; CHECK32-NEXT: setne %bl
; CHECK32-NEXT: subl $8, %esp ; CHECK32-NEXT: subl $8, %esp
; CHECK32-NEXT: pushl %edx ; CHECK32-NEXT: pushl %edx
; CHECK32-NEXT: pushl %eax ; CHECK32-NEXT: pushl %eax
; CHECK32-NEXT: calll bar ; CHECK32-NEXT: calll bar
; CHECK32-NEXT: addl $16, %esp ; CHECK32-NEXT: addl $16, %esp
; CHECK32-NEXT: testb $-1, %bl ; CHECK32-NEXT: testb %bl, %bl
; CHECK32-NEXT: jne .LBB4_3 ; CHECK32-NEXT: jne .LBB4_3
; CHECK32-NEXT: # %bb.1: # %t ; CHECK32-NEXT: # %bb.1: # %t
; CHECK32-NEXT: movl $42, %eax ; CHECK32-NEXT: movl $42, %eax
; CHECK32-NEXT: jmp .LBB4_2 ; CHECK32-NEXT: jmp .LBB4_2
; CHECK32-NEXT: .LBB4_3: # %f ; CHECK32-NEXT: .LBB4_3: # %f
; CHECK32-NEXT: xorl %eax, %eax ; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: .LBB4_2: # %t ; CHECK32-NEXT: .LBB4_2: # %t
; CHECK32-NEXT: xorl %edx, %edx ; CHECK32-NEXT: xorl %edx, %edx
; CHECK32-NEXT: addl $4, %esp ; CHECK32-NEXT: addl $4, %esp
; CHECK32-NEXT: popl %esi ; CHECK32-NEXT: popl %esi
; CHECK32-NEXT: popl %ebx ; CHECK32-NEXT: popl %ebx
; CHECK32-NEXT: retl ; CHECK32-NEXT: retl
; ;
; CHECK64-LABEL: test_intervening_call: ; CHECK64-LABEL: test_intervening_call:
; CHECK64: # %bb.0: # %entry ; CHECK64: # %bb.0: # %entry
; CHECK64-NEXT: pushq %rbx ; CHECK64-NEXT: pushq %rbx
; CHECK64-NEXT: movq %rsi, %rax ; CHECK64-NEXT: movq %rsi, %rax
; CHECK64-NEXT: lock cmpxchgq %rdx, (%rdi) ; CHECK64-NEXT: lock cmpxchgq %rdx, (%rdi)
; CHECK64-NEXT: setne %bl ; CHECK64-NEXT: setne %bl
; CHECK64-NEXT: movq %rax, %rdi ; CHECK64-NEXT: movq %rax, %rdi
; CHECK64-NEXT: callq bar ; CHECK64-NEXT: callq bar
; CHECK64-NEXT: testb $-1, %bl ; CHECK64-NEXT: testb %bl, %bl
; CHECK64-NEXT: jne .LBB4_2 ; CHECK64-NEXT: jne .LBB4_2
; CHECK64-NEXT: # %bb.1: # %t ; CHECK64-NEXT: # %bb.1: # %t
; CHECK64-NEXT: movl $42, %eax ; CHECK64-NEXT: movl $42, %eax
; CHECK64-NEXT: popq %rbx ; CHECK64-NEXT: popq %rbx
; CHECK64-NEXT: retq ; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB4_2: # %f ; CHECK64-NEXT: .LBB4_2: # %f
; CHECK64-NEXT: xorl %eax, %eax ; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: popq %rbx ; CHECK64-NEXT: popq %rbx
Show All 24 Lines
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebp ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebp
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebx ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebx
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK32-NEXT: lock cmpxchg8b (%esi) ; CHECK32-NEXT: lock cmpxchg8b (%esi)
; CHECK32-NEXT: setne {{[0-9]+}}(%esp) # 1-byte Folded Spill ; CHECK32-NEXT: setne {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movl %edi, %edx ; CHECK32-NEXT: movl %edi, %edx
; CHECK32-NEXT: movl %ebp, %ecx ; CHECK32-NEXT: movl %ebp, %ecx
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebx ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebx
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK32-NEXT: lock cmpxchg8b (%esi) ; CHECK32-NEXT: lock cmpxchg8b (%esi)
; CHECK32-NEXT: sete %al ; CHECK32-NEXT: sete %al
; CHECK32-NEXT: testb $-1, {{[0-9]+}}(%esp) # 1-byte Folded Reload ; CHECK32-NEXT: cmpb $0, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Reload
; CHECK32-NEXT: jne .LBB5_4 ; CHECK32-NEXT: jne .LBB5_4
; CHECK32-NEXT: # %bb.1: # %entry ; CHECK32-NEXT: # %bb.1: # %entry
; CHECK32-NEXT: testb %al, %al ; CHECK32-NEXT: testb %al, %al
; CHECK32-NEXT: je .LBB5_4 ; CHECK32-NEXT: je .LBB5_4
; CHECK32-NEXT: # %bb.2: # %t ; CHECK32-NEXT: # %bb.2: # %t
; CHECK32-NEXT: movl $42, %eax ; CHECK32-NEXT: movl $42, %eax
; CHECK32-NEXT: jmp .LBB5_3 ; CHECK32-NEXT: jmp .LBB5_3
; CHECK32-NEXT: .LBB5_4: # %f ; CHECK32-NEXT: .LBB5_4: # %f
Show All 10 Lines
; CHECK64-LABEL: test_two_live_flags: ; CHECK64-LABEL: test_two_live_flags:
; CHECK64: # %bb.0: # %entry ; CHECK64: # %bb.0: # %entry
; CHECK64-NEXT: movq %rsi, %rax ; CHECK64-NEXT: movq %rsi, %rax
; CHECK64-NEXT: lock cmpxchgq %rdx, (%rdi) ; CHECK64-NEXT: lock cmpxchgq %rdx, (%rdi)
; CHECK64-NEXT: setne %dl ; CHECK64-NEXT: setne %dl
; CHECK64-NEXT: movq %r8, %rax ; CHECK64-NEXT: movq %r8, %rax
; CHECK64-NEXT: lock cmpxchgq %r9, (%rcx) ; CHECK64-NEXT: lock cmpxchgq %r9, (%rcx)
; CHECK64-NEXT: sete %al ; CHECK64-NEXT: sete %al
; CHECK64-NEXT: testb $-1, %dl ; CHECK64-NEXT: testb %dl, %dl
; CHECK64-NEXT: jne .LBB5_3 ; CHECK64-NEXT: jne .LBB5_3
; CHECK64-NEXT: # %bb.1: # %entry ; CHECK64-NEXT: # %bb.1: # %entry
; CHECK64-NEXT: testb %al, %al ; CHECK64-NEXT: testb %al, %al
; CHECK64-NEXT: je .LBB5_3 ; CHECK64-NEXT: je .LBB5_3
; CHECK64-NEXT: # %bb.2: # %t ; CHECK64-NEXT: # %bb.2: # %t
; CHECK64-NEXT: movl $42, %eax ; CHECK64-NEXT: movl $42, %eax
; CHECK64-NEXT: retq ; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB5_3: # %f ; CHECK64-NEXT: .LBB5_3: # %f
▲ Show 20 Lines • Show All 47 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/win64_frame.ll

Show First 20 Lines • Show All 232 Lines • ▼ Show 20 Lines
; ALL-NEXT: subq $40, %rsp ; ALL-NEXT: subq $40, %rsp
; ALL-NEXT: .seh_stackalloc 40 ; ALL-NEXT: .seh_stackalloc 40
; ALL-NEXT: .seh_endprologue ; ALL-NEXT: .seh_endprologue
; ALL-NEXT: movq %rdx, %rsi ; ALL-NEXT: movq %rdx, %rsi
; ALL-NEXT: movq %rdx, %rax ; ALL-NEXT: movq %rdx, %rax
; ALL-NEXT: lock cmpxchgq %r8, (%rcx) ; ALL-NEXT: lock cmpxchgq %r8, (%rcx)
; ALL-NEXT: sete %bl ; ALL-NEXT: sete %bl
; ALL-NEXT: callq dummy ; ALL-NEXT: callq dummy
; ALL-NEXT: testb $-1, %bl ; ALL-NEXT: testb %bl, %bl
; ALL-NEXT: cmoveq %rsi, %rax ; ALL-NEXT: cmoveq %rsi, %rax
; ALL-NEXT: addq $40, %rsp ; ALL-NEXT: addq $40, %rsp
; ALL-NEXT: popq %rbx ; ALL-NEXT: popq %rbx
; ALL-NEXT: popq %rsi ; ALL-NEXT: popq %rsi
; ALL-NEXT: retq ; ALL-NEXT: retq
; ALL-NEXT: .seh_handlerdata ; ALL-NEXT: .seh_handlerdata
; ALL-NEXT: .text ; ALL-NEXT: .text
; ALL-NEXT: .seh_endproc ; ALL-NEXT: .seh_endproc
Show All 39 Lines

llvm/trunk/test/CodeGen/X86/x86-repmov-copy-eflags.ll

Show All 37 Lines
; CHECK: rep;movsl ; CHECK: rep;movsl
; CHECK: leal 8(%esp), %esi ; CHECK: leal 8(%esp), %esi
; CHECK: decl (%esp) ; CHECK: decl (%esp)
; CHECK: setne %[[NE_REG:.*]] ; CHECK: setne %[[NE_REG:.*]]
; CHECK: pushl %esi ; CHECK: pushl %esi
; CHECK: calll _g ; CHECK: calll _g
; CHECK: addl $4, %esp ; CHECK: addl $4, %esp
; CHECK: testb $-1, %[[NE_REG]] ; CHECK: testb %[[NE_REG]], %[[NE_REG]]
; CHECK: jne ; CHECK: jne
attributes #0 = { nounwind optsize } attributes #0 = { nounwind optsize }
attributes #1 = { argmemonly nounwind } attributes #1 = { argmemonly nounwind }