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[mips] Correct .MIPS.abiflags for -mfpxx on MIPS32r6
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Authored by dsanders on Jul 16 2014, 7:18 AM.

Details

Summary

The cpr1_size field describes the minimum register width to run the program
rather than the size of the registers on the target. MIPS32r6 was acting
as if -mfp64 has been given because it starts off with 64-bit FPU registers.

Diff Detail

Event Timeline

dsanders updated this revision to Diff 11507.Jul 16 2014, 7:18 AM
dsanders retitled this revision from to [mips] Correct .MIPS.abiflags for -mfpxx on MIPS32r6.
dsanders updated this object.
dsanders edited the test plan for this revision. (Show Details)
dsanders added reviewers: vmedic, sstankovic.
dsanders accepted this revision.Jul 17 2014, 3:05 AM
dsanders added a reviewer: dsanders.
This revision is now accepted and ready to land.Jul 17 2014, 3:05 AM
dsanders closed this revision.Jul 17 2014, 3:05 AM