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Differential D44436

[mips] Correct the predicates for special nops, tlb ctrl instrs, software breakpoint and prefx.
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Authored by sdardis on Mar 13 2018, 9:04 AM.

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Reviewers
atanasyan
abeserminji
Commits
rGa5a3c38c3d10: [mips] Correct the predicates for special nops, tlb ctrl instrs, software…
rL329905: [mips] Correct the predicates for special nops, tlb ctrl instrs, software…

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rL LLVM

Event Timeline

sdardis created this revision.Mar 13 2018, 9:04 AM
Herald added a subscriber: arichardson. · View Herald TranscriptMar 13 2018, 9:04 AM
atanasyan accepted this revision.Mar 14 2018, 7:17 AM

LGTM

This revision is now accepted and ready to land.Mar 14 2018, 7:17 AM
Closed by commit rL329905: [mips] Correct the predicates for special nops, tlb ctrl instrs, software… (authored by sdardis). · Explain WhyApr 12 2018, 5:40 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
Mips/
31 lines
26 lines
test/
MC/
Disassembler/
Mips/
micromips32r3/
4 lines
4 lines
mips32r2/
1 line
1 line
mips32r3/
1 line
1 line
mips32r5/
1 line
1 line
mips32r6/
1 line
2 lines
mips64r2/
1 line
1 line
mips64r3/
1 line
1 line
mips64r5/
1 line
1 line
mips64r6/
1 line
2 lines
Mips/
mips1/
12 lines
mips2/
8 lines
mips3/
10 lines
mips32/
12 lines
mips32r2/
14 lines
mips32r3/
14 lines
mips32r5/
14 lines
mips32r6/
19 lines
mips4/
10 lines
mips5/
10 lines
mips64/
10 lines
mips64r2/
16 lines
mips64r3/
16 lines
mips64r5/
16 lines
mips64r6/
21 lines

Diff 142155

llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td

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} }
let DecoderNamespace = "MicroMips" in { let DecoderNamespace = "MicroMips" in {
let DecoderMethod = "DecodePrefeOpMM" in { let DecoderMethod = "DecodePrefeOpMM" in {
def PREFE_MM : MMRel, CacheOp<"prefe", mem_mm_9, II_PREFE>, def PREFE_MM : MMRel, CacheOp<"prefe", mem_mm_9, II_PREFE>,
CACHE_PREFE_FM_MM<0x18, 0x2>, ISA_MICROMIPS, ASE_EVA; CACHE_PREFE_FM_MM<0x18, 0x2>, ISA_MICROMIPS, ASE_EVA;
def CACHEE_MM : MMRel, CacheOp<"cachee", mem_mm_9, II_CACHEE>, def CACHEE_MM : MMRel, CacheOp<"cachee", mem_mm_9, II_CACHEE>,
CACHE_PREFE_FM_MM<0x18, 0x3>, ISA_MICROMIPS, ASE_EVA; CACHE_PREFE_FM_MM<0x18, 0x3>, ISA_MICROMIPS, ASE_EVA;
} }
} def SSNOP_MM : MMRel, Barrier<"ssnop", II_SSNOP>, BARRIER_FM_MM<0x1>,
let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { ISA_MICROMIPS;
def SSNOP_MM : MMRel, Barrier<"ssnop", II_SSNOP>, BARRIER_FM_MM<0x1>; def EHB_MM : MMRel, Barrier<"ehb", II_EHB>, BARRIER_FM_MM<0x3>,
def EHB_MM : MMRel, Barrier<"ehb", II_EHB>, BARRIER_FM_MM<0x3>; ISA_MICROMIPS;
def PAUSE_MM : MMRel, Barrier<"pause", II_PAUSE>, BARRIER_FM_MM<0x5>; def PAUSE_MM : MMRel, Barrier<"pause", II_PAUSE>, BARRIER_FM_MM<0x5>,
ISA_MICROMIPS;
def TLBP_MM : MMRel, TLB<"tlbp", II_TLBP>, COP0_TLB_FM_MM<0x0d>;
def TLBR_MM : MMRel, TLB<"tlbr", II_TLBR>, COP0_TLB_FM_MM<0x4d>; def TLBP_MM : MMRel, TLB<"tlbp", II_TLBP>, COP0_TLB_FM_MM<0x0d>,
def TLBWI_MM : MMRel, TLB<"tlbwi", II_TLBWI>, COP0_TLB_FM_MM<0x8d>; ISA_MICROMIPS;
def TLBWR_MM : MMRel, TLB<"tlbwr", II_TLBWR>, COP0_TLB_FM_MM<0xcd>; def TLBR_MM : MMRel, TLB<"tlbr", II_TLBR>, COP0_TLB_FM_MM<0x4d>,
ISA_MICROMIPS;
def TLBWI_MM : MMRel, TLB<"tlbwi", II_TLBWI>, COP0_TLB_FM_MM<0x8d>,
ISA_MICROMIPS;
def TLBWR_MM : MMRel, TLB<"tlbwr", II_TLBWR>, COP0_TLB_FM_MM<0xcd>,
ISA_MICROMIPS;
def SDBBP_MM : MMRel, SYS_FT<"sdbbp", uimm10, II_SDBBP>, SDBBP_FM_MM; def SDBBP_MM : MMRel, SYS_FT<"sdbbp", uimm10, II_SDBBP>, SDBBP_FM_MM,
ISA_MICROMIPS;
def PREFX_MM : PrefetchIndexed<"prefx">, POOL32F_PREFX_FM_MM<0x15, 0x1A0>; def PREFX_MM : PrefetchIndexed<"prefx">, POOL32F_PREFX_FM_MM<0x15, 0x1A0>,
ISA_MICROMIPS32_NOT_MIPS32R6;
} }
def TAILCALL_MM : TailCall<J_MM, jmptarget_mm>, ISA_MIPS1_NOT_32R6_64R6; def TAILCALL_MM : TailCall<J_MM, jmptarget_mm>, ISA_MIPS1_NOT_32R6_64R6;
def TAILCALLREG_MM : TailCallReg<JRC16_MM, GPR32Opnd>, def TAILCALLREG_MM : TailCallReg<JRC16_MM, GPR32Opnd>,
ISA_MICROMIPS32_NOT_MIPS32R6; ISA_MICROMIPS32_NOT_MIPS32R6;
def PseudoIndirectBranch_MM : PseudoIndirectBranchBase<JR_MM, GPR32Opnd>, def PseudoIndirectBranch_MM : PseudoIndirectBranchBase<JR_MM, GPR32Opnd>,
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llvm/trunk/lib/Target/Mips/MipsInstrInfo.td

Show First 20 Lines • Show All 2,318 Lines • ▼ Show 20 Lineslet AdditionalPredicates = [NotInMicroMips] in {
def MFC2 : MFC3OP<"mfc2", GPR32Opnd, COP2Opnd, II_MFC2>, MFC3OP_FM<0x12, 0>, def MFC2 : MFC3OP<"mfc2", GPR32Opnd, COP2Opnd, II_MFC2>, MFC3OP_FM<0x12, 0>,
ISA_MIPS1; ISA_MIPS1;
def MTC2 : MTC3OP<"mtc2", COP2Opnd, GPR32Opnd, II_MTC2>, MFC3OP_FM<0x12, 4>, def MTC2 : MTC3OP<"mtc2", COP2Opnd, GPR32Opnd, II_MTC2>, MFC3OP_FM<0x12, 4>,
ISA_MIPS1; ISA_MIPS1;
} }
class Barrier<string asmstr, InstrItinClass itin = NoItinerary> : class Barrier<string asmstr, InstrItinClass itin = NoItinerary> :
InstSE<(outs), (ins), asmstr, [], itin, FrmOther, asmstr>; InstSE<(outs), (ins), asmstr, [], itin, FrmOther, asmstr>;
let AdditionalPredicates = [NotInMicroMips] in {
def SSNOP : MMRel, StdMMR6Rel, Barrier<"ssnop", II_SSNOP>, BARRIER_FM<1>; def SSNOP : MMRel, StdMMR6Rel, Barrier<"ssnop", II_SSNOP>, BARRIER_FM<1>,
def EHB : MMRel, Barrier<"ehb", II_EHB>, BARRIER_FM<3>; ISA_MIPS1;
def EHB : MMRel, Barrier<"ehb", II_EHB>, BARRIER_FM<3>, ISA_MIPS1;
let isCTI = 1 in let isCTI = 1 in
def PAUSE : MMRel, StdMMR6Rel, Barrier<"pause", II_PAUSE>, BARRIER_FM<5>, def PAUSE : MMRel, StdMMR6Rel, Barrier<"pause", II_PAUSE>, BARRIER_FM<5>,
ISA_MIPS32R2; ISA_MIPS32R2;
}
// JR_HB and JALR_HB are defined here using the new style naming // JR_HB and JALR_HB are defined here using the new style naming
// scheme because some of this code is shared with Mips32r6InstrInfo.td // scheme because some of this code is shared with Mips32r6InstrInfo.td
// and because of that it doesn't follow the naming convention of the // and because of that it doesn't follow the naming convention of the
// rest of the file. To avoid a mixture of old vs new style, the new // rest of the file. To avoid a mixture of old vs new style, the new
// style was chosen. // style was chosen.
class JR_HB_DESC_BASE<string instr_asm, RegisterOperand GPROpnd> { class JR_HB_DESC_BASE<string instr_asm, RegisterOperand GPROpnd> {
dag OutOperandList = (outs); dag OutOperandList = (outs);
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lineslet AdditionalPredicates = [NotInMips16Mode, NotInMicroMips,
def TAILCALLREGHB : TailCallReg<JR_HB, GPR32Opnd>, ISA_MIPS32_NOT_32R6_64R6; def TAILCALLREGHB : TailCallReg<JR_HB, GPR32Opnd>, ISA_MIPS32_NOT_32R6_64R6;
def PseudoIndirectHazardBranch : PseudoIndirectBranchBase<JR_HB, GPR32Opnd>, def PseudoIndirectHazardBranch : PseudoIndirectBranchBase<JR_HB, GPR32Opnd>,
ISA_MIPS32R2_NOT_32R6_64R6; ISA_MIPS32R2_NOT_32R6_64R6;
} }
class TLB<string asmstr, InstrItinClass itin = NoItinerary> : class TLB<string asmstr, InstrItinClass itin = NoItinerary> :
InstSE<(outs), (ins), asmstr, [], itin, FrmOther, asmstr>; InstSE<(outs), (ins), asmstr, [], itin, FrmOther, asmstr>;
let AdditionalPredicates = [NotInMicroMips] in { let AdditionalPredicates = [NotInMicroMips] in {
def TLBP : MMRel, TLB<"tlbp", II_TLBP>, COP0_TLB_FM<0x08>; def TLBP : MMRel, TLB<"tlbp", II_TLBP>, COP0_TLB_FM<0x08>, ISA_MIPS1;
def TLBR : MMRel, TLB<"tlbr", II_TLBR>, COP0_TLB_FM<0x01>; def TLBR : MMRel, TLB<"tlbr", II_TLBR>, COP0_TLB_FM<0x01>, ISA_MIPS1;
def TLBWI : MMRel, TLB<"tlbwi", II_TLBWI>, COP0_TLB_FM<0x02>; def TLBWI : MMRel, TLB<"tlbwi", II_TLBWI>, COP0_TLB_FM<0x02>, ISA_MIPS1;
def TLBWR : MMRel, TLB<"tlbwr", II_TLBWR>, COP0_TLB_FM<0x06>; def TLBWR : MMRel, TLB<"tlbwr", II_TLBWR>, COP0_TLB_FM<0x06>, ISA_MIPS1;
} }
class CacheOp<string instr_asm, Operand MemOpnd, class CacheOp<string instr_asm, Operand MemOpnd,
InstrItinClass itin = NoItinerary> : InstrItinClass itin = NoItinerary> :
InstSE<(outs), (ins MemOpnd:$addr, uimm5:$hint), InstSE<(outs), (ins MemOpnd:$addr, uimm5:$hint),
!strconcat(instr_asm, "\t$hint, $addr"), [], itin, FrmOther, !strconcat(instr_asm, "\t$hint, $addr"), [], itin, FrmOther,
instr_asm> { instr_asm> {
let DecoderMethod = "DecodeCacheOp"; let DecoderMethod = "DecodeCacheOp";
} }
def CACHE : MMRel, CacheOp<"cache", mem, II_CACHE>, CACHEOP_FM<0b101111>, def CACHE : MMRel, CacheOp<"cache", mem, II_CACHE>, CACHEOP_FM<0b101111>,
INSN_MIPS3_32_NOT_32R6_64R6; INSN_MIPS3_32_NOT_32R6_64R6;
def PREF : MMRel, CacheOp<"pref", mem, II_PREF>, CACHEOP_FM<0b110011>, def PREF : MMRel, CacheOp<"pref", mem, II_PREF>, CACHEOP_FM<0b110011>,
INSN_MIPS3_32_NOT_32R6_64R6; INSN_MIPS3_32_NOT_32R6_64R6;
// FIXME: We are missing the prefx instruction.
def ROL : MipsAsmPseudoInst<(outs), def ROL : MipsAsmPseudoInst<(outs),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rd), (ins GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rd),
"rol\t$rs, $rt, $rd">; "rol\t$rs, $rt, $rd">;
def ROLImm : MipsAsmPseudoInst<(outs), def ROLImm : MipsAsmPseudoInst<(outs),
(ins GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm), (ins GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm),
"rol\t$rs, $rt, $imm">; "rol\t$rs, $rt, $imm">;
def : MipsInstAlias<"rol $rd, $rs", def : MipsInstAlias<"rol $rd, $rs",
(ROL GPR32Opnd:$rd, GPR32Opnd:$rd, GPR32Opnd:$rs), 0>; (ROL GPR32Opnd:$rd, GPR32Opnd:$rd, GPR32Opnd:$rs), 0>;
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llvm/trunk/test/MC/Disassembler/Mips/micromips32r3/valid-el.txt

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0xc9 0x94 0x9a 0x02 # CHECK: beq $9, $6, 1336 0xc9 0x94 0x9a 0x02 # CHECK: beq $9, $6, 1336
0x46 0x40 0x9a 0x02 # CHECK: bgez $6, 1336 0x46 0x40 0x9a 0x02 # CHECK: bgez $6, 1336
0x66 0x40 0x9a 0x02 # CHECK: bgezal $6, 1336 0x66 0x40 0x9a 0x02 # CHECK: bgezal $6, 1336
0x26 0x40 0x9a 0x02 # CHECK: bltzal $6, 1336 0x26 0x40 0x9a 0x02 # CHECK: bltzal $6, 1336
0xc6 0x40 0x9a 0x02 # CHECK: bgtz $6, 1336 0xc6 0x40 0x9a 0x02 # CHECK: bgtz $6, 1336
0x86 0x40 0x9a 0x02 # CHECK: blez $6, 1336 0x86 0x40 0x9a 0x02 # CHECK: blez $6, 1336
0xc9 0xb4 0x9a 0x02 # CHECK: bne $9, $6, 1336 0xc9 0xb4 0x9a 0x02 # CHECK: bne $9, $6, 1336
0x06 0x40 0x9a 0x02 # CHECK: bltz $6, 1336 0x06 0x40 0x9a 0x02 # CHECK: bltz $6, 1336
0x00 0x00 0x7c 0x03 # CHECK: tlbp
0x00 0x00 0x7c 0x13 # CHECK: tlbr
0x00 0x00 0x7c 0x23 # CHECK: tlbwi
0x00 0x00 0x7c 0x33 # CHECK: tlbwr
0x28 0x01 0x3c 0x00 # CHECK: teq $8, $9 0x28 0x01 0x3c 0x00 # CHECK: teq $8, $9
0x28 0x01 0x3c 0x02 # CHECK: tge $8, $9 0x28 0x01 0x3c 0x02 # CHECK: tge $8, $9
0x28 0x01 0x3c 0x04 # CHECK: tgeu $8, $9 0x28 0x01 0x3c 0x04 # CHECK: tgeu $8, $9
0x28 0x01 0x3c 0x08 # CHECK: tlt $8, $9 0x28 0x01 0x3c 0x08 # CHECK: tlt $8, $9
0x28 0x01 0x3c 0x0a # CHECK: tltu $8, $9 0x28 0x01 0x3c 0x0a # CHECK: tltu $8, $9
0x28 0x01 0x3c 0x0c # CHECK: tne $8, $9 0x28 0x01 0x3c 0x0c # CHECK: tne $8, $9
0xc9 0x41 0x67 0x45 # CHECK: teqi $9, 17767 0xc9 0x41 0x67 0x45 # CHECK: teqi $9, 17767
0x29 0x41 0x67 0x45 # CHECK: tgei $9, 17767 0x29 0x41 0x67 0x45 # CHECK: tgei $9, 17767
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llvm/trunk/test/MC/Disassembler/Mips/micromips32r3/valid.txt

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0x94 0xc9 0x02 0x9a # CHECK: beq $9, $6, 1336 0x94 0xc9 0x02 0x9a # CHECK: beq $9, $6, 1336
0x40 0x46 0x02 0x9a # CHECK: bgez $6, 1336 0x40 0x46 0x02 0x9a # CHECK: bgez $6, 1336
0x40 0x66 0x02 0x9a # CHECK: bgezal $6, 1336 0x40 0x66 0x02 0x9a # CHECK: bgezal $6, 1336
0x40 0x26 0x02 0x9a # CHECK: bltzal $6, 1336 0x40 0x26 0x02 0x9a # CHECK: bltzal $6, 1336
0x40 0xc6 0x02 0x9a # CHECK: bgtz $6, 1336 0x40 0xc6 0x02 0x9a # CHECK: bgtz $6, 1336
0x40 0x86 0x02 0x9a # CHECK: blez $6, 1336 0x40 0x86 0x02 0x9a # CHECK: blez $6, 1336
0xb4 0xc9 0x02 0x9a # CHECK: bne $9, $6, 1336 0xb4 0xc9 0x02 0x9a # CHECK: bne $9, $6, 1336
0x40 0x06 0x02 0x9a # CHECK: bltz $6, 1336 0x40 0x06 0x02 0x9a # CHECK: bltz $6, 1336
0x00 0x00 0x03 0x7c # CHECK: tlbp
0x00 0x00 0x13 0x7c # CHECK: tlbr
0x00 0x00 0x23 0x7c # CHECK: tlbwi
0x00 0x00 0x33 0x7c # CHECK: tlbwr
0x01 0x28 0x00 0x3c # CHECK: teq $8, $9 0x01 0x28 0x00 0x3c # CHECK: teq $8, $9
0x01 0x28 0x02 0x3c # CHECK: tge $8, $9 0x01 0x28 0x02 0x3c # CHECK: tge $8, $9
0x01 0x28 0x04 0x3c # CHECK: tgeu $8, $9 0x01 0x28 0x04 0x3c # CHECK: tgeu $8, $9
0x01 0x28 0x08 0x3c # CHECK: tlt $8, $9 0x01 0x28 0x08 0x3c # CHECK: tlt $8, $9
0x01 0x28 0x0a 0x3c # CHECK: tltu $8, $9 0x01 0x28 0x0a 0x3c # CHECK: tltu $8, $9
0x01 0x28 0x0c 0x3c # CHECK: tne $8, $9 0x01 0x28 0x0c 0x3c # CHECK: tne $8, $9
0x41 0xc9 0x45 0x67 # CHECK: teqi $9, 17767 0x41 0xc9 0x45 0x67 # CHECK: teqi $9, 17767
0x41 0x29 0x45 0x67 # CHECK: tgei $9, 17767 0x41 0x29 0x45 0x67 # CHECK: tgei $9, 17767
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llvm/trunk/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-el.txt

Show All 18 Lines
0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332 0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332
0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332 0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332
0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332 0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332
0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332 0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332
0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332 0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332
0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332 0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332
0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332 0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332
0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332 0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332
0x40 0x01 0x00 0x00 # CHECK: pause
0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14
0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7
0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14
0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7
0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14
0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7
0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14
0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7
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llvm/trunk/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt

# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+fp64 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+fp64 | FileCheck %s
# Try a mips64* triple to confirm that mips* vs mips64* triples no longer have # Try a mips64* triple to confirm that mips* vs mips64* triples no longer have
# an effect on the disassembler behaviour. # an effect on the disassembler behaviour.
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips32r2 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips32r2 | FileCheck %s
0x00 0x00 0x00 0x00 # CHECK: nop 0x00 0x00 0x00 0x00 # CHECK: nop
0x00 0x00 0x00 0x09 # CHECK: jr $zero 0x00 0x00 0x00 0x09 # CHECK: jr $zero
0x00 0x00 0x00 0x0c # CHECK: syscall 0x00 0x00 0x00 0x0c # CHECK: syscall
0x00 0x00 0x00 0x0d # CHECK: break 0x00 0x00 0x00 0x0d # CHECK: break
0x00 0x00 0x00 0x0f # CHECK: sync 0x00 0x00 0x00 0x0f # CHECK: sync
0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero 0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero
0x00 0x00 0x00 0x40 # CHECK: ssnop 0x00 0x00 0x00 0x40 # CHECK: ssnop
0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2 0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2
0x00 0x00 0x00 0xc0 # CHECK: ehb 0x00 0x00 0x00 0xc0 # CHECK: ehb
0x00 0x00 0x01 0x40 # CHECK: pause
0x00 0x00 0x01 0xcf # CHECK: sync 7 0x00 0x00 0x01 0xcf # CHECK: sync 7
0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero 0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero
0x00 0x00 0x28 0x10 # CHECK: mfhi $5 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
0x00 0x00 0x28 0x12 # CHECK: mflo $5 0x00 0x00 0x28 0x12 # CHECK: mflo $5
0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18 0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18
0x00 0x00 0x72 0x0d # CHECK: break 0, 456 0x00 0x00 0x72 0x0d # CHECK: break 0, 456
0x00 0x00 0x88 0x12 # CHECK: mflo $17 0x00 0x00 0x88 0x12 # CHECK: mflo $17
0x00 0x00 0x98 0x10 # CHECK: mfhi $19 0x00 0x00 0x98 0x10 # CHECK: mfhi $19
▲ Show 20 Lines • Show All 354 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3-el.txt

Show All 15 Lines
0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332 0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332
0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332 0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332
0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332 0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332
0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332 0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332
0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332 0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332
0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332 0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332
0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332 0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332
0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332 0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332
0x40 0x01 0x00 0x00 # CHECK: pause
0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14
0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7
0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14
0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7
0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14
0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7
0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14
0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7
▲ Show 20 Lines • Show All 145 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/Mips/mips32r3/valid-mips32r3.txt

# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r3 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r3 | FileCheck %s
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r3 -mattr=+fp64 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r3 -mattr=+fp64 | FileCheck %s
0x00 0x00 0x00 0x00 # CHECK: nop 0x00 0x00 0x00 0x00 # CHECK: nop
0x00 0x00 0x00 0x09 # CHECK: jr $zero 0x00 0x00 0x00 0x09 # CHECK: jr $zero
0x00 0x00 0x00 0x0c # CHECK: syscall 0x00 0x00 0x00 0x0c # CHECK: syscall
0x00 0x00 0x00 0x0d # CHECK: break 0x00 0x00 0x00 0x0d # CHECK: break
0x00 0x00 0x00 0x0f # CHECK: sync 0x00 0x00 0x00 0x0f # CHECK: sync
0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero 0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero
0x00 0x00 0x00 0x40 # CHECK: ssnop 0x00 0x00 0x00 0x40 # CHECK: ssnop
0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2 0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2
0x00 0x00 0x00 0xc0 # CHECK: ehb 0x00 0x00 0x00 0xc0 # CHECK: ehb
0x00 0x00 0x01 0x40 # CHECK: pause
0x00 0x00 0x01 0xcf # CHECK: sync 7 0x00 0x00 0x01 0xcf # CHECK: sync 7
0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero 0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero
0x00 0x00 0x28 0x10 # CHECK: mfhi $5 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
0x00 0x00 0x28 0x12 # CHECK: mflo $5 0x00 0x00 0x28 0x12 # CHECK: mflo $5
0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18 0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18
0x00 0x00 0x72 0x0d # CHECK: break 0, 456 0x00 0x00 0x72 0x0d # CHECK: break 0, 456
0x00 0x00 0x88 0x12 # CHECK: mflo $17 0x00 0x00 0x88 0x12 # CHECK: mflo $17
0x00 0x00 0x98 0x10 # CHECK: mfhi $19 0x00 0x00 0x98 0x10 # CHECK: mfhi $19
▲ Show 20 Lines • Show All 354 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5-el.txt

Show All 15 Lines
0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332 0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332
0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332 0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332
0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332 0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332
0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332 0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332
0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332 0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332
0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332 0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332
0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332 0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332
0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332 0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332
0x40 0x01 0x00 0x00 # CHECK: pause
0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14
0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7
0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14
0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7
0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14
0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7
0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14
0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7
▲ Show 20 Lines • Show All 145 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5.txt

# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r5 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r5 | FileCheck %s
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r5 -mattr=+fp64 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r5 -mattr=+fp64 | FileCheck %s
0x00 0x00 0x00 0x00 # CHECK: nop 0x00 0x00 0x00 0x00 # CHECK: nop
0x00 0x00 0x00 0x09 # CHECK: jr $zero 0x00 0x00 0x00 0x09 # CHECK: jr $zero
0x00 0x00 0x00 0x0c # CHECK: syscall 0x00 0x00 0x00 0x0c # CHECK: syscall
0x00 0x00 0x00 0x0d # CHECK: break 0x00 0x00 0x00 0x0d # CHECK: break
0x00 0x00 0x00 0x0f # CHECK: sync 0x00 0x00 0x00 0x0f # CHECK: sync
0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero 0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero
0x00 0x00 0x00 0x40 # CHECK: ssnop 0x00 0x00 0x00 0x40 # CHECK: ssnop
0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2 0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2
0x00 0x00 0x00 0xc0 # CHECK: ehb 0x00 0x00 0x00 0xc0 # CHECK: ehb
0x00 0x00 0x01 0x40 # CHECK: pause
0x00 0x00 0x01 0xcf # CHECK: sync 7 0x00 0x00 0x01 0xcf # CHECK: sync 7
0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero 0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero
0x00 0x00 0x28 0x10 # CHECK: mfhi $5 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
0x00 0x00 0x28 0x12 # CHECK: mflo $5 0x00 0x00 0x28 0x12 # CHECK: mflo $5
0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18 0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18
0x00 0x00 0x72 0x0d # CHECK: break 0, 456 0x00 0x00 0x72 0x0d # CHECK: break 0, 456
0x00 0x00 0x88 0x12 # CHECK: mflo $17 0x00 0x00 0x88 0x12 # CHECK: mflo $17
0x00 0x00 0x98 0x10 # CHECK: mfhi $19 0x00 0x00 0x98 0x10 # CHECK: mfhi $19
▲ Show 20 Lines • Show All 355 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt

Show All 11 Lines
0x01 0x00 0x20 0x45 # CHECK: bc1eqz $f0, 8 0x01 0x00 0x20 0x45 # CHECK: bc1eqz $f0, 8
0x01 0x00 0x3f 0x45 # CHECK: bc1eqz $f31, 8 0x01 0x00 0x3f 0x45 # CHECK: bc1eqz $f31, 8
0x01 0x00 0xa0 0x45 # CHECK: bc1nez $f0, 8 0x01 0x00 0xa0 0x45 # CHECK: bc1nez $f0, 8
0x01 0x00 0xbf 0x45 # CHECK: bc1nez $f31, 8 0x01 0x00 0xbf 0x45 # CHECK: bc1nez $f31, 8
0x02 0x00 0x20 0x49 # CHECK: bc2eqz $0, 12 0x02 0x00 0x20 0x49 # CHECK: bc2eqz $0, 12
0x02 0x00 0x3f 0x49 # CHECK: bc2eqz $31, 12 0x02 0x00 0x3f 0x49 # CHECK: bc2eqz $31, 12
0x02 0x00 0xa0 0x49 # CHECK: bc2nez $0, 12 0x02 0x00 0xa0 0x49 # CHECK: bc2nez $0, 12
0x02 0x00 0xbf 0x49 # CHECK: bc2nez $31, 12 0x02 0x00 0xbf 0x49 # CHECK: bc2nez $31, 12
0x40 0x01 0x00 0x00 # CHECK: pause
0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 260 0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 260
0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1336 0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1336
0x40 0x00 0xa6 0x60 # CHECK: bnec $5, $6, 260 0x40 0x00 0xa6 0x60 # CHECK: bnec $5, $6, 260
0xfa 0xff 0x43 0x60 # CHECK: bnec $2, $3, -20 0xfa 0xff 0x43 0x60 # CHECK: bnec $2, $3, -20
0x4d 0x01 0x02 0x60 # CHECK: bnezalc $2, 1336 0x4d 0x01 0x02 0x60 # CHECK: bnezalc $2, 1336
0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72260 0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72260
0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260 0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260
0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20 0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20
▲ Show 20 Lines • Show All 146 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt

# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r6 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r6 | FileCheck %s
0x00 0x00 0x00 0x0e # CHECK: sdbbp 0x00 0x00 0x00 0x0e # CHECK: sdbbp
0x00 0x00 0x00 0x0f # CHECK: sync 0x00 0x00 0x00 0x0f # CHECK: sync
0x00 0x00 0x00 0x40 # CHECK: ssnop 0x00 0x00 0x00 0x40 # CHECK: ssnop
0x00 0x00 0x00 0x4f # CHECK: sync 1 0x00 0x00 0x00 0x4f # CHECK: sync 1
0x00 0x00 0x00 0xc0 # CHECK: ehb
0x00 0x00 0x01 0x40 # CHECK: pause
0x00 0x00 0x08 0x8e # CHECK: sdbbp 34 0x00 0x00 0x08 0x8e # CHECK: sdbbp 34
0x00 0x03 0x00 0x34 # CHECK: teq $zero, $3 0x00 0x03 0x00 0x34 # CHECK: teq $zero, $3
0x00 0x53 0x21 0x72 # CHECK: tlt $2, $19, 133 0x00 0x53 0x21 0x72 # CHECK: tlt $2, $19, 133
0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4 0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4
0x00 0x64 0x10 0x37 # CHECK: selnez $2, $3, $4 0x00 0x64 0x10 0x37 # CHECK: selnez $2, $3, $4
0x00 0x64 0x10 0x98 # CHECK: mul $2, $3, $4 0x00 0x64 0x10 0x98 # CHECK: mul $2, $3, $4
0x00 0x64 0x10 0x99 # CHECK: mulu $2, $3, $4 0x00 0x64 0x10 0x99 # CHECK: mulu $2, $3, $4
0x00 0x64 0x10 0x9a # CHECK: div $2, $3, $4 0x00 0x64 0x10 0x9a # CHECK: div $2, $3, $4
▲ Show 20 Lines • Show All 186 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt

Show All 18 Lines
0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332 0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332
0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332 0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332
0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332 0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332
0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332 0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332
0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332 0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332
0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332 0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332
0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332 0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332
0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332 0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332
0x40 0x01 0x00 0x00 # CHECK: pause
0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14
0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7
0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14
0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7
0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14
0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7
0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14
0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7
▲ Show 20 Lines • Show All 243 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt

# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 | FileCheck %s
# Try a mips* triple to confirm that mips* vs mips64* triples no longer have # Try a mips* triple to confirm that mips* vs mips64* triples no longer have
# an effect on the disassembler behaviour. # an effect on the disassembler behaviour.
# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips64r2 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips64r2 | FileCheck %s
# CHECK: .text # CHECK: .text
0x00 0x00 0x00 0x00 # CHECK: nop 0x00 0x00 0x00 0x00 # CHECK: nop
0x00 0x00 0x00 0x09 # CHECK: jr $zero 0x00 0x00 0x00 0x09 # CHECK: jr $zero
0x00 0x00 0x00 0x0c # CHECK: syscall 0x00 0x00 0x00 0x0c # CHECK: syscall
0x00 0x00 0x00 0x0d # CHECK: break 0x00 0x00 0x00 0x0d # CHECK: break
0x00 0x00 0x00 0x0f # CHECK: sync 0x00 0x00 0x00 0x0f # CHECK: sync
0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero 0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero
0x00 0x00 0x00 0x40 # CHECK: ssnop 0x00 0x00 0x00 0x40 # CHECK: ssnop
0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2 0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2
0x00 0x00 0x00 0xc0 # CHECK: ehb 0x00 0x00 0x00 0xc0 # CHECK: ehb
0x00 0x00 0x01 0x40 # CHECK: pause
0x00 0x00 0x01 0xcf # CHECK: sync 7 0x00 0x00 0x01 0xcf # CHECK: sync 7
0x00 0x00 0x04 0xb8 # CHECK: dsll $zero, $zero, 18 0x00 0x00 0x04 0xb8 # CHECK: dsll $zero, $zero, 18
0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero 0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero
0x00 0x00 0x28 0x10 # CHECK: mfhi $5 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
0x00 0x00 0x28 0x12 # CHECK: mflo $5 0x00 0x00 0x28 0x12 # CHECK: mflo $5
0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18 0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18
▲ Show 20 Lines • Show All 467 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt

Show All 15 Lines
0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332 0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332
0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332 0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332
0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332 0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332
0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332 0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332
0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332 0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332
0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332 0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332
0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332 0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332
0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332 0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332
0x40 0x01 0x00 0x00 # CHECK: pause
0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14
0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7
0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14
0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7
0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14
0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7
0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14
0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7
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llvm/trunk/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt

# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r3 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r3 | FileCheck %s
# CHECK: .text # CHECK: .text
0x00 0x00 0x00 0x00 # CHECK: nop 0x00 0x00 0x00 0x00 # CHECK: nop
0x00 0x00 0x00 0x09 # CHECK: jr $zero 0x00 0x00 0x00 0x09 # CHECK: jr $zero
0x00 0x00 0x00 0x0c # CHECK: syscall 0x00 0x00 0x00 0x0c # CHECK: syscall
0x00 0x00 0x00 0x0d # CHECK: break 0x00 0x00 0x00 0x0d # CHECK: break
0x00 0x00 0x00 0x0f # CHECK: sync 0x00 0x00 0x00 0x0f # CHECK: sync
0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero 0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero
0x00 0x00 0x00 0x40 # CHECK: ssnop 0x00 0x00 0x00 0x40 # CHECK: ssnop
0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2 0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2
0x00 0x00 0x00 0xc0 # CHECK: ehb 0x00 0x00 0x00 0xc0 # CHECK: ehb
0x00 0x00 0x01 0x40 # CHECK: pause
0x00 0x00 0x01 0xcf # CHECK: sync 7 0x00 0x00 0x01 0xcf # CHECK: sync 7
0x00 0x00 0x04 0xb8 # CHECK: dsll $zero, $zero, 18 0x00 0x00 0x04 0xb8 # CHECK: dsll $zero, $zero, 18
0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero 0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero
0x00 0x00 0x28 0x10 # CHECK: mfhi $5 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
0x00 0x00 0x28 0x12 # CHECK: mflo $5 0x00 0x00 0x28 0x12 # CHECK: mflo $5
0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18 0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18
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llvm/trunk/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt

Show All 15 Lines
0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332 0x4c 0x01 0x01 0x45 # CHECK: bc1t 1332
0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332 0x4c 0x01 0x1d 0x45 # CHECK: bc1t $fcc7, 1332
0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332 0x4c 0x01 0x26 0x11 # CHECK: beq $9, $6, 1332
0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332 0x4c 0x01 0xc1 0x04 # CHECK: bgez $6, 1332
0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332 0x4c 0x01 0xd1 0x04 # CHECK: bgezal $6, 1332
0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332 0x4c 0x01 0xc0 0x1c # CHECK: bgtz $6, 1332
0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332 0x4c 0x01 0xc0 0x18 # CHECK: blez $6, 1332
0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332 0x4c 0x01 0x26 0x15 # CHECK: bne $9, $6, 1332
0x40 0x01 0x00 0x00 # CHECK: pause
0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14 0x32 0x60 0x2e 0x46 # CHECK: c.eq.d $f12, $f14
0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7
0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14
0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7
0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14 0x3e 0x60 0x2e 0x46 # CHECK: c.le.d $f12, $f14
0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7
0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14 0x3c 0x60 0x2e 0x46 # CHECK: c.lt.d $f12, $f14
0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7
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llvm/trunk/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt

# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r5 | FileCheck %s # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r5 | FileCheck %s
# CHECK: .text # CHECK: .text
0x00 0x00 0x00 0x00 # CHECK: nop 0x00 0x00 0x00 0x00 # CHECK: nop
0x00 0x00 0x00 0x09 # CHECK: jr $zero 0x00 0x00 0x00 0x09 # CHECK: jr $zero
0x00 0x00 0x00 0x0c # CHECK: syscall 0x00 0x00 0x00 0x0c # CHECK: syscall
0x00 0x00 0x00 0x0d # CHECK: break 0x00 0x00 0x00 0x0d # CHECK: break
0x00 0x00 0x00 0x0f # CHECK: sync 0x00 0x00 0x00 0x0f # CHECK: sync
0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero 0x00 0x00 0x00 0x20 # CHECK: add $zero, $zero, $zero
0x00 0x00 0x00 0x40 # CHECK: ssnop 0x00 0x00 0x00 0x40 # CHECK: ssnop
0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2 0x00 0x00 0x00 0x80 # CHECK: sll $zero, $zero, 2
0x00 0x00 0x00 0xc0 # CHECK: ehb 0x00 0x00 0x00 0xc0 # CHECK: ehb
0x00 0x00 0x01 0x40 # CHECK: pause
0x00 0x00 0x01 0xcf # CHECK: sync 7 0x00 0x00 0x01 0xcf # CHECK: sync 7
0x00 0x00 0x04 0xb8 # CHECK: dsll $zero, $zero, 18 0x00 0x00 0x04 0xb8 # CHECK: dsll $zero, $zero, 18
0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero 0x00 0x00 0x28 0x09 # CHECK: jalr $5, $zero
0x00 0x00 0x28 0x10 # CHECK: mfhi $5 0x00 0x00 0x28 0x10 # CHECK: mfhi $5
0x00 0x00 0x28 0x12 # CHECK: mflo $5 0x00 0x00 0x28 0x12 # CHECK: mflo $5
0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18 0x00 0x00 0x3c 0x80 # CHECK: sll $7, $zero, 18
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llvm/trunk/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt

Show All 11 Lines
0x01 0x00 0x3f 0x45 # CHECK: bc1eqz $f31, 8 0x01 0x00 0x3f 0x45 # CHECK: bc1eqz $f31, 8
0x01 0x00 0xa0 0x45 # CHECK: bc1nez $f0, 8 0x01 0x00 0xa0 0x45 # CHECK: bc1nez $f0, 8
0x01 0x00 0xbf 0x45 # CHECK: bc1nez $f31, 8 0x01 0x00 0xbf 0x45 # CHECK: bc1nez $f31, 8
0x02 0x00 0x20 0x49 # CHECK: bc2eqz $0, 12 0x02 0x00 0x20 0x49 # CHECK: bc2eqz $0, 12
0x02 0x00 0x3f 0x49 # CHECK: bc2eqz $31, 12 0x02 0x00 0x3f 0x49 # CHECK: bc2eqz $31, 12
0x02 0x00 0xa0 0x49 # CHECK: bc2nez $0, 12 0x02 0x00 0xa0 0x49 # CHECK: bc2nez $0, 12
0x02 0x00 0xbf 0x49 # CHECK: bc2nez $31, 12 0x02 0x00 0xbf 0x49 # CHECK: bc2nez $31, 12
0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 260 0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 260
0x40 0x01 0x00 0x00 # CHECK: pause
0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1336 0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1336
0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72260 0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72260
0xfa 0xff 0x5f 0xd8 # CHECK: beqzc $2, -20 0xfa 0xff 0x5f 0xd8 # CHECK: beqzc $2, -20
0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260 0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260
0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20 0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20
0x40 0x00 0x43 0x18 # CHECK: bgeuc $2, $3, 260 0x40 0x00 0x43 0x18 # CHECK: bgeuc $2, $3, 260
0xfa 0xff 0x43 0x18 # CHECK: bgeuc $2, $3, -20 0xfa 0xff 0x43 0x18 # CHECK: bgeuc $2, $3, -20
0x4d 0x01 0x42 0x18 # CHECK: bgezalc $2, 1336 0x4d 0x01 0x42 0x18 # CHECK: bgezalc $2, 1336
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llvm/trunk/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt

# RUN: llvm-mc %s -disassemble -triple=mips-unknown-linux -mcpu=mips64r6 | FileCheck %s # RUN: llvm-mc %s -disassemble -triple=mips-unknown-linux -mcpu=mips64r6 | FileCheck %s
0x00 0x00 0x00 0x0e # CHECK: sdbbp 0x00 0x00 0x00 0x0e # CHECK: sdbbp
0x00 0x00 0x00 0x0f # CHECK: sync 0x00 0x00 0x00 0x0f # CHECK: sync
0x00 0x00 0x00 0x40 # CHECK: ssnop 0x00 0x00 0x00 0x40 # CHECK: ssnop
0x00 0x00 0x00 0x4f # CHECK: sync 1 0x00 0x00 0x00 0x4f # CHECK: sync 1
0x00 0x00 0x00 0xc0 # CHECK: ehb
0x00 0x00 0x01 0x40 # CHECK: pause
0x00 0x00 0x08 0x8e # CHECK: sdbbp 34 0x00 0x00 0x08 0x8e # CHECK: sdbbp 34
0x00 0x03 0x00 0x34 # CHECK: teq $zero, $3 0x00 0x03 0x00 0x34 # CHECK: teq $zero, $3
0x00 0x03 0x10 0x2e # CHECK: dneg $2, $3 0x00 0x03 0x10 0x2e # CHECK: dneg $2, $3
0x00 0x03 0x10 0x2f # CHECK: dnegu $2, $3 0x00 0x03 0x10 0x2f # CHECK: dnegu $2, $3
0x00 0x53 0x21 0x72 # CHECK: tlt $2, $19, 133 0x00 0x53 0x21 0x72 # CHECK: tlt $2, $19, 133
0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4 0x00 0x64 0x10 0x35 # CHECK: seleqz $2, $3, $4
0x00 0x64 0x10 0x37 # CHECK: selnez $2, $3, $4 0x00 0x64 0x10 0x37 # CHECK: selnez $2, $3, $4
0x00 0x64 0x10 0x98 # CHECK: mul $2, $3, $4 0x00 0x64 0x10 0x98 # CHECK: mul $2, $3, $4
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llvm/trunk/test/MC/Mips/mips1/valid.s

Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Linesa:
# CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_W_D32 # CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_W_D32
cvt.w.s $f20,$f24 cvt.w.s $f20,$f24
div $zero,$25,$11 div $zero,$25,$11
div.d $f0, $f2, $f4 # CHECK: div.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x03] div.d $f0, $f2, $f4 # CHECK: div.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x03]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} FDIV_D32 # CHECK-NEXT: # <MCInst #{{[0-9]+}} FDIV_D32
div.s $f4,$f5,$f15 div.s $f4,$f5,$f15
divu $zero,$25,$15 divu $zero,$25,$15
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} EHB
# CHECK-NOT: # <MCInst #{{[0-9]+}} EHB_MM
j 1f # CHECK: j $tmp0 # encoding: [0b000010AA,A,A,A] j 1f # CHECK: j $tmp0 # encoding: [0b000010AA,A,A,A]
# CHECK: # fixup A - offset: 0, value: ($tmp0), kind: fixup_Mips_26 # CHECK: # fixup A - offset: 0, value: ($tmp0), kind: fixup_Mips_26
j a # CHECK: j a # encoding: [0b000010AA,A,A,A] j a # CHECK: j a # encoding: [0b000010AA,A,A,A]
# CHECK: # fixup A - offset: 0, value: a, kind: fixup_Mips_26 # CHECK: # fixup A - offset: 0, value: a, kind: fixup_Mips_26
j 1328 # CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c] j 1328 # CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c]
jal 21100 # CHECK: jal 21100 # encoding: [0x0c,0x00,0x14,0x9b] jal 21100 # CHECK: jal 21100 # encoding: [0x0c,0x00,0x14,0x9b]
lb $24,-14515($10) lb $24,-14515($10)
lbu $8,30195($v1) lbu $8,30195($v1)
▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Linesa:
sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
srl $4, $5 # CHECK: srlv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x06] srl $4, $5 # CHECK: srlv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x06]
srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2] srl $2,$2,7 # CHECK: srl $2, $2, 7 # encoding: [0x00,0x02,0x11,0xc2]
srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] srl $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06] srlv $25,$s4,$a0 # CHECK: srlv $25, $20, $4 # encoding: [0x00,0x94,0xc8,0x06]
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SSNOP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SSNOP_MM
sub $s6,$s3,$12 sub $s6,$s3,$12
sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36] sub $22,$17,-3126 # CHECK: addi $22, $17, 3126 # encoding: [0x22,0x36,0x0c,0x36]
sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90] sub $13,6512 # CHECK: addi $13, $13, -6512 # encoding: [0x21,0xad,0xe6,0x90]
sub.d $f0, $f2, $f4 # CHECK: sub.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x01] sub.d $f0, $f2, $f4 # CHECK: sub.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} FSUB_D32 # CHECK-NEXT: # <MCInst #{{[0-9]+}} FSUB_D32
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22
subu $sp,$s6,$s6 subu $sp,$s6,$s6
sw $ra,-10160($sp) sw $ra,-10160($sp)
swc1 $f6,-8465($24) swc1 $f6,-8465($24)
swc2 $25,24880($s0) # CHECK: swc2 $25, 24880($16) # encoding: [0xea,0x19,0x61,0x30] swc2 $25,24880($s0) # CHECK: swc2 $25, 24880($16) # encoding: [0xea,0x19,0x61,0x30]
swc3 $10,-32265($k0) swc3 $10,-32265($k0)
swl $15,13694($s3) swl $15,13694($s3)
swr $s1,-26590($14) swr $s1,-26590($14)
syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c]
syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
xor $s2,$a0,$s8 xor $s2,$a0,$s8
xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04]
.set at .set at
trunc.w.s $f4,$f6,$4 trunc.w.s $f4,$f6,$4
# CHECK: cfc1 $4, $ra # encoding: [0x44,0x44,0xf8,0x00] # CHECK: cfc1 $4, $ra # encoding: [0x44,0x44,0xf8,0x00]
# CHECK: cfc1 $4, $ra # encoding: [0x44,0x44,0xf8,0x00] # CHECK: cfc1 $4, $ra # encoding: [0x44,0x44,0xf8,0x00]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
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llvm/trunk/test/MC/Mips/mips2/valid.s

Show First 20 Lines • Show All 182 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
Show All 33 Lines

llvm/trunk/test/MC/Mips/mips3/valid.s

# Instructions that are valid # Instructions that are valid
# #
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips3 | FileCheck %s # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -show-inst -mcpu=mips3 | FileCheck %s
a: a:
.set noat .set noat
abs.d $f7,$f25 # CHECK: encoding: abs.d $f7,$f25 # CHECK: encoding:
abs.s $f9,$f16 abs.s $f9,$f16
add $s7,$s2,$a1 add $s7,$s2,$a1
add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48]
add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7]
add.d $f1,$f7,$f29 add.d $f1,$f7,$f29
▲ Show 20 Lines • Show All 225 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
▲ Show 20 Lines • Show All 42 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Mips/mips32/valid.s

Show First 20 Lines • Show All 180 Lines • ▼ Show 20 Linesa:
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
round.w.d $f6,$f4 round.w.d $f6,$f4
round.w.s $f27,$f28 round.w.s $f27,$f28
s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08] s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08]
s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08] s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08]
sb $s6,-19857($14) sb $s6,-19857($14)
sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8] sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8]
sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f] sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf] sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdc1 $f31,30574($13) sdc1 $f31,30574($13)
sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75] sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75]
sgt $4, $5 # CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a] sgt $4, $5 # CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a]
sgt $4, $5, $6 # CHECK: slt $4, $6, $5 # encoding: [0x00,0xc5,0x20,0x2a] sgt $4, $5, $6 # CHECK: slt $4, $6, $5 # encoding: [0x00,0xc5,0x20,0x2a]
sgtu $4, $5 # CHECK: sltu $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2b] sgtu $4, $5 # CHECK: sltu $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2b]
sgtu $4, $5, $6 # CHECK: sltu $4, $6, $5 # encoding: [0x00,0xc5,0x20,0x2b] sgtu $4, $5, $6 # CHECK: sltu $4, $6, $5 # encoding: [0x00,0xc5,0x20,0x2b]
sh $14,-6704($15) sh $14,-6704($15)
sll $4, $5 # CHECK: sllv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x04] sll $4, $5 # CHECK: sllv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x04]
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
Show All 33 Lines

llvm/trunk/test/MC/Mips/mips32r2/valid.s

Show First 20 Lines • Show All 197 Lines • ▼ Show 20 Linesa:
nmsub.s $f1,$f24,$f19,$f4 nmsub.s $f1,$f24,$f19,$f4
nop nop
nor $a3,$zero,$a3 nor $a3,$zero,$a3
not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27] not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27]
not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27] not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27]
or $12,$s0,$sp or $12,$s0,$sp
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04] or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} PAUSE
# CHECK-NOT # <MCInst #{{[0-9}+}} PAUSE_MM
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
# FIXME: Use the code generator in order to print the .set directives # FIXME: Use the code generator in order to print the .set directives
# instead of the instruction printer. # instead of the instruction printer.
rdhwr $sp,$11 # CHECK: .set push rdhwr $sp,$11 # CHECK: .set push
# CHECK-NEXT: .set mips32r2 # CHECK-NEXT: .set mips32r2
# CHECK-NEXT: rdhwr $sp, $11 # CHECK-NEXT: rdhwr $sp, $11
# CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
recip.d $f14,$f6 # CHECK: recip.d $f14, $f6 # encoding: [0x46,0x20,0x33,0x95] recip.d $f14,$f6 # CHECK: recip.d $f14, $f6 # encoding: [0x46,0x20,0x33,0x95]
recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5] recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5]
rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
round.w.d $f6,$f4 round.w.d $f6,$f4
round.w.s $f27,$f28 round.w.s $f27,$f28
rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16] rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16]
rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96] rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96]
s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08] s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08]
s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08] s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08]
sb $s6,-19857($14) sb $s6,-19857($14)
sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8] sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8]
sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f] sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf] sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdc1 $f31,30574($13) sdc1 $f31,30574($13)
sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75] sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75]
sdxc1 $f11,$10($14) sdxc1 $f11,$10($14)
seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20] seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20]
seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20] seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20]
seh $3, $12 # CHECK: seh $3, $12 # encoding: [0x7c,0x0c,0x1e,0x20] seh $3, $12 # CHECK: seh $3, $12 # encoding: [0x7c,0x0c,0x1e,0x20]
seh $3 # CHECK: seh $3, $3 # encoding: [0x7c,0x03,0x1e,0x20] seh $3 # CHECK: seh $3, $3 # encoding: [0x7c,0x03,0x1e,0x20]
sgt $4, $5 # CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a] sgt $4, $5 # CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a]
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
Show All 35 Lines

llvm/trunk/test/MC/Mips/mips32r3/valid.s

Show First 20 Lines • Show All 197 Lines • ▼ Show 20 Linesa:
nmsub.s $f1,$f24,$f19,$f4 nmsub.s $f1,$f24,$f19,$f4
nop nop
nor $a3,$zero,$a3 nor $a3,$zero,$a3
not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27] not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27]
not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27] not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27]
or $12,$s0,$sp or $12,$s0,$sp
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04] or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} PAUSE
# CHECK-NOT # <MCInst #{{[0-9}+}} PAUSE_MM
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
# FIXME: Use the code generator in order to print the .set directives # FIXME: Use the code generator in order to print the .set directives
# instead of the instruction printer. # instead of the instruction printer.
rdhwr $sp,$11 # CHECK: .set push rdhwr $sp,$11 # CHECK: .set push
# CHECK-NEXT: .set mips32r2 # CHECK-NEXT: .set mips32r2
# CHECK-NEXT: rdhwr $sp, $11 # CHECK-NEXT: rdhwr $sp, $11
# CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
recip.d $f14,$f6 # CHECK: recip.d $f14, $f6 # encoding: [0x46,0x20,0x33,0x95] recip.d $f14,$f6 # CHECK: recip.d $f14, $f6 # encoding: [0x46,0x20,0x33,0x95]
recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5] recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5]
rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
round.w.d $f6,$f4 round.w.d $f6,$f4
round.w.s $f27,$f28 round.w.s $f27,$f28
rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16] rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16]
rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96] rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96]
s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08] s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08]
s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08] s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08]
sb $s6,-19857($14) sb $s6,-19857($14)
sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8] sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8]
sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f] sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf] sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdc1 $f31,30574($13) sdc1 $f31,30574($13)
sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75] sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75]
sdxc1 $f11,$10($14) sdxc1 $f11,$10($14)
seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20] seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20]
seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20] seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20]
seh $3, $12 # CHECK: seh $3, $12 # encoding: [0x7c,0x0c,0x1e,0x20] seh $3, $12 # CHECK: seh $3, $12 # encoding: [0x7c,0x0c,0x1e,0x20]
seh $3 # CHECK: seh $3, $3 # encoding: [0x7c,0x03,0x1e,0x20] seh $3 # CHECK: seh $3, $3 # encoding: [0x7c,0x03,0x1e,0x20]
sgt $4, $5 # CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a] sgt $4, $5 # CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a]
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
Show All 35 Lines

llvm/trunk/test/MC/Mips/mips32r5/valid.s

Show First 20 Lines • Show All 198 Lines • ▼ Show 20 Linesa:
nmsub.s $f1,$f24,$f19,$f4 nmsub.s $f1,$f24,$f19,$f4
nop nop
nor $a3,$zero,$a3 nor $a3,$zero,$a3
not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27] not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27]
not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27] not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27]
or $12,$s0,$sp or $12,$s0,$sp
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04] or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} PAUSE
# CHECK-NOT # <MCInst #{{[0-9}+}} PAUSE_MM
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
# FIXME: Use the code generator in order to print the .set directives # FIXME: Use the code generator in order to print the .set directives
# instead of the instruction printer. # instead of the instruction printer.
rdhwr $sp,$11 # CHECK: .set push rdhwr $sp,$11 # CHECK: .set push
# CHECK-NEXT: .set mips32r2 # CHECK-NEXT: .set mips32r2
# CHECK-NEXT: rdhwr $sp, $11 # CHECK-NEXT: rdhwr $sp, $11
# CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
recip.d $f14,$f6 # CHECK: recip.d $f14, $f6 # encoding: [0x46,0x20,0x33,0x95] recip.d $f14,$f6 # CHECK: recip.d $f14, $f6 # encoding: [0x46,0x20,0x33,0x95]
recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5] recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5]
rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
round.w.d $f6,$f4 round.w.d $f6,$f4
round.w.s $f27,$f28 round.w.s $f27,$f28
rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16] rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16]
rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96] rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96]
s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08] s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08]
s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08] s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08]
sb $s6,-19857($14) sb $s6,-19857($14)
sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8] sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8]
sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f] sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf] sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdc1 $f31,30574($13) sdc1 $f31,30574($13)
sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75] sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75]
sdxc1 $f11,$10($14) sdxc1 $f11,$10($14)
seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20] seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20]
seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20] seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20]
seh $3, $12 # CHECK: seh $3, $12 # encoding: [0x7c,0x0c,0x1e,0x20] seh $3, $12 # CHECK: seh $3, $12 # encoding: [0x7c,0x0c,0x1e,0x20]
seh $3 # CHECK: seh $3, $3 # encoding: [0x7c,0x03,0x1e,0x20] seh $3 # CHECK: seh $3, $3 # encoding: [0x7c,0x03,0x1e,0x20]
sgt $4, $5 # CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a] sgt $4, $5 # CHECK: slt $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2a]
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
Show All 35 Lines

llvm/trunk/test/MC/Mips/mips32r6/valid.s

Show First 20 Lines • Show All 134 Lines • ▼ Show 20 Linesa:
msubf.s $f2,$f3,$f4 # CHECK: msubf.s $f2, $f3, $f4 # encoding: [0x46,0x04,0x18,0x99] msubf.s $f2,$f3,$f4 # CHECK: msubf.s $f2, $f3, $f4 # encoding: [0x46,0x04,0x18,0x99]
msubf.d $f2,$f3,$f4 # CHECK: msubf.d $f2, $f3, $f4 # encoding: [0x46,0x24,0x18,0x99] msubf.d $f2,$f3,$f4 # CHECK: msubf.d $f2, $f3, $f4 # encoding: [0x46,0x24,0x18,0x99]
neg $2 # CHECK: neg $2, $2 # encoding: [0x00,0x02,0x10,0x22] neg $2 # CHECK: neg $2, $2 # encoding: [0x00,0x02,0x10,0x22]
neg $2, $3 # CHECK: neg $2, $3 # encoding: [0x00,0x03,0x10,0x22] neg $2, $3 # CHECK: neg $2, $3 # encoding: [0x00,0x03,0x10,0x22]
negu $2 # CHECK: negu $2, $2 # encoding: [0x00,0x02,0x10,0x23] negu $2 # CHECK: negu $2, $2 # encoding: [0x00,0x02,0x10,0x23]
negu $2,$3 # CHECK: negu $2, $3 # encoding: [0x00,0x03,0x10,0x23] negu $2,$3 # CHECK: negu $2, $3 # encoding: [0x00,0x03,0x10,0x23]
not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27] not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27]
not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27] not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} PAUSE
# CHECK-NOT # <MCInst #{{[0-9}+}} PAUSE_MM
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x7c,0xa1,0x04,0x35] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x7c,0xa1,0x04,0x35]
# FIXME: Use the code generator in order to print the .set directives # FIXME: Use the code generator in order to print the .set directives
# instead of the instruction printer. # instead of the instruction printer.
rdhwr $sp,$11 # CHECK: .set push rdhwr $sp,$11 # CHECK: .set push
# CHECK-NEXT: .set mips32r2 # CHECK-NEXT: .set mips32r2
# CHECK-NEXT: rdhwr $sp, $11 # CHECK-NEXT: rdhwr $sp, $11
# CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5] recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5]
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Linesa:
sgtu $4, $5 # CHECK: sltu $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2b] sgtu $4, $5 # CHECK: sltu $4, $5, $4 # encoding: [0x00,0xa4,0x20,0x2b]
sgtu $4, $5, $6 # CHECK: sltu $4, $6, $5 # encoding: [0x00,0xc5,0x20,0x2b] sgtu $4, $5, $6 # CHECK: sltu $4, $6, $5 # encoding: [0x00,0xc5,0x20,0x2b]
sll $4, $5 # CHECK: sllv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x04] sll $4, $5 # CHECK: sllv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x04]
sra $4, $5 # CHECK: srav $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x07] sra $4, $5 # CHECK: srav $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x07]
srl $4, $5 # CHECK: srlv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x06] srl $4, $5 # CHECK: srlv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x06]
ssnop # WARNING: [[@LINE]]:9: warning: ssnop is deprecated for MIPS32r6 and is equivalent to a nop instruction ssnop # WARNING: [[@LINE]]:9: warning: ssnop is deprecated for MIPS32r6 and is equivalent to a nop instruction
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sdbbp # CHECK: sdbbp # encoding: [0x00,0x00,0x00,0x0e] sdbbp # CHECK: sdbbp # encoding: [0x00,0x00,0x00,0x0e]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x00,0x00,0x08,0x8e] sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x00,0x00,0x08,0x8e]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f]
sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f]
syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c]
syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
Show All 26 Lines

llvm/trunk/test/MC/Mips/mips4/valid.s

# Instructions that are valid # Instructions that are valid
# #
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 | FileCheck %s # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -show-inst -mcpu=mips4 | FileCheck %s
a: a:
.set noat .set noat
abs.d $f7,$f25 # CHECK: encoding: abs.d $f7,$f25 # CHECK: encoding:
abs.s $f9,$f16 abs.s $f9,$f16
add $s7,$s2,$a1 add $s7,$s2,$a1
add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48]
add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7]
add.d $f1,$f7,$f29 add.d $f1,$f7,$f29
▲ Show 20 Lines • Show All 286 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
▲ Show 20 Lines • Show All 42 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Mips/mips5/valid.s

# Instructions that are valid # Instructions that are valid
# #
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips5 | FileCheck %s # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -show-inst -mcpu=mips5 | FileCheck %s
a: a:
.set noat .set noat
abs.d $f7,$f25 # CHECK: encoding: abs.d $f7,$f25 # CHECK: encoding:
abs.s $f9,$f16 abs.s $f9,$f16
add $s7,$s2,$a1 add $s7,$s2,$a1
add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48]
add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7]
add.d $f1,$f7,$f29 add.d $f1,$f7,$f29
▲ Show 20 Lines • Show All 288 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
▲ Show 20 Lines • Show All 42 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Mips/mips64/valid.s

# Instructions that are valid # Instructions that are valid
# #
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | FileCheck %s # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -show-inst -mcpu=mips64 | FileCheck %s
a: a:
.set noat .set noat
abs.d $f7,$f25 # CHECK: encoding: abs.d $f7,$f25 # CHECK: encoding:
abs.s $f9,$f16 abs.s $f9,$f16
add $s7,$s2,$a1 add $s7,$s2,$a1
add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48]
add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7]
add.d $f1,$f7,$f29 add.d $f1,$f7,$f29
▲ Show 20 Lines • Show All 306 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
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llvm/trunk/test/MC/Mips/mips64r2/valid.s

# Instructions that are valid # Instructions that are valid
# #
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -show-inst -mcpu=mips64r2 | FileCheck %s
a: a:
.set noat .set noat
abs.d $f7,$f25 # CHECK: encoding: abs.d $f7,$f25 # CHECK: encoding:
abs.s $f9,$f16 abs.s $f9,$f16
add $s7,$s2,$a1 add $s7,$s2,$a1
add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48]
add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7]
add.d $f1,$f7,$f29 add.d $f1,$f7,$f29
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nmsub.s $f1,$f24,$f19,$f4 nmsub.s $f1,$f24,$f19,$f4
nop nop
nor $a3,$zero,$a3 nor $a3,$zero,$a3
not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27] not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27]
not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27] not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27]
or $12,$s0,$sp or $12,$s0,$sp
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04] or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} PAUSE
# CHECK-NOT # <MCInst #{{[0-9}+}} PAUSE_MM
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
# FIXME: Use the code generator in order to print the .set directives # FIXME: Use the code generator in order to print the .set directives
# instead of the instruction printer. # instead of the instruction printer.
rdhwr $sp,$11 # CHECK: .set push rdhwr $sp,$11 # CHECK: .set push
# CHECK-NEXT: .set mips32r2 # CHECK-NEXT: .set mips32r2
# CHECK-NEXT: rdhwr $sp, $11 # CHECK-NEXT: rdhwr $sp, $11
# CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5] recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5]
recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5] recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5]
rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
round.l.d $f12,$f1 round.l.d $f12,$f1
round.l.s $f25,$f5 round.l.s $f25,$f5
round.w.d $f6,$f4 round.w.d $f6,$f4
round.w.s $f27,$f28 round.w.s $f27,$f28
rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16] rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16]
rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96] rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96]
s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08] s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08]
s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08] s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08]
sb $s6,-19857($14) sb $s6,-19857($14)
sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8] sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8]
scd $15,-8243($sp) # CHECK: scd $15, -8243($sp) # encoding: [0xf3,0xaf,0xdf,0xcd] scd $15,-8243($sp) # CHECK: scd $15, -8243($sp) # encoding: [0xf3,0xaf,0xdf,0xcd]
sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f] sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf] sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sd $12,5835($10) sd $12,5835($10)
sdc1 $f31,30574($13) sdc1 $f31,30574($13)
sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75] sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75]
sdl $a3,-20961($s8) sdl $a3,-20961($s8)
sdr $11,-20423($12) sdr $11,-20423($12)
sdxc1 $f11,$10($14) sdxc1 $f11,$10($14)
seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20] seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20]
seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20] seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20]
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teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
▲ Show 20 Lines • Show All 44 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Mips/mips64r3/valid.s

# Instructions that are valid # Instructions that are valid
# #
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r3 | FileCheck %s # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -show-inst -mcpu=mips64r3 | FileCheck %s
a: a:
.set noat .set noat
abs.d $f7,$f25 # CHECK: encoding: abs.d $f7,$f25 # CHECK: encoding:
abs.s $f9,$f16 abs.s $f9,$f16
add $s7,$s2,$a1 add $s7,$s2,$a1
add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48]
add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7]
add.d $f1,$f7,$f29 add.d $f1,$f7,$f29
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nmsub.s $f1,$f24,$f19,$f4 nmsub.s $f1,$f24,$f19,$f4
nop nop
nor $a3,$zero,$a3 nor $a3,$zero,$a3
not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27] not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27]
not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27] not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27]
or $12,$s0,$sp or $12,$s0,$sp
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04] or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} PAUSE
# CHECK-NOT # <MCInst #{{[0-9}+}} PAUSE_MM
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
# FIXME: Use the code generator in order to print the .set directives # FIXME: Use the code generator in order to print the .set directives
# instead of the instruction printer. # instead of the instruction printer.
rdhwr $sp,$11 # CHECK: .set push rdhwr $sp,$11 # CHECK: .set push
# CHECK-NEXT: .set mips32r2 # CHECK-NEXT: .set mips32r2
# CHECK-NEXT: rdhwr $sp, $11 # CHECK-NEXT: rdhwr $sp, $11
# CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5] recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5]
recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5] recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5]
rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
round.l.d $f12,$f1 round.l.d $f12,$f1
round.l.s $f25,$f5 round.l.s $f25,$f5
round.w.d $f6,$f4 round.w.d $f6,$f4
round.w.s $f27,$f28 round.w.s $f27,$f28
rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16] rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16]
rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96] rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96]
s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08] s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08]
s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08] s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08]
sb $s6,-19857($14) sb $s6,-19857($14)
sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8] sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8]
scd $15,-8243($sp) # CHECK: scd $15, -8243($sp) # encoding: [0xf3,0xaf,0xdf,0xcd] scd $15,-8243($sp) # CHECK: scd $15, -8243($sp) # encoding: [0xf3,0xaf,0xdf,0xcd]
sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f] sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf] sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sd $12,5835($10) sd $12,5835($10)
sdc1 $f31,30574($13) sdc1 $f31,30574($13)
sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75] sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75]
sdl $a3,-20961($s8) sdl $a3,-20961($s8)
sdr $11,-20423($12) sdr $11,-20423($12)
sdxc1 $f11,$10($14) sdxc1 $f11,$10($14)
seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20] seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20]
seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20] seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20]
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Linesa:
teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
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llvm/trunk/test/MC/Mips/mips64r5/valid.s

# Instructions that are valid # Instructions that are valid
# #
# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r5 | FileCheck %s # RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -show-inst -mcpu=mips64r5 | FileCheck %s
a: a:
.set noat .set noat
abs.d $f7,$f25 # CHECK: encoding: abs.d $f7,$f25 # CHECK: encoding:
abs.s $f9,$f16 abs.s $f9,$f16
add $s7,$s2,$a1 add $s7,$s2,$a1
add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48] add $9,$14,15176 # CHECK: addi $9, $14, 15176 # encoding: [0x21,0xc9,0x3b,0x48]
add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7] add $24,-7193 # CHECK: addi $24, $24, -7193 # encoding: [0x23,0x18,0xe3,0xe7]
add.d $f1,$f7,$f29 add.d $f1,$f7,$f29
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nmsub.s $f1,$f24,$f19,$f4 nmsub.s $f1,$f24,$f19,$f4
nop nop
nor $a3,$zero,$a3 nor $a3,$zero,$a3
not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27] not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27]
not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27] not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27]
or $12,$s0,$sp or $12,$s0,$sp
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04] or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} PAUSE
# CHECK-NOT # <MCInst #{{[0-9}+}} PAUSE_MM
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
# FIXME: Use the code generator in order to print the .set directives # FIXME: Use the code generator in order to print the .set directives
# instead of the instruction printer. # instead of the instruction printer.
rdhwr $sp,$11 # CHECK: .set push rdhwr $sp,$11 # CHECK: .set push
# CHECK-NEXT: .set mips32r2 # CHECK-NEXT: .set mips32r2
# CHECK-NEXT: rdhwr $sp, $11 # CHECK-NEXT: rdhwr $sp, $11
# CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5] recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5]
recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5] recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5]
rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2] rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2] rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46] rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
round.l.d $f12,$f1 round.l.d $f12,$f1
round.l.s $f25,$f5 round.l.s $f25,$f5
round.w.d $f6,$f4 round.w.d $f6,$f4
round.w.s $f27,$f28 round.w.s $f27,$f28
rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16] rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16]
rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96] rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96]
s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08] s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08]
s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08] s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08]
sb $s6,-19857($14) sb $s6,-19857($14)
sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8] sc $15,18904($s3) # CHECK: sc $15, 18904($19) # encoding: [0xe2,0x6f,0x49,0xd8]
scd $15,-8243($sp) # CHECK: scd $15, -8243($sp) # encoding: [0xf3,0xaf,0xdf,0xcd] scd $15,-8243($sp) # CHECK: scd $15, -8243($sp) # encoding: [0xf3,0xaf,0xdf,0xcd]
sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f] sdbbp # CHECK: sdbbp # encoding: [0x70,0x00,0x00,0x3f]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf] sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x70,0x00,0x08,0xbf]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sd $12,5835($10) sd $12,5835($10)
sdc1 $f31,30574($13) sdc1 $f31,30574($13)
sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75] sdc2 $20,23157($s2) # CHECK: sdc2 $20, 23157($18) # encoding: [0xfa,0x54,0x5a,0x75]
sdl $a3,-20961($s8) sdl $a3,-20961($s8)
sdr $11,-20423($12) sdr $11,-20423($12)
sdxc1 $f11,$10($14) sdxc1 $f11,$10($14)
seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20] seb $25, $15 # CHECK: seb $25, $15 # encoding: [0x7c,0x0f,0xcc,0x20]
seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20] seb $25 # CHECK: seb $25, $25 # encoding: [0x7c,0x19,0xcc,0x20]
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teqi $s5,-17504 teqi $s5,-17504
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06] tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
tlti $14,-21059 tlti $14,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33] tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33] tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36]
tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76]
▲ Show 20 Lines • Show All 43 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Mips/mips64r6/valid.s

# Instructions that are valid # Instructions that are valid
# #
# Branches have some unusual encoding rules in MIPS32r6 so we need to test: # Branches have some unusual encoding rules in MIPS32r6 so we need to test:
# rs == 0 # rs == 0
# rs != 0 # rs != 0
# rt == 0 # rt == 0
# rt != 0 # rt != 0
# rs < rt # rs < rt
# rs == rt # rs == rt
# rs > rt # rs > rt
# appropriately for each branch instruction # appropriately for each branch instruction
# #
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r6 2> %t0 | FileCheck %s # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -show-inst -mcpu=mips64r6 2> %t0 | FileCheck %s
# RUN: FileCheck %s -check-prefix=WARNING < %t0 # RUN: FileCheck %s -check-prefix=WARNING < %t0
a: a:
.set noat .set noat
# FIXME: Add the instructions carried forward from older ISA's # FIXME: Add the instructions carried forward from older ISA's
addiupc $4, 100 # CHECK: lapc $4, 100 # encoding: [0xec,0x80,0x00,0x19] addiupc $4, 100 # CHECK: lapc $4, 100 # encoding: [0xec,0x80,0x00,0x19]
addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a] addu $9,10 # CHECK: addiu $9, $9, 10 # encoding: [0x25,0x29,0x00,0x0a]
align $4, $2, $3, 2 # CHECK: align $4, $2, $3, 2 # encoding: [0x7c,0x43,0x22,0xa0] align $4, $2, $3, 2 # CHECK: align $4, $2, $3, 2 # encoding: [0x7c,0x43,0x22,0xa0]
aluipc $3, 56 # CHECK: aluipc $3, 56 # encoding: [0xec,0x7f,0x00,0x38] aluipc $3, 56 # CHECK: aluipc $3, 56 # encoding: [0xec,0x7f,0x00,0x38]
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mulu $2,$3,$4 # CHECK: mulu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x99] mulu $2,$3,$4 # CHECK: mulu $2, $3, $4 # encoding: [0x00,0x64,0x10,0x99]
neg $2 # CHECK: neg $2, $2 # encoding: [0x00,0x02,0x10,0x22] neg $2 # CHECK: neg $2, $2 # encoding: [0x00,0x02,0x10,0x22]
neg $2, $3 # CHECK: neg $2, $3 # encoding: [0x00,0x03,0x10,0x22] neg $2, $3 # CHECK: neg $2, $3 # encoding: [0x00,0x03,0x10,0x22]
negu $2 # CHECK: negu $2, $2 # encoding: [0x00,0x02,0x10,0x23] negu $2 # CHECK: negu $2, $2 # encoding: [0x00,0x02,0x10,0x23]
negu $2,$3 # CHECK: negu $2, $3 # encoding: [0x00,0x03,0x10,0x23] negu $2,$3 # CHECK: negu $2, $3 # encoding: [0x00,0x03,0x10,0x23]
not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27] not $3, $4 # CHECK: not $3, $4 # encoding: [0x00,0x80,0x18,0x27]
not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27] not $3 # CHECK: not $3, $3 # encoding: [0x00,0x60,0x18,0x27]
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04] or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} PAUSE
# CHECK-NOT # <MCInst #{{[0-9}+}} PAUSE_MM
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x7c,0xa1,0x04,0x35] pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x7c,0xa1,0x04,0x35]
# FIXME: Use the code generator in order to print the .set directives # FIXME: Use the code generator in order to print the .set directives
# instead of the instruction printer. # instead of the instruction printer.
rdhwr $sp,$11 # CHECK: .set push rdhwr $sp,$11 # CHECK: .set push
# CHECK-NEXT: .set mips32r2 # CHECK-NEXT: .set mips32r2
# CHECK-NEXT: rdhwr $sp, $11 # CHECK-NEXT: rdhwr $sp, $11
# CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5] recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5]
recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5] recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5]
rint.d $f2, $f4 # CHECK: rint.d $f2, $f4 # encoding: [0x46,0x20,0x20,0x9a] rint.d $f2, $f4 # CHECK: rint.d $f2, $f4 # encoding: [0x46,0x20,0x20,0x9a]
rint.s $f2, $f4 # CHECK: rint.s $f2, $f4 # encoding: [0x46,0x00,0x20,0x9a] rint.s $f2, $f4 # CHECK: rint.s $f2, $f4 # encoding: [0x46,0x00,0x20,0x9a]
rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16] rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16]
rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96] rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96]
s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08] s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08]
s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08] s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08]
sc $15,-40($s3) # CHECK: sc $15, -40($19) # encoding: [0x7e,0x6f,0xec,0x26] sc $15,-40($s3) # CHECK: sc $15, -40($19) # encoding: [0x7e,0x6f,0xec,0x26]
scd $15,-51($sp) # CHECK: scd $15, -51($sp) # encoding: [0x7f,0xaf,0xe6,0xa7] scd $15,-51($sp) # CHECK: scd $15, -51($sp) # encoding: [0x7f,0xaf,0xe6,0xa7]
sdbbp # CHECK: sdbbp # encoding: [0x00,0x00,0x00,0x0e] sdbbp # CHECK: sdbbp # encoding: [0x00,0x00,0x00,0x0e]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x00,0x00,0x08,0x8e] sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x00,0x00,0x08,0x8e]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} SDBBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} SDBBP_MM
sdc2 $20,629($s2) # CHECK: sdc2 $20, 629($18) # encoding: [0x49,0xf4,0x92,0x75] sdc2 $20,629($s2) # CHECK: sdc2 $20, 629($18) # encoding: [0x49,0xf4,0x92,0x75]
sel.d $f0,$f1,$f2 # CHECK: sel.d $f0, $f1, $f2 # encoding: [0x46,0x22,0x08,0x10] sel.d $f0,$f1,$f2 # CHECK: sel.d $f0, $f1, $f2 # encoding: [0x46,0x22,0x08,0x10]
sel.s $f0,$f1,$f2 # CHECK: sel.s $f0, $f1, $f2 # encoding: [0x46,0x02,0x08,0x10] sel.s $f0,$f1,$f2 # CHECK: sel.s $f0, $f1, $f2 # encoding: [0x46,0x02,0x08,0x10]
seleqz $2,$3,$4 # CHECK: seleqz $2, $3, $4 # encoding: [0x00,0x64,0x10,0x35] seleqz $2,$3,$4 # CHECK: seleqz $2, $3, $4 # encoding: [0x00,0x64,0x10,0x35]
seleqz.d $f0, $f2, $f4 # CHECK: seleqz.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x14] seleqz.d $f0, $f2, $f4 # CHECK: seleqz.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x14]
seleqz.s $f0, $f2, $f4 # CHECK: seleqz.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x14] seleqz.s $f0, $f2, $f4 # CHECK: seleqz.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x14]
selnez $2,$3,$4 # CHECK: selnez $2, $3, $4 # encoding: [0x00,0x64,0x10,0x37] selnez $2,$3,$4 # CHECK: selnez $2, $3, $4 # encoding: [0x00,0x64,0x10,0x37]
selnez.d $f0, $f2, $f4 # CHECK: selnez.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x17] selnez.d $f0, $f2, $f4 # CHECK: selnez.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x17]
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srl $4, $5 # CHECK: srlv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x06] srl $4, $5 # CHECK: srlv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x06]
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
ssnop # WARNING: [[@LINE]]:9: warning: ssnop is deprecated for MIPS64r6 and is equivalent to a nop instruction ssnop # WARNING: [[@LINE]]:9: warning: ssnop is deprecated for MIPS64r6 and is equivalent to a nop instruction
swc2 $25,304($s0) # CHECK: swc2 $25, 304($16) # encoding: [0x49,0x79,0x81,0x30] swc2 $25,304($s0) # CHECK: swc2 $25, 304($16) # encoding: [0x49,0x79,0x81,0x30]
sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f]
sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f]
syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c]
syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c]
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBP
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBP_MM
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBR_MM
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWI
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWI_MM
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
# CHECK-NEXT: # <MCInst #{{[0-9]+}} TLBWR
# CHECK-NOT: # <MCInst #{{[0-9]+}} TLBWR_MM
teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34]
teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34]
tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30]
tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30]
tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1] tgeu $20,$14,379 # CHECK: tgeu $20, $14, 379 # encoding: [0x02,0x8e,0x5e,0xf1]
tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31] tgeu $22,$28 # CHECK: tgeu $22, $gp # encoding: [0x02,0xdc,0x00,0x31]
tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32] tlt $15,$13 # CHECK: tlt $15, $13 # encoding: [0x01,0xed,0x00,0x32]
tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72] tlt $2,$19,133 # CHECK: tlt $2, $19, 133 # encoding: [0x00,0x53,0x21,0x72]
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