[Thumb] Handle addressing mode AddrMode5FP16
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Authored by SjoerdMeijer on Feb 12 2018, 3:49 AM.

Details

Summary

This addressing mode wasn't checked, so we were running in an assert.

Diff Detail

Repository
rL LLVM
SjoerdMeijer created this revision.Feb 12 2018, 3:49 AM
olista01 added inline comments.Feb 12 2018, 9:53 AM
lib/Target/ARM/Thumb2InstrInfo.cpp
611 ↗(On Diff #133829)

Why is this multiplied by 4, and not 2?

test/CodeGen/ARM/fp16-instructions.ll
708 ↗(On Diff #133829)

There is a half-precision load in the IR, does this generate a vldr.16? if so, we should be checking that.

715 ↗(On Diff #133829)

This test will be fragile WRT changes in stack layout, so we should use a regex for the offset.

Thanks for the review. Feedback addressed.

olista01 accepted this revision.Feb 13 2018, 1:53 AM

LGTM, thanks

This revision is now accepted and ready to land.Feb 13 2018, 1:53 AM
This revision was automatically updated to reflect the committed changes.