[X86] Make foldLogicOfSetCCs work better for vectors pre legal types/operations

[craig.topper]

Summary

There's a check in the code to only check getSetCCResultType after LegalOperations or if the type is MVT::i1. But the i1 check is only allowing scalar types through. I think it should check that the scalar type is MVT::i1 so that it will work for vectors.

The changed test already does this combine with AVX512VL where getSetCCResultType returns vXi1. But with avx512f and no VLX getSetCCResultType returns a type matching the width of the input type.

[spatel]

LGTM.

llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

assert(LL.getValueType() == LR.getValueType() &&
          RL.getValueType() == RR.getValueType() &&
          "Unexpected operand types for setcc");
 
   // If we're here post-legalization or the logic op type is not i1, the logic
   // op type must match a setcc result type. Also, all folds require new
   // operations on the left and right operands, so those types must match.
   EVT VT = N0.getValueType();
   EVT OpVT = LL.getValueType();
-  if (LegalOperations || VT != MVT::i1)
+  if (LegalOperations || VT.getScalarType() != MVT::i1)
     if (VT != getSetCCResultType(OpVT))
       return SDValue();
   if (OpVT != RL.getValueType())
     return SDValue();
 
   ISD::CondCode CC0 = cast<CondCodeSDNode>(N0CC)->get();
   ISD::CondCode CC1 = cast<CondCodeSDNode>(N1CC)->get();
   bool IsInteger = OpVT.isInteger();

llvm/trunk/test/CodeGen/X86/avx512vl-vec-cmp.ll

 ; VLX-NEXT:    vptestnmd %ymm0, %ymm0, %k1
 ; VLX-NEXT:    vpblendmd %ymm2, %ymm3, %ymm0 {%k1}
 ; VLX-NEXT:    retq
 ;
 ; NoVLX-LABEL: testnm_and:
 ; NoVLX:       # %bb.0:
 ; NoVLX-NEXT:    # kill: def %ymm3 killed %ymm3 def %zmm3
 ; NoVLX-NEXT:    # kill: def %ymm2 killed %ymm2 def %zmm2
-; NoVLX-NEXT:    # kill: def %ymm1 killed %ymm1 def %zmm1
-; NoVLX-NEXT:    # kill: def %ymm0 killed %ymm0 def %zmm0
+; NoVLX-NEXT:    vpor %ymm1, %ymm0, %ymm0
 ; NoVLX-NEXT:    vptestnmd %zmm0, %zmm0, %k1
-; NoVLX-NEXT:    vptestnmd %zmm1, %zmm1, %k1 {%k1}
 ; NoVLX-NEXT:    vpblendmd %zmm2, %zmm3, %zmm0 {%k1}
 ; NoVLX-NEXT:    # kill: def %ymm0 killed %ymm0 killed %zmm0
 ; NoVLX-NEXT:    retq
   %c = icmp eq <8 x i32> %a, zeroinitializer
   %d = icmp eq <8 x i32> %b, zeroinitializer
   %e = and <8 x i1> %c, %d
   %z = select <8 x i1> %e, <8 x i32> %x, <8 x i32> %y
   ret <8 x i32> %z
 }