[DAGCombiner] Add a DAG combine to turn a splat build_vector where the splat elemnt is a bitcast from a vector type into a concat_vector

[craig.topper]

Summary

For example, a build_vector of i64 bitcasted from v2i32 can be turned into a concat_vectors of the v2i32 vectors with a bitcast to a vXi64 type.

[spatel]

Can you upload again with context?

Do you know if we can declare victory over PR34716 after this?
https://bugs.llvm.org/show_bug.cgi?id=34716

[RKSimon]

In D42090#977125, @spatel wrote:

Can you upload again with context?

Do you know if we can declare victory over PR34716 after this?
https://bugs.llvm.org/show_bug.cgi?id=34716

We still need to fix the missed load folding on that one.

[RKSimon]

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

14952 ↗

(On Diff #129913)

Also, should this be limited to before LegalOperations in case a backend is trying to do this in reverse?

[craig.topper]

With context this time.

[spatel]

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

14950–14951 ↗

(On Diff #130094)

Add a formula in the comment to describe the transform?
build_vector [ bitcast (Splat0), bitcast (Splat0), ...] --> bitcast (concat_vectors Splat0)

14953 ↗

(On Diff #130094)

Might want to use 'peekThroughBitcast' here...although that reminds me that I still need to figure out if we can remove the loop in there yet.

14952 ↗

(On Diff #129913)

That sounds right. I think this is wrong frequently, but nobody notices because it's not exposed in regression tests for in-tree targets. Another option - if we do want to run this after legalization - would be to check if the CONCAT is legal or custom before creating it?

[craig.topper]

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

14953 ↗

(On Diff #130094)

I thought about that, but I would have to still verify that at least one bitcast had existed. My assumption is that if there were multiple bitcasts, they would be combined and cause this user to get re-evaluated right?

[spatel]

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

14953 ↗

(On Diff #130094)

You can't have a build vector of vectors, so I think there has to be a bitcast in order for the isVector() to match.

Multiple bitcasts should get folded, but last time I removed the loop from 'peekThroughBitcasts', I saw regressions. I guess this a consequence of not running to fix-point...you're never quite sure what will get combined. :)

Either way is ok here I think.

[craig.topper]

Address review comments.

[RKSimon]

LGTM

llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 
 SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
   EVT VT = N->getValueType(0);
 
   // A vector built entirely of undefs is undef.
   if (ISD::allOperandsUndef(N))
     return DAG.getUNDEF(VT);
 
+  // If this is a splat of a bitcast from another vector, change to a
+  // concat_vector.
+  // For example:
+  //   (build_vector (i64 (bitcast (v2i32 X))), (i64 (bitcast (v2i32 X)))) ->
+  //     (v2i64 (bitcast (concat_vectors (v2i32 X), (v2i32 X))))
+  //
+  // If X is a build_vector itself, the concat can become a larger build_vector.
+  // TODO: Maybe this is useful for non-splat too?
+  if (!LegalOperations) {
+    if (SDValue Splat = cast<BuildVectorSDNode>(N)->getSplatValue()) {
+      Splat = peekThroughBitcast(Splat);
+      EVT SrcVT = Splat.getValueType();
+      if (SrcVT.isVector()) {
+        unsigned NumElts = N->getNumOperands() * SrcVT.getVectorNumElements();
+        EVT NewVT = EVT::getVectorVT(*DAG.getContext(),
+                                     SrcVT.getVectorElementType(), NumElts);
+        SmallVector<SDValue, 8> Ops(N->getNumOperands(), Splat);
+        SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), NewVT, Ops);
+        return DAG.getBitcast(VT, Concat);
+      }
+    }
+  }
+
   // Check if we can express BUILD VECTOR via subvector extract.
   if (!LegalTypes && (N->getNumOperands() > 1)) {
     SDValue Op0 = N->getOperand(0);
     auto checkElem = [&](SDValue Op) -> uint64_t {
       if ((Op.getOpcode() == ISD::EXTRACT_VECTOR_ELT) &&
           (Op0.getOperand(0) == Op.getOperand(0)))
         if (auto CNode = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
           return CNode->getZExtValue();

llvm/trunk/test/CodeGen/X86/insertelement-shuffle.ll

 }
 
 ; PR34716 - https://bugs.llvm.org/show_bug.cgi?id=34716
 ; Special case: if we're inserting into an undef vector, we can optimize more.
 
 define <8 x i64> @insert_subvector_into_undef(i32 %x0, i32 %x1) nounwind {
 ; X32_AVX256-LABEL: insert_subvector_into_undef:
 ; X32_AVX256:       # %bb.0:
-; X32_AVX256-NEXT:    pushl %ebp
-; X32_AVX256-NEXT:    movl %esp, %ebp
-; X32_AVX256-NEXT:    andl $-8, %esp
-; X32_AVX256-NEXT:    subl $8, %esp
-; X32_AVX256-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
-; X32_AVX256-NEXT:    vmovlps %xmm0, (%esp)
 ; X32_AVX256-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
 ; X32_AVX256-NEXT:    vbroadcastsd %xmm0, %ymm0
 ; X32_AVX256-NEXT:    vmovaps %ymm0, %ymm1
-; X32_AVX256-NEXT:    movl %ebp, %esp
-; X32_AVX256-NEXT:    popl %ebp
 ; X32_AVX256-NEXT:    retl
 ;
 ; X64_AVX256-LABEL: insert_subvector_into_undef:
 ; X64_AVX256:       # %bb.0:
 ; X64_AVX256-NEXT:    vmovd %edi, %xmm0
 ; X64_AVX256-NEXT:    vpinsrd $1, %esi, %xmm0, %xmm0
 ; X64_AVX256-NEXT:    vpbroadcastq %xmm0, %ymm0
 ; X64_AVX256-NEXT:    vmovdqa %ymm0, %ymm1