[X86] Use ANY_EXTEND instead of SIGN_EXTEND in lowerMasksToReg

[craig.topper]

Summary

Currently we use SIGN_EXTEND in lowerMasksToReg as part of calling convention setup, but we don't require a specific for the upper bits.

This patch changes it to ANY_EXTEND which will be lowered as SIGN_EXTEND if it ends up sticking around.

[delena]

+ minor comment

lib/Target/X86/X86ISelLowering.cpp

2176

remove the "else", please.

[craig.topper]

Fixed in r321746

lib/Target/X86/X86ISelLowering.cpp

if ((ValVT == MVT::v8i1 && (ValLoc == MVT::i8 || ValLoc == MVT::i32)) ||
     if (ValLoc == MVT::i32)
       ValToCopy = DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValToCopy);
     return ValToCopy;
   } else if ((ValVT == MVT::v32i1 && ValLoc == MVT::i32) ||
              (ValVT == MVT::v64i1 && ValLoc == MVT::i64)) {
     // One stage lowering is required
     // bitcast:   v32i1 -> i32 / v64i1 -> i64
     return DAG.getBitcast(ValLoc, ValArg);
   } else
-    return DAG.getNode(ISD::SIGN_EXTEND, Dl, ValLoc, ValArg);
+    return DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValArg);
 }
 
 /// Breaks v64i1 value into two registers and adds the new node to the DAG
 static void Passv64i1ArgInRegs(
     const SDLoc &Dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg,
     SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, CCValAssign &VA,
     CCValAssign &NextVA, const X86Subtarget &Subtarget) {
   assert(Subtarget.hasBWI() && "Expected AVX512BW target!");

test/CodeGen/X86/avx512-calling-conv.ll

 ; KNL_X32-NEXT:    vxorps %xmm0, %xmm0, %xmm0
 ; KNL_X32-NEXT:    retl
   ret <16 x i1> zeroinitializer
 }
 
 define <16 x i1> @test2(<16 x i1>%a, <16 x i1>%b) {
 ; ALL_X64-LABEL: test2:
 ; ALL_X64:       ## %bb.0:
-; ALL_X64-NEXT:    vpand %xmm1, %xmm0, %xmm0
-; ALL_X64-NEXT:    vpsllw $7, %xmm0, %xmm0
-; ALL_X64-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
-; ALL_X64-NEXT:    vpxor %xmm1, %xmm1, %xmm1
-; ALL_X64-NEXT:    vpcmpgtb %xmm0, %xmm1, %xmm0
+; ALL_X64-NEXT:    vandps %xmm1, %xmm0, %xmm0
 ; ALL_X64-NEXT:    retq
 ;
 ; KNL_X32-LABEL: test2:
 ; KNL_X32:       ## %bb.0:
-; KNL_X32-NEXT:    vpand %xmm1, %xmm0, %xmm0
-; KNL_X32-NEXT:    vpsllw $7, %xmm0, %xmm0
-; KNL_X32-NEXT:    vpand LCPI1_0, %xmm0, %xmm0
-; KNL_X32-NEXT:    vpxor %xmm1, %xmm1, %xmm1
-; KNL_X32-NEXT:    vpcmpgtb %xmm0, %xmm1, %xmm0
+; KNL_X32-NEXT:    vandps %xmm1, %xmm0, %xmm0
 ; KNL_X32-NEXT:    retl
   %c = and <16 x i1>%a, %b
   ret <16 x i1> %c
 }
 
 define <8 x i1> @test3(<8 x i1>%a, <8 x i1>%b) {
 ; ALL_X64-LABEL: test3:
 ; ALL_X64:       ## %bb.0:
-; ALL_X64-NEXT:    vpand %xmm1, %xmm0, %xmm0
-; ALL_X64-NEXT:    vpsllw $15, %xmm0, %xmm0
-; ALL_X64-NEXT:    vpsraw $15, %xmm0, %xmm0
+; ALL_X64-NEXT:    vandps %xmm1, %xmm0, %xmm0
 ; ALL_X64-NEXT:    retq
 ;
 ; KNL_X32-LABEL: test3:
 ; KNL_X32:       ## %bb.0:
-; KNL_X32-NEXT:    vpand %xmm1, %xmm0, %xmm0
-; KNL_X32-NEXT:    vpsllw $15, %xmm0, %xmm0
-; KNL_X32-NEXT:    vpsraw $15, %xmm0, %xmm0
+; KNL_X32-NEXT:    vandps %xmm1, %xmm0, %xmm0
 ; KNL_X32-NEXT:    retl
   %c = and <8 x i1>%a, %b
   ret <8 x i1> %c
 }
 
 define <4 x i1> @test4(<4 x i1>%a, <4 x i1>%b) {
-; KNL-LABEL: test4:
-; KNL:       ## %bb.0:
-; KNL-NEXT:    vandps %xmm1, %xmm0, %xmm0
-; KNL-NEXT:    retq
-;
-; SKX-LABEL: test4:
-; SKX:       ## %bb.0:
-; SKX-NEXT:    vpand %xmm1, %xmm0, %xmm0
-; SKX-NEXT:    vpslld $31, %xmm0, %xmm0
-; SKX-NEXT:    vpsrad $31, %xmm0, %xmm0
-; SKX-NEXT:    retq
+; ALL_X64-LABEL: test4:
+; ALL_X64:       ## %bb.0:
+; ALL_X64-NEXT:    vandps %xmm1, %xmm0, %xmm0
+; ALL_X64-NEXT:    retq
 ;
 ; KNL_X32-LABEL: test4:
 ; KNL_X32:       ## %bb.0:
 ; KNL_X32-NEXT:    vandps %xmm1, %xmm0, %xmm0
 ; KNL_X32-NEXT:    retl
   %c = and <4 x i1>%a, %b
   ret <4 x i1> %c
 }

 ; KNL-LABEL: test7a:
 ; KNL:       ## %bb.0:
 ; KNL-NEXT:    pushq %rax
 ; KNL-NEXT:    .cfi_def_cfa_offset 16
 ; KNL-NEXT:    vpcmpgtd %ymm1, %ymm0, %ymm0
 ; KNL-NEXT:    vpmovdw %zmm0, %ymm0
 ; KNL-NEXT:    ## kill: def %xmm0 killed %xmm0 killed %ymm0
 ; KNL-NEXT:    callq _func8xi1
-; KNL-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
-; KNL-NEXT:    vpsllw $15, %xmm0, %xmm0
-; KNL-NEXT:    vpsraw $15, %xmm0, %xmm0
+; KNL-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
 ; KNL-NEXT:    popq %rax
 ; KNL-NEXT:    retq
 ;
 ; SKX-LABEL: test7a:
 ; SKX:       ## %bb.0:
 ; SKX-NEXT:    pushq %rax
 ; SKX-NEXT:    .cfi_def_cfa_offset 16
 ; SKX-NEXT:    vpcmpgtd %ymm1, %ymm0, %k0
 ; SKX-NEXT:    vpmovm2w %k0, %xmm0
 ; SKX-NEXT:    vzeroupper
 ; SKX-NEXT:    callq _func8xi1
 ; SKX-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
-; SKX-NEXT:    vpsllw $15, %xmm0, %xmm0
-; SKX-NEXT:    vpsraw $15, %xmm0, %xmm0
 ; SKX-NEXT:    popq %rax
 ; SKX-NEXT:    retq
 ;
 ; KNL_X32-LABEL: test7a:
 ; KNL_X32:       ## %bb.0:
 ; KNL_X32-NEXT:    subl $12, %esp
 ; KNL_X32-NEXT:    .cfi_def_cfa_offset 16
 ; KNL_X32-NEXT:    vpcmpgtd %ymm1, %ymm0, %ymm0
 ; KNL_X32-NEXT:    vpmovdw %zmm0, %ymm0
 ; KNL_X32-NEXT:    ## kill: def %xmm0 killed %xmm0 killed %ymm0
 ; KNL_X32-NEXT:    calll _func8xi1
-; KNL_X32-NEXT:    vpand LCPI7_0, %xmm0, %xmm0
-; KNL_X32-NEXT:    vpsllw $15, %xmm0, %xmm0
-; KNL_X32-NEXT:    vpsraw $15, %xmm0, %xmm0
+; KNL_X32-NEXT:    vandps LCPI7_0, %xmm0, %xmm0
 ; KNL_X32-NEXT:    addl $12, %esp
 ; KNL_X32-NEXT:    retl
   %cmpRes = icmp sgt <8 x i32>%a, %b
   %resi = call <8 x i1> @func8xi1(<8 x i1> %cmpRes)
   %res = and <8 x i1>%resi,  <i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false>
   ret <8 x i1> %res
 }