[DAGCombine] Fix for PR35765

[samparker]

Summary

Remove the acceptance of ANY_EXTEND nodes while trying to move and nodes back to loads.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=35765

[RKSimon]

test/CodeGen/X86/pr35765.ll

1 ↗

(On Diff #128323)

Please use the utils\update_llc_test_checks.py to regenerate the checks

[samparker]

Generated test.

[RKSimon]

LGTM thanks. If possible, please commit pr35765.ll before the patch with the current codegen, then commit the patch with the fixed codegen in pr35765.ll to show the change,

llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

case ISD::LOAD: {
         // Only add this load if we can make it more narrow.
         if (ExtVT.bitsLT(Load->getMemoryVT()))
           Loads.insert(Load);
         continue;
       }
       return false;
     }
     case ISD::ZERO_EXTEND:
-    case ISD::ANY_EXTEND:
     case ISD::AssertZext: {
       unsigned ActiveBits = Mask->getAPIntValue().countTrailingOnes();
       EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);
       EVT VT = Op.getOpcode() == ISD::AssertZext ?
         cast<VTSDNode>(Op.getOperand(1))->getVT() :
         Op.getOperand(0).getValueType();
 
       // We can accept extending nodes if the mask is wider or an equal

llvm/trunk/test/CodeGen/X86/pr35765.ll

 ; CHECK-NEXT:    movzwl {{.*}}(%rip), %ecx
 ; CHECK-NEXT:    addl $-1398, %ecx # imm = 0xFA8A
 ; CHECK-NEXT:    movl $4, %eax
 ; CHECK-NEXT:    # kill: def %cl killed %cl killed %ecx
 ; CHECK-NEXT:    shll %cl, %eax
 ; CHECK-NEXT:    movzwl {{.*}}(%rip), %ecx
 ; CHECK-NEXT:    movzwl {{.*}}(%rip), %edx
 ; CHECK-NEXT:    notl %edx
+; CHECK-NEXT:    orl $63488, %edx # imm = 0xF800
+; CHECK-NEXT:    movzwl %dx, %edx
 ; CHECK-NEXT:    orl %ecx, %edx
-; CHECK-NEXT:    orl $-2048, %edx # imm = 0xF800
 ; CHECK-NEXT:    xorl %eax, %edx
 ; CHECK-NEXT:    movslq %edx, %rax
 ; CHECK-NEXT:    movq %rax, {{.*}}(%rip)
 ; CHECK-NEXT:    retq
 entry:
   %bf.load.i = load i16, i16* bitcast ({ i8, i8 }* @s1 to i16*), align 2
   %bf.clear.i = and i16 %bf.load.i, 2047
   %conv.i = zext i16 %bf.clear.i to i32