[MIR] Add support for the frame-destroy MachineInstr flag

[thegameg]

Summary

We are printing / parsing the frame-setup MachineInstr flag but not the frame-destroy one.

I think we should revisit the use-case of this flag and why frame-setup is not enough for the job in the future, but for now we should at least print/parse it.

[thegameg]

Fix test.

[MatzeB]

LGTM.

I think we should revisit the use-case of this flag and why frame-setup is not enough for the job in the future, but for now we should at least print/parse it.

Totally agree with you there.

docs/MIRLangRef.rst

 similar instruction names like ``TSTri`` and ``tSTRi`` represent different
 machine instructions.
 
 .. _instruction-flags:
 
 Instruction Flags
 ^^^^^^^^^^^^^^^^^
 
-The flag ``frame-setup`` can be specified before the instruction's name:
+The flag ``frame-setup`` or ``frame-destroy`` can be specified before the
+instruction's name:
 
 .. code-block:: text
 
     %fp = frame-setup ADDXri %sp, 0, 0
 
+.. code-block:: text
+
+    %x21, %x20 = frame-destroy LDPXi %sp
+
 .. _registers:
 
 Registers
 ---------
 
 Registers are one of the key primitives in the machine instructions
 serialization language. They are primarly used in the
 :ref:`register machine operands <register-operands>`,

lib/CodeGen/MIRParser/MILexer.h

enum TokenKind {
     kw_killed,
     kw_undef,
     kw_internal,
     kw_early_clobber,
     kw_debug_use,
     kw_renamable,
     kw_tied_def,
     kw_frame_setup,
+    kw_frame_destroy,
     kw_debug_location,
     kw_cfi_same_value,
     kw_cfi_offset,
     kw_cfi_rel_offset,
     kw_cfi_def_cfa_register,
     kw_cfi_def_cfa_offset,
     kw_cfi_adjust_cfa_offset,
     kw_cfi_escape,

lib/CodeGen/MIRParser/MILexer.cpp

return StringSwitch<MIToken::TokenKind>(Identifier)
       .Case("killed", MIToken::kw_killed)
       .Case("undef", MIToken::kw_undef)
       .Case("internal", MIToken::kw_internal)
       .Case("early-clobber", MIToken::kw_early_clobber)
       .Case("debug-use", MIToken::kw_debug_use)
       .Case("renamable", MIToken::kw_renamable)
       .Case("tied-def", MIToken::kw_tied_def)
       .Case("frame-setup", MIToken::kw_frame_setup)
+      .Case("frame-destroy", MIToken::kw_frame_destroy)
       .Case("debug-location", MIToken::kw_debug_location)
       .Case("same_value", MIToken::kw_cfi_same_value)
       .Case("offset", MIToken::kw_cfi_offset)
       .Case("rel_offset", MIToken::kw_cfi_rel_offset)
       .Case("def_cfa_register", MIToken::kw_cfi_def_cfa_register)
       .Case("def_cfa_offset", MIToken::kw_cfi_def_cfa_offset)
       .Case("adjust_cfa_offset", MIToken::kw_cfi_adjust_cfa_offset)
       .Case("escape", MIToken::kw_cfi_escape)

lib/CodeGen/MIRParser/MIParser.cpp

bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
   }
   return false;
 }
 
 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
   if (Token.is(MIToken::kw_frame_setup)) {
     Flags |= MachineInstr::FrameSetup;
     lex();
+  } else if (Token.is(MIToken::kw_frame_destroy)) {
+    Flags |= MachineInstr::FrameDestroy;
+    lex();
   }
   if (Token.isNot(MIToken::Identifier))
     return error("expected a machine instruction");
   StringRef InstrName = Token.stringValue();
   if (parseInstrName(InstrName, OpCode))
     return error(Twine("unknown machine instruction name '") + InstrName + "'");
   lex();
   return false;

lib/CodeGen/MIRPrinter.cpp

print(MI, I, TRI, ShouldPrintRegisterTies,
           MI.getTypeToPrint(I, PrintedTypes, MRI),
           /*PrintDef=*/false);
   }
 
   if (I)
     OS << " = ";
   if (MI.getFlag(MachineInstr::FrameSetup))
     OS << "frame-setup ";
+  else if (MI.getFlag(MachineInstr::FrameDestroy))
+    OS << "frame-destroy ";
+
   OS << TII->getName(MI.getOpcode());
   if (I < E)
     OS << ' ';
 
   bool NeedComma = false;
   for (; I < E; ++I) {
     if (NeedComma)
       OS << ", ";

test/CodeGen/AArch64/arm64-csldst-mmo.ll

 ; REQUIRES: asserts
 ; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
 ; REQUIRES: asserts
 
 @G = external global [0 x i32], align 4
 
 ; Check that MMOs are added to epilogue calle-save restore loads so
 ; that the store to G is not considered dependant on the callee-save
 ; loads.
 ;
 ; CHECK: Before post-MI-sched:
 ; CHECK-LABEL: # Machine code for function test1:
 ; CHECK: SU(2):   STRWui %wzr
-; CHECK: SU(3):   %x21, %x20 = LDPXi %sp
+; CHECK: SU(3):   %x21, %x20 = frame-destroy LDPXi %sp
 ; CHECK:  Predecessors:
 ; CHECK-NEXT:   SU(0): Out
 ; CHECK-NEXT:   SU(0): Out
 ; CHECK-NEXT:   SU(0): Ord
 ; CHECK-NEXT:  Successors:
 define void @test1() {
 entry:
   tail call void asm sideeffect "nop", "~{x20},~{x21},~{x22},~{x23}"() nounwind
   store i32 0, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @G, i64 0, i64 0), align 4
   ret void
 }

test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir

 ...
 ---
 name:            foo
 body: |
   bb.0.entry:
     ; CHECK: frame-setup PUSH64r %rax
     frame-setup PUSH64r %rax, implicit-def %rsp, implicit %rsp
     CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
-    %rdx = POP64r implicit-def %rsp, implicit %rsp
+    ; CHECK: %rdx = frame-destroy POP64r
+    %rdx = frame-destroy POP64r implicit-def %rsp, implicit %rsp
     RETQ %eax
 ...