NFC.
Adding MC regressions tests to cover the PREFETCH isa sets for both 32 and 64 bit.
This patch is part of a larger task to cover MC encoding of all X86 ISA Sets started in revision: https://reviews.llvm.org/D39952
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- rL LLVM
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What about PREFETCHNTA/PREFETCH0/PREFETCH1/PREFETCH2 ?
PREFETCHNTA mem8 0F 18 /0 Move data closer to the processor using the NTA reference.
PREFETCHT0 mem8 0F 18 /1 Move data closer to the processor using the T0 reference.
PREFETCHT1 mem8 0F 18 /2 Move data closer to the processor using the T1 reference.
PREFETCHT2 mem8 0F 18 /3 Move data closer to the processor using the T2 reference.
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I was going to tell you that prefetchwt1 is missing, but then I realized its only half implemented in llvm. We have a feature flag and no instruction definition.
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Sorry for delayed response. Just returned from vacation.
Added the prefetchwt1 testing.