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Differential D40290

[X86] Fix a bug in handling GRXX subclasses in Domain Reassignment pass
ClosedPublic

Authored by guyblank on Nov 21 2017, 2:11 AM.

Details

Reviewers
jina.nahias
craig.topper
zvi
m_zuckerman
Commits
rGf3cefdd3505e: [X86] Fix a bug in handling GRXX subclasses in Domain Reassignment pass
rL319745: [X86] Fix a bug in handling GRXX subclasses in Domain Reassignment pass
Summary

When choosing the mask register class to convert to, only "regular" GPR classes were handled (GR8, GR16, GR32, GR64),
The patch adds handling for their subclasses as well.
Added a 32 bit RUN line to the test, so classes like GR8_ABCD and such will be used. This would fail with an assertion without the patch.

Diff Detail

Repository
rL LLVM

Event Timeline

guyblank created this revision.Nov 21 2017, 2:11 AM
guyblank added a reviewer: m_zuckerman.Nov 22 2017, 1:00 AM
zvi added inline comments.Nov 22 2017, 8:02 AM
test/CodeGen/X86/gpr-to-mask.ll
1 ↗(On Diff #123743)

Please commit this modified test and rebase the patch so the improvements will be apparent

guyblank added inline comments.Nov 23 2017, 12:18 AM
test/CodeGen/X86/gpr-to-mask.ll
1 ↗(On Diff #123743)

it fails with an assertion without the code changes

guyblank added a comment.Nov 29 2017, 5:54 AM

ping

zvi accepted this revision.Nov 30 2017, 3:23 AM

LGTM

This revision is now accepted and ready to land.Nov 30 2017, 3:23 AM
Closed by commit rL319745: [X86] Fix a bug in handling GRXX subclasses in Domain Reassignment pass (authored by guyblank). · Explain WhyDec 5 2017, 1:08 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
X86/
8 lines
test/
CodeGen/
X86/
512 lines

Diff 125477

llvm/trunk/lib/Target/X86/X86DomainReassignment.cpp

Show First 20 Lines • Show All 64 Lines • ▼ Show 20 Lines if (isMask(RC, TRI))
return MaskDomain; return MaskDomain;
return OtherDomain; return OtherDomain;
} }
/// Return a register class equivalent to \p SrcRC, in \p Domain. /// Return a register class equivalent to \p SrcRC, in \p Domain.
static const TargetRegisterClass *getDstRC(const TargetRegisterClass *SrcRC, static const TargetRegisterClass *getDstRC(const TargetRegisterClass *SrcRC,
RegDomain Domain) { RegDomain Domain) {
assert(Domain == MaskDomain && "add domain"); assert(Domain == MaskDomain && "add domain");
if (SrcRC == &X86::GR8RegClass) if (X86::GR8RegClass.hasSubClassEq(SrcRC))
return &X86::VK8RegClass; return &X86::VK8RegClass;
if (SrcRC == &X86::GR16RegClass) if (X86::GR16RegClass.hasSubClassEq(SrcRC))
return &X86::VK16RegClass; return &X86::VK16RegClass;
if (SrcRC == &X86::GR32RegClass) if (X86::GR32RegClass.hasSubClassEq(SrcRC))
return &X86::VK32RegClass; return &X86::VK32RegClass;
if (SrcRC == &X86::GR64RegClass) if (X86::GR64RegClass.hasSubClassEq(SrcRC))
return &X86::VK64RegClass; return &X86::VK64RegClass;
llvm_unreachable("add register class"); llvm_unreachable("add register class");
return nullptr; return nullptr;
} }
/// Abstract Instruction Converter class. /// Abstract Instruction Converter class.
class InstrConverterBase { class InstrConverterBase {
protected: protected:
▲ Show 20 Lines • Show All 665 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/gpr-to-mask.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq < %s | FileCheck %s ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq < %s | FileCheck %s --check-prefix=X86-64
; RUN: llc -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq < %s | FileCheck %s --check-prefix=X86-32
define void @test_fcmp_storefloat(i1 %cond, float* %fptr, float %f1, float %f2, float %f3, float %f4, float %f5, float %f6) { define void @test_fcmp_storefloat(i1 %cond, float* %fptr, float %f1, float %f2, float %f3, float %f4, float %f5, float %f6) {
; CHECK-LABEL: test_fcmp_storefloat: ; X86-64-LABEL: test_fcmp_storefloat:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB0_2 ; X86-64-NEXT: je .LBB0_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: vcmpeqss %xmm3, %xmm2, %k1 ; X86-64-NEXT: vcmpeqss %xmm3, %xmm2, %k1
; CHECK-NEXT: jmp .LBB0_3 ; X86-64-NEXT: jmp .LBB0_3
; CHECK-NEXT: .LBB0_2: # %else ; X86-64-NEXT: .LBB0_2: # %else
; CHECK-NEXT: vcmpeqss %xmm5, %xmm4, %k1 ; X86-64-NEXT: vcmpeqss %xmm5, %xmm4, %k1
; CHECK-NEXT: .LBB0_3: # %exit ; X86-64-NEXT: .LBB0_3: # %exit
; CHECK-NEXT: vmovss %xmm0, %xmm0, %xmm1 {%k1} ; X86-64-NEXT: vmovss %xmm0, %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vmovss %xmm1, (%rsi) ; X86-64-NEXT: vmovss %xmm1, (%rsi)
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_fcmp_storefloat:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB0_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; X86-32-NEXT: vcmpeqss {{[0-9]+}}(%esp), %xmm2, %k1
; X86-32-NEXT: jmp .LBB0_3
; X86-32-NEXT: .LBB0_2: # %else
; X86-32-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; X86-32-NEXT: vcmpeqss {{[0-9]+}}(%esp), %xmm2, %k1
; X86-32-NEXT: .LBB0_3: # %exit
; X86-32-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
; X86-32-NEXT: vmovss %xmm0, (%eax)
; X86-32-NEXT: retl
entry: entry:
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%cmp1 = fcmp oeq float %f3, %f4 %cmp1 = fcmp oeq float %f3, %f4
br label %exit br label %exit
else: else:
%cmp2 = fcmp oeq float %f5, %f6 %cmp2 = fcmp oeq float %f5, %f6
br label %exit br label %exit
exit: exit:
%val = phi i1 [%cmp1, %if], [%cmp2, %else] %val = phi i1 [%cmp1, %if], [%cmp2, %else]
%selected = select i1 %val, float %f1, float %f2 %selected = select i1 %val, float %f1, float %f2
store float %selected, float* %fptr store float %selected, float* %fptr
ret void ret void
} }
define void @test_fcmp_storei1(i1 %cond, float* %fptr, i1* %iptr, float %f1, float %f2, float %f3, float %f4) { define void @test_fcmp_storei1(i1 %cond, float* %fptr, i1* %iptr, float %f1, float %f2, float %f3, float %f4) {
; CHECK-LABEL: test_fcmp_storei1: ; X86-64-LABEL: test_fcmp_storei1:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB1_2 ; X86-64-NEXT: je .LBB1_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: vcmpeqss %xmm1, %xmm0, %k0 ; X86-64-NEXT: vcmpeqss %xmm1, %xmm0, %k0
; CHECK-NEXT: jmp .LBB1_3 ; X86-64-NEXT: jmp .LBB1_3
; CHECK-NEXT: .LBB1_2: # %else ; X86-64-NEXT: .LBB1_2: # %else
; CHECK-NEXT: vcmpeqss %xmm3, %xmm2, %k0 ; X86-64-NEXT: vcmpeqss %xmm3, %xmm2, %k0
; CHECK-NEXT: .LBB1_3: # %exit ; X86-64-NEXT: .LBB1_3: # %exit
; CHECK-NEXT: kmovd %k0, %eax ; X86-64-NEXT: kmovd %k0, %eax
; CHECK-NEXT: andb $1, %al ; X86-64-NEXT: andb $1, %al
; CHECK-NEXT: movb %al, (%rdx) ; X86-64-NEXT: movb %al, (%rdx)
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_fcmp_storei1:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB1_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-32-NEXT: vcmpeqss {{[0-9]+}}(%esp), %xmm0, %k0
; X86-32-NEXT: jmp .LBB1_3
; X86-32-NEXT: .LBB1_2: # %else
; X86-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-32-NEXT: vcmpeqss {{[0-9]+}}(%esp), %xmm0, %k0
; X86-32-NEXT: .LBB1_3: # %exit
; X86-32-NEXT: kmovd %k0, %ecx
; X86-32-NEXT: andb $1, %cl
; X86-32-NEXT: movb %cl, (%eax)
; X86-32-NEXT: retl
entry: entry:
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%cmp1 = fcmp oeq float %f1, %f2 %cmp1 = fcmp oeq float %f1, %f2
br label %exit br label %exit
else: else:
%cmp2 = fcmp oeq float %f3, %f4 %cmp2 = fcmp oeq float %f3, %f4
br label %exit br label %exit
exit: exit:
%val = phi i1 [%cmp1, %if], [%cmp2, %else] %val = phi i1 [%cmp1, %if], [%cmp2, %else]
store i1 %val, i1* %iptr store i1 %val, i1* %iptr
ret void ret void
} }
define void @test_load_add(i1 %cond, float* %fptr, i1* %iptr1, i1* %iptr2, float %f1, float %f2) { define void @test_load_add(i1 %cond, float* %fptr, i1* %iptr1, i1* %iptr2, float %f1, float %f2) {
; CHECK-LABEL: test_load_add: ; X86-64-LABEL: test_load_add:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB2_2 ; X86-64-NEXT: je .LBB2_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: kmovb (%rdx), %k0 ; X86-64-NEXT: kmovb (%rdx), %k0
; CHECK-NEXT: kmovb (%rcx), %k1 ; X86-64-NEXT: kmovb (%rcx), %k1
; CHECK-NEXT: kaddb %k1, %k0, %k1 ; X86-64-NEXT: kaddb %k1, %k0, %k1
; CHECK-NEXT: jmp .LBB2_3 ; X86-64-NEXT: jmp .LBB2_3
; CHECK-NEXT: .LBB2_2: # %else ; X86-64-NEXT: .LBB2_2: # %else
; CHECK-NEXT: kmovb (%rcx), %k1 ; X86-64-NEXT: kmovb (%rcx), %k1
; CHECK-NEXT: .LBB2_3: # %exit ; X86-64-NEXT: .LBB2_3: # %exit
; CHECK-NEXT: vmovss %xmm0, %xmm0, %xmm1 {%k1} ; X86-64-NEXT: vmovss %xmm0, %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vmovss %xmm1, (%rsi) ; X86-64-NEXT: vmovss %xmm1, (%rsi)
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_load_add:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB2_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-32-NEXT: kmovb (%edx), %k0
; X86-32-NEXT: kmovb (%ecx), %k1
; X86-32-NEXT: kaddb %k1, %k0, %k1
; X86-32-NEXT: jmp .LBB2_3
; X86-32-NEXT: .LBB2_2: # %else
; X86-32-NEXT: kmovb (%ecx), %k1
; X86-32-NEXT: .LBB2_3: # %exit
; X86-32-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
; X86-32-NEXT: vmovss %xmm0, (%eax)
; X86-32-NEXT: retl
entry: entry:
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%loaded1 = load i1, i1* %iptr1 %loaded1 = load i1, i1* %iptr1
%loaded2if = load i1, i1* %iptr2 %loaded2if = load i1, i1* %iptr2
%added = add i1 %loaded1, %loaded2if %added = add i1 %loaded1, %loaded2if
br label %exit br label %exit
else: else:
%loaded2else = load i1, i1* %iptr2 %loaded2else = load i1, i1* %iptr2
br label %exit br label %exit
exit: exit:
%val = phi i1 [%added, %if], [%loaded2else, %else] %val = phi i1 [%added, %if], [%loaded2else, %else]
%selected = select i1 %val, float %f1, float %f2 %selected = select i1 %val, float %f1, float %f2
store float %selected, float* %fptr store float %selected, float* %fptr
ret void ret void
} }
define void @test_load_i1(i1 %cond, float* %fptr, i1* %iptr1, i1* %iptr2, float %f1, float %f2) { define void @test_load_i1(i1 %cond, float* %fptr, i1* %iptr1, i1* %iptr2, float %f1, float %f2) {
; CHECK-LABEL: test_load_i1: ; X86-64-LABEL: test_load_i1:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB3_2 ; X86-64-NEXT: je .LBB3_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: kmovb (%rdx), %k1 ; X86-64-NEXT: kmovb (%rdx), %k1
; CHECK-NEXT: jmp .LBB3_3 ; X86-64-NEXT: jmp .LBB3_3
; CHECK-NEXT: .LBB3_2: # %else ; X86-64-NEXT: .LBB3_2: # %else
; CHECK-NEXT: kmovb (%rcx), %k1 ; X86-64-NEXT: kmovb (%rcx), %k1
; CHECK-NEXT: .LBB3_3: # %exit ; X86-64-NEXT: .LBB3_3: # %exit
; CHECK-NEXT: vmovss %xmm0, %xmm0, %xmm1 {%k1} ; X86-64-NEXT: vmovss %xmm0, %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vmovss %xmm1, (%rsi) ; X86-64-NEXT: vmovss %xmm1, (%rsi)
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_load_i1:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB3_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: jmp .LBB3_3
; X86-32-NEXT: .LBB3_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: .LBB3_3: # %exit
; X86-32-NEXT: kmovb (%ecx), %k1
; X86-32-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
; X86-32-NEXT: vmovss %xmm0, (%eax)
; X86-32-NEXT: retl
entry: entry:
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%loaded1 = load i1, i1* %iptr1 %loaded1 = load i1, i1* %iptr1
br label %exit br label %exit
else: else:
%loaded2 = load i1, i1* %iptr2 %loaded2 = load i1, i1* %iptr2
br label %exit br label %exit
exit: exit:
%val = phi i1 [%loaded1, %if], [%loaded2, %else] %val = phi i1 [%loaded1, %if], [%loaded2, %else]
%selected = select i1 %val, float %f1, float %f2 %selected = select i1 %val, float %f1, float %f2
store float %selected, float* %fptr store float %selected, float* %fptr
ret void ret void
} }
define void @test_loadi1_storei1(i1 %cond, i1* %iptr1, i1* %iptr2, i1* %iptr3) { define void @test_loadi1_storei1(i1 %cond, i1* %iptr1, i1* %iptr2, i1* %iptr3) {
; CHECK-LABEL: test_loadi1_storei1: ; X86-64-LABEL: test_loadi1_storei1:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB4_2 ; X86-64-NEXT: je .LBB4_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: movb (%rsi), %al ; X86-64-NEXT: movb (%rsi), %al
; CHECK-NEXT: jmp .LBB4_3 ; X86-64-NEXT: jmp .LBB4_3
; CHECK-NEXT: .LBB4_2: # %else ; X86-64-NEXT: .LBB4_2: # %else
; CHECK-NEXT: movb (%rdx), %al ; X86-64-NEXT: movb (%rdx), %al
; CHECK-NEXT: .LBB4_3: # %exit ; X86-64-NEXT: .LBB4_3: # %exit
; CHECK-NEXT: andb $1, %al ; X86-64-NEXT: andb $1, %al
; CHECK-NEXT: movb %al, (%rcx) ; X86-64-NEXT: movb %al, (%rcx)
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_loadi1_storei1:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB4_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: jmp .LBB4_3
; X86-32-NEXT: .LBB4_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: .LBB4_3: # %exit
; X86-32-NEXT: movb (%ecx), %cl
; X86-32-NEXT: andb $1, %cl
; X86-32-NEXT: movb %cl, (%eax)
; X86-32-NEXT: retl
entry: entry:
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%loaded1 = load i1, i1* %iptr1 %loaded1 = load i1, i1* %iptr1
br label %exit br label %exit
else: else:
%loaded2 = load i1, i1* %iptr2 %loaded2 = load i1, i1* %iptr2
br label %exit br label %exit
exit: exit:
%val = phi i1 [%loaded1, %if], [%loaded2, %else] %val = phi i1 [%loaded1, %if], [%loaded2, %else]
store i1 %val, i1* %iptr3 store i1 %val, i1* %iptr3
ret void ret void
} }
define void @test_shl1(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) { define void @test_shl1(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
; CHECK-LABEL: test_shl1: ; X86-64-LABEL: test_shl1:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; X86-64-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; CHECK-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; X86-64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB5_2 ; X86-64-NEXT: je .LBB5_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: kmovb (%rsi), %k0 ; X86-64-NEXT: kmovb (%rsi), %k0
; CHECK-NEXT: kaddb %k0, %k0, %k1 ; X86-64-NEXT: kaddb %k0, %k0, %k1
; CHECK-NEXT: jmp .LBB5_3 ; X86-64-NEXT: jmp .LBB5_3
; CHECK-NEXT: .LBB5_2: # %else ; X86-64-NEXT: .LBB5_2: # %else
; CHECK-NEXT: kmovb (%rdx), %k1 ; X86-64-NEXT: kmovb (%rdx), %k1
; CHECK-NEXT: .LBB5_3: # %exit ; X86-64-NEXT: .LBB5_3: # %exit
; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1} ; X86-64-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; CHECK-NEXT: vmovaps %ymm1, (%rcx) ; X86-64-NEXT: vmovaps %ymm1, (%rcx)
; CHECK-NEXT: vzeroupper ; X86-64-NEXT: vzeroupper
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_shl1:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; X86-32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB5_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: kmovb (%ecx), %k0
; X86-32-NEXT: kaddb %k0, %k0, %k1
; X86-32-NEXT: jmp .LBB5_3
; X86-32-NEXT: .LBB5_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: kmovb (%ecx), %k1
; X86-32-NEXT: .LBB5_3: # %exit
; X86-32-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; X86-32-NEXT: vmovaps %ymm1, (%eax)
; X86-32-NEXT: vzeroupper
; X86-32-NEXT: retl
entry: entry:
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%loaded1 = load i8, i8* %ptr1 %loaded1 = load i8, i8* %ptr1
%shifted = shl i8 %loaded1, 1 %shifted = shl i8 %loaded1, 1
br label %exit br label %exit
else: else:
%loaded2 = load i8, i8* %ptr2 %loaded2 = load i8, i8* %ptr2
br label %exit br label %exit
exit: exit:
%val = phi i8 [%shifted, %if], [%loaded2, %else] %val = phi i8 [%shifted, %if], [%loaded2, %else]
%mask = bitcast i8 %val to <8 x i1> %mask = bitcast i8 %val to <8 x i1>
%selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2 %selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
store <8 x float> %selected, <8 x float>* %fptrvec store <8 x float> %selected, <8 x float>* %fptrvec
ret void ret void
} }
define void @test_shr1(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) { define void @test_shr1(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
; CHECK-LABEL: test_shr1: ; X86-64-LABEL: test_shr1:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; X86-64-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; CHECK-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; X86-64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB6_2 ; X86-64-NEXT: je .LBB6_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: movb (%rsi), %al ; X86-64-NEXT: movb (%rsi), %al
; CHECK-NEXT: shrb %al ; X86-64-NEXT: shrb %al
; CHECK-NEXT: jmp .LBB6_3 ; X86-64-NEXT: jmp .LBB6_3
; CHECK-NEXT: .LBB6_2: # %else ; X86-64-NEXT: .LBB6_2: # %else
; CHECK-NEXT: movb (%rdx), %al ; X86-64-NEXT: movb (%rdx), %al
; CHECK-NEXT: .LBB6_3: # %exit ; X86-64-NEXT: .LBB6_3: # %exit
; CHECK-NEXT: kmovd %eax, %k1 ; X86-64-NEXT: kmovd %eax, %k1
; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1} ; X86-64-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; CHECK-NEXT: vmovaps %ymm1, (%rcx) ; X86-64-NEXT: vmovaps %ymm1, (%rcx)
; CHECK-NEXT: vzeroupper ; X86-64-NEXT: vzeroupper
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_shr1:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; X86-32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB6_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: movb (%ecx), %cl
; X86-32-NEXT: shrb %cl
; X86-32-NEXT: jmp .LBB6_3
; X86-32-NEXT: .LBB6_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: movb (%ecx), %cl
; X86-32-NEXT: .LBB6_3: # %exit
; X86-32-NEXT: kmovd %ecx, %k1
; X86-32-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; X86-32-NEXT: vmovaps %ymm1, (%eax)
; X86-32-NEXT: vzeroupper
; X86-32-NEXT: retl
entry: entry:
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%loaded1 = load i8, i8* %ptr1 %loaded1 = load i8, i8* %ptr1
%shifted = lshr i8 %loaded1, 1 %shifted = lshr i8 %loaded1, 1
br label %exit br label %exit
else: else:
%loaded2 = load i8, i8* %ptr2 %loaded2 = load i8, i8* %ptr2
br label %exit br label %exit
exit: exit:
%val = phi i8 [%shifted, %if], [%loaded2, %else] %val = phi i8 [%shifted, %if], [%loaded2, %else]
%mask = bitcast i8 %val to <8 x i1> %mask = bitcast i8 %val to <8 x i1>
%selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2 %selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
store <8 x float> %selected, <8 x float>* %fptrvec store <8 x float> %selected, <8 x float>* %fptrvec
ret void ret void
} }
define void @test_shr2(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) { define void @test_shr2(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
; CHECK-LABEL: test_shr2: ; X86-64-LABEL: test_shr2:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; X86-64-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; CHECK-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; X86-64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB7_2 ; X86-64-NEXT: je .LBB7_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: kmovb (%rsi), %k0 ; X86-64-NEXT: kmovb (%rsi), %k0
; CHECK-NEXT: kshiftrb $2, %k0, %k1 ; X86-64-NEXT: kshiftrb $2, %k0, %k1
; CHECK-NEXT: jmp .LBB7_3 ; X86-64-NEXT: jmp .LBB7_3
; CHECK-NEXT: .LBB7_2: # %else ; X86-64-NEXT: .LBB7_2: # %else
; CHECK-NEXT: kmovb (%rdx), %k1 ; X86-64-NEXT: kmovb (%rdx), %k1
; CHECK-NEXT: .LBB7_3: # %exit ; X86-64-NEXT: .LBB7_3: # %exit
; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1} ; X86-64-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; CHECK-NEXT: vmovaps %ymm1, (%rcx) ; X86-64-NEXT: vmovaps %ymm1, (%rcx)
; CHECK-NEXT: vzeroupper ; X86-64-NEXT: vzeroupper
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_shr2:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; X86-32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB7_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: kmovb (%ecx), %k0
; X86-32-NEXT: kshiftrb $2, %k0, %k1
; X86-32-NEXT: jmp .LBB7_3
; X86-32-NEXT: .LBB7_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: kmovb (%ecx), %k1
; X86-32-NEXT: .LBB7_3: # %exit
; X86-32-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; X86-32-NEXT: vmovaps %ymm1, (%eax)
; X86-32-NEXT: vzeroupper
; X86-32-NEXT: retl
entry: entry:
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%loaded1 = load i8, i8* %ptr1 %loaded1 = load i8, i8* %ptr1
%shifted = lshr i8 %loaded1, 2 %shifted = lshr i8 %loaded1, 2
br label %exit br label %exit
else: else:
%loaded2 = load i8, i8* %ptr2 %loaded2 = load i8, i8* %ptr2
br label %exit br label %exit
exit: exit:
%val = phi i8 [%shifted, %if], [%loaded2, %else] %val = phi i8 [%shifted, %if], [%loaded2, %else]
%mask = bitcast i8 %val to <8 x i1> %mask = bitcast i8 %val to <8 x i1>
%selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2 %selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
store <8 x float> %selected, <8 x float>* %fptrvec store <8 x float> %selected, <8 x float>* %fptrvec
ret void ret void
} }
define void @test_shl(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) { define void @test_shl(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
; CHECK-LABEL: test_shl: ; X86-64-LABEL: test_shl:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; X86-64-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; CHECK-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; X86-64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB8_2 ; X86-64-NEXT: je .LBB8_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: kmovb (%rsi), %k0 ; X86-64-NEXT: kmovb (%rsi), %k0
; CHECK-NEXT: kshiftlb $6, %k0, %k1 ; X86-64-NEXT: kshiftlb $6, %k0, %k1
; CHECK-NEXT: jmp .LBB8_3 ; X86-64-NEXT: jmp .LBB8_3
; CHECK-NEXT: .LBB8_2: # %else ; X86-64-NEXT: .LBB8_2: # %else
; CHECK-NEXT: kmovb (%rdx), %k1 ; X86-64-NEXT: kmovb (%rdx), %k1
; CHECK-NEXT: .LBB8_3: # %exit ; X86-64-NEXT: .LBB8_3: # %exit
; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1} ; X86-64-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; CHECK-NEXT: vmovaps %ymm1, (%rcx) ; X86-64-NEXT: vmovaps %ymm1, (%rcx)
; CHECK-NEXT: vzeroupper ; X86-64-NEXT: vzeroupper
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_shl:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; X86-32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB8_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: kmovb (%ecx), %k0
; X86-32-NEXT: kshiftlb $6, %k0, %k1
; X86-32-NEXT: jmp .LBB8_3
; X86-32-NEXT: .LBB8_2: # %else
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: kmovb (%ecx), %k1
; X86-32-NEXT: .LBB8_3: # %exit
; X86-32-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; X86-32-NEXT: vmovaps %ymm1, (%eax)
; X86-32-NEXT: vzeroupper
; X86-32-NEXT: retl
entry: entry:
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%loaded1 = load i8, i8* %ptr1 %loaded1 = load i8, i8* %ptr1
%shifted = shl i8 %loaded1, 6 %shifted = shl i8 %loaded1, 6
br label %exit br label %exit
else: else:
%loaded2 = load i8, i8* %ptr2 %loaded2 = load i8, i8* %ptr2
br label %exit br label %exit
exit: exit:
%val = phi i8 [%shifted, %if], [%loaded2, %else] %val = phi i8 [%shifted, %if], [%loaded2, %else]
%mask = bitcast i8 %val to <8 x i1> %mask = bitcast i8 %val to <8 x i1>
%selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2 %selected = select <8 x i1> %mask, <8 x float> %fvec1, <8 x float> %fvec2
store <8 x float> %selected, <8 x float>* %fptrvec store <8 x float> %selected, <8 x float>* %fptrvec
ret void ret void
} }
define void @test_add(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) { define void @test_add(i1 %cond, i8* %ptr1, i8* %ptr2, <8 x float> %fvec1, <8 x float> %fvec2, <8 x float>* %fptrvec) {
; CHECK-LABEL: test_add: ; X86-64-LABEL: test_add:
; CHECK: # %bb.0: # %entry ; X86-64: # %bb.0: # %entry
; CHECK-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; X86-64-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; CHECK-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; X86-64-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; CHECK-NEXT: kmovb (%rsi), %k0 ; X86-64-NEXT: kmovb (%rsi), %k0
; CHECK-NEXT: kmovb (%rdx), %k1 ; X86-64-NEXT: kmovb (%rdx), %k1
; CHECK-NEXT: testb $1, %dil ; X86-64-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB9_2 ; X86-64-NEXT: je .LBB9_2
; CHECK-NEXT: # %bb.1: # %if ; X86-64-NEXT: # %bb.1: # %if
; CHECK-NEXT: kandb %k1, %k0, %k1 ; X86-64-NEXT: kandb %k1, %k0, %k1
; CHECK-NEXT: jmp .LBB9_3 ; X86-64-NEXT: jmp .LBB9_3
; CHECK-NEXT: .LBB9_2: # %else ; X86-64-NEXT: .LBB9_2: # %else
; CHECK-NEXT: kaddb %k1, %k0, %k1 ; X86-64-NEXT: kaddb %k1, %k0, %k1
; CHECK-NEXT: .LBB9_3: # %exit ; X86-64-NEXT: .LBB9_3: # %exit
; CHECK-NEXT: vmovaps %zmm0, %zmm1 {%k1} ; X86-64-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; CHECK-NEXT: vmovaps %ymm1, (%rcx) ; X86-64-NEXT: vmovaps %ymm1, (%rcx)
; CHECK-NEXT: vzeroupper ; X86-64-NEXT: vzeroupper
; CHECK-NEXT: retq ; X86-64-NEXT: retq
;
; X86-32-LABEL: test_add:
; X86-32: # %bb.0: # %entry
; X86-32-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; X86-32-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-32-NEXT: kmovb (%edx), %k0
; X86-32-NEXT: kmovb (%ecx), %k1
; X86-32-NEXT: testb $1, {{[0-9]+}}(%esp)
; X86-32-NEXT: je .LBB9_2
; X86-32-NEXT: # %bb.1: # %if
; X86-32-NEXT: kandb %k1, %k0, %k1
; X86-32-NEXT: jmp .LBB9_3
; X86-32-NEXT: .LBB9_2: # %else
; X86-32-NEXT: kaddb %k1, %k0, %k1
; X86-32-NEXT: .LBB9_3: # %exit
; X86-32-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; X86-32-NEXT: vmovaps %ymm1, (%eax)
; X86-32-NEXT: vzeroupper
; X86-32-NEXT: retl
entry: entry:
%loaded1 = load i8, i8* %ptr1 %loaded1 = load i8, i8* %ptr1
%loaded2 = load i8, i8* %ptr2 %loaded2 = load i8, i8* %ptr2
br i1 %cond, label %if, label %else br i1 %cond, label %if, label %else
if: if:
%and = and i8 %loaded1, %loaded2 %and = and i8 %loaded1, %loaded2
br label %exit br label %exit
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