[x86][icelake]VAES introduction

[coby]

Summary

an icelake promotion of AES

[coby]

intel syntax encoding test is to be added shortly

[craig.topper]

lib/Support/Host.cpp

433

This isn't needed if it isn't used by code in getHostCPUName

1062

This isn't needed if it isn't used by code in getHostCPUName.

1478

Please use ECX >> 9 or whatever the correct bit is like the rest of the code.

Qualify with HasAVXSave as well.

lib/Target/X86/X86.td

174

Should this imply FeatureAES as well?

lib/Target/X86/X86InstrInfo.td

829

I don't think you nee the assembler predicate. We only need it on the core AVX512 features because it enables the parser to recognize mask registers and embeded rounding. In general we don't do fine grained control of what instructinos are available to the assembler.

[coby]

lib/Target/X86/X86.td

174

not sure,
it has no direct dependency afaiu, like AVX, for example, i.e. it does not imply that AES insns are apparent.
practically, if you want to use 'vaesenc', for example, you ought to have a Key, so you'll probably want to use 'aeskeygenassist' which is on AES solely, but than again - it (vaes) may still be provided on its own, so I find it yet questionable

[coby]

lib/Support/Host.cpp

433

I see, thanks.
I assume same logic is to be applied to entries like FEATURE_PCLMUL?

lib/Target/X86/X86InstrInfo.td

829

verified it to be right. thanks. will remove

[coby]

addressed Craig's comments

[craig.topper]

lib/Support/Host.cpp

433

The first 31 values need to be kept in sync with compiler-rt since we have a copy and paste of some of this code in compiler-rt. For runtime CPU detection in compiled binaries. It makes diffing easier if they are synchronized. I just committed some comments that clarify that a little better. I'm hoping to move this enum to a header file that clang can use as a proxy for what's in compiler-rt as well since clang can't include any files from the compiler-rt project. Currently we just have a separate copy code in clang too.

lib/Target/X86/X86.td

174

The EVEX->VEX pass is going to turn 128-bit EVEX encoded AES instructions into VEX encoded versions. So those instructions better be available with VAES.

[coby]

lib/Support/Host.cpp

433

I see. thanks for the elaborated explanation!

lib/Target/X86/X86.td

174

isn't it implies that only the (AES) subset implemented by VAES need to be available?

[craig.topper]

lib/Target/X86/X86.td

174

That's technically true, but a the instructions aren't enabled/disabled at that granularity.

lib/Target/X86/X86InstrSSE.td

7153

This probably needs NoVLX_Or_NoVAES.

The fact that hasVAES doesn't imply HasAES is hiding this bug unlike the PCLMUL patch.

[coby]

further refined selection of conflicting insns, as suggested by Craig (thanks)

[craig.topper]

LGTM

include/llvm/IR/IntrinsicsX86.td

def int_x86_sse41_phminposuw     : GCCBuiltin<"__builtin_ia32_phminposuw128">,
                         [IntrNoMem]>;
 }
 
 // Advanced Encryption Standard (AES) Instructions
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_aesni_aesimc          : GCCBuiltin<"__builtin_ia32_aesimc128">,
               Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty],
                         [IntrNoMem]>;
+
   def int_x86_aesni_aesenc          : GCCBuiltin<"__builtin_ia32_aesenc128">,
               Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
                         [IntrNoMem]>;
+  def int_x86_aesni_aesenc_256      : GCCBuiltin<"__builtin_ia32_aesenc256">,
+              Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_v4i64_ty],
+                        [IntrNoMem]>;
+  def int_x86_aesni_aesenc_512      : GCCBuiltin<"__builtin_ia32_aesenc512">,
+              Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_v8i64_ty],
+                        [IntrNoMem]>;
+
   def int_x86_aesni_aesenclast : GCCBuiltin<"__builtin_ia32_aesenclast128">,
               Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
                         [IntrNoMem]>;
+  def int_x86_aesni_aesenclast_256 :
+    GCCBuiltin<"__builtin_ia32_aesenclast256">,
+    Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_v4i64_ty],
+              [IntrNoMem]>;
+  def int_x86_aesni_aesenclast_512 :
+    GCCBuiltin<"__builtin_ia32_aesenclast512">,
+    Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_v8i64_ty],
+              [IntrNoMem]>;
+
   def int_x86_aesni_aesdec          : GCCBuiltin<"__builtin_ia32_aesdec128">,
               Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
                         [IntrNoMem]>;
+  def int_x86_aesni_aesdec_256      : GCCBuiltin<"__builtin_ia32_aesdec256">,
+              Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_v4i64_ty],
+                        [IntrNoMem]>;
+  def int_x86_aesni_aesdec_512      : GCCBuiltin<"__builtin_ia32_aesdec512">,
+              Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_v8i64_ty],
+                        [IntrNoMem]>;
+
   def int_x86_aesni_aesdeclast : GCCBuiltin<"__builtin_ia32_aesdeclast128">,
               Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
                         [IntrNoMem]>;
+  def int_x86_aesni_aesdeclast_256 :
+    GCCBuiltin<"__builtin_ia32_aesdeclast256">,
+    Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_v4i64_ty],
+              [IntrNoMem]>;
+  def int_x86_aesni_aesdeclast_512 :
+    GCCBuiltin<"__builtin_ia32_aesdeclast512">,
+    Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_v8i64_ty],
+              [IntrNoMem]>;
+
   def int_x86_aesni_aeskeygenassist :
               GCCBuiltin<"__builtin_ia32_aeskeygenassist128">,
               Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_i8_ty],
                         [IntrNoMem]>;
 }
 
 // PCLMUL instruction
 let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".

lib/Support/Host.cpp

enum ProcessorFeatures {
   FEATURE_AVX5124FMAPS,
   FEATURE_AVX512VPOPCNTDQ,
   // Only one bit free left in the first 32 features.
   FEATURE_MOVBE = 32,
   FEATURE_ADX,
   FEATURE_EM64T,
   FEATURE_CLFLUSHOPT,
   FEATURE_SHA,
 };
 
 // The check below for i386 was copied from clang's cpuid.h (__get_cpuid_max).
 // Check motivated by bug reports for OpenSSL crashing on CPUs without CPUID
 // support. Consequently, for i386, the presence of CPUID is checked first
 // via the corresponding eflags bit.
 // Removal of cpuid.h header motivated by PR30384
 // Header cpuid.h and method __get_cpuid_max are not used in llvm, clang, openmp
 // or test-suite, but are used in external projects e.g. libstdcxx
if (HasLeaf7 && ((EBX >> 30) & 1) && HasAVX512Save)
     Features |= 1 << FEATURE_AVX512BW;
   if (HasLeaf7 && ((EBX >> 31) & 1) && HasAVX512Save)
     Features |= 1 << FEATURE_AVX512VL;
 
   if (HasLeaf7 && ((ECX >> 1) & 1) && HasAVX512Save)
     Features |= 1 << FEATURE_AVX512VBMI;
   if (HasLeaf7 && ((ECX >> 14) & 1) && HasAVX512Save)
     Features |= 1 << FEATURE_AVX512VPOPCNTDQ;
 
   if (HasLeaf7 && ((EDX >> 2) & 1) && HasAVX512Save)
     Features |= 1 << FEATURE_AVX5124VNNIW;
   if (HasLeaf7 && ((EDX >> 3) & 1) && HasAVX512Save)
     Features |= 1 << FEATURE_AVX5124FMAPS;
 
   unsigned MaxExtLevel;
   getX86CpuIDAndInfo(0x80000000, &MaxExtLevel, &EBX, &ECX, &EDX);
 
bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
   Features["avx512bw"] = HasLeaf7 && ((EBX >> 30) & 1) && HasAVX512Save;
   Features["avx512vl"] = HasLeaf7 && ((EBX >> 31) & 1) && HasAVX512Save;
 
   Features["prefetchwt1"] = HasLeaf7 && (ECX & 1);
   Features["avx512vbmi"] = HasLeaf7 && ((ECX >> 1) & 1) && HasAVX512Save;
   Features["avx512vpopcntdq"] = HasLeaf7 && ((ECX >> 14) & 1) && HasAVX512Save;
   // Enable protection keys
   Features["pku"] = HasLeaf7 && ((ECX >> 4) & 1);
+  Features["vaes"] = HasLeaf7 && ((ECX >> 9) & 1) && HasAVXSave;
 
   bool HasLeafD = MaxLevel >= 0xd &&
                   !getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX);
 
   // Only enable XSAVE if OS has enabled support for saving YMM state.
   Features["xsaveopt"] = HasAVXSave && HasLeafD && ((EAX >> 0) & 1);
   Features["xsavec"] = HasAVXSave && HasLeafD && ((EAX >> 1) & 1);
   Features["xsaves"] = HasAVXSave && HasLeafD && ((EAX >> 3) & 1);

lib/Target/X86/X86.td

def FeatureXOP     : SubtargetFeature<"xop", "HasXOP", "true",
                                       "Enable XOP instructions",
                                       [FeatureFMA4]>;
 def FeatureSSEUnalignedMem : SubtargetFeature<"sse-unaligned-mem",
                                           "HasSSEUnalignedMem", "true",
                       "Allow unaligned memory operands with SSE instructions">;
 def FeatureAES     : SubtargetFeature<"aes", "HasAES", "true",
                                       "Enable AES instructions",
                                       [FeatureSSE2]>;
+def FeatureVAES    : SubtargetFeature<"vaes", "HasVAES", "true",
+                       "Promote selected AES instructions to AVX512/AVX registers",
+                        [FeatureAVX, FeatureAES]>;
 def FeatureTBM     : SubtargetFeature<"tbm", "HasTBM", "true",
                                       "Enable TBM instructions">;
 def FeatureLWP     : SubtargetFeature<"lwp", "HasLWP", "true",
                                       "Enable LWP instructions">;
 def FeatureMOVBE   : SubtargetFeature<"movbe", "HasMOVBE", "true",
                                       "Support MOVBE instruction">;
 def FeatureRDRAND  : SubtargetFeature<"rdrnd", "HasRDRAND", "true",
                                       "Support RDRAND instruction">;

lib/Target/X86/X86InstrAVX512.td

def : Pat<(X86Movsd (v2f64 VR128X:$src1),
           (COPY_TO_REGCLASS FR64X:$src2, VR128X))>;
   }
 }
 
 defm : AVX512_scalar_math_f64_patterns<fadd, "ADD">;
 defm : AVX512_scalar_math_f64_patterns<fsub, "SUB">;
 defm : AVX512_scalar_math_f64_patterns<fmul, "MUL">;
 defm : AVX512_scalar_math_f64_patterns<fdiv, "DIV">;
+
+//===----------------------------------------------------------------------===//
+// AES instructions
+//===----------------------------------------------------------------------===//
+multiclass avx512_vaes<bits<8> Op, string OpStr, string IntPrefix> {
+  let Predicates = [HasVLX, HasVAES] in {
+    defm Z128 : AESI_binop_rm_int<Op, OpStr,
+                                  !cast<Intrinsic>(IntPrefix),
+                                  loadv2i64, 0, VR128X, i128mem>,
+                  EVEX_4V, EVEX_CD8<64, CD8VF>, EVEX_V128, VEX_WIG;
+    defm Z256 : AESI_binop_rm_int<Op, OpStr,
+                                  !cast<Intrinsic>(IntPrefix##"_256"),
+                                  loadv4i64, 0, VR256X, i256mem>,
+                  EVEX_4V, EVEX_CD8<64, CD8VF>, EVEX_V256, VEX_WIG;
+    }
+    let Predicates = [HasAVX512, HasVAES] in
+    defm Z    : AESI_binop_rm_int<Op, OpStr,
+                                  !cast<Intrinsic>(IntPrefix##"_512"),
+                                  loadv8i64, 0, VR512, i512mem>,
+                  EVEX_4V, EVEX_CD8<64, CD8VF>, EVEX_V512, VEX_WIG;
+}
+
+defm VAESENC      : avx512_vaes<0xDC, "vaesenc", "int_x86_aesni_aesenc">;
+defm VAESENCLAST  : avx512_vaes<0xDD, "vaesenclast", "int_x86_aesni_aesenclast">;
+defm VAESDEC      : avx512_vaes<0xDE, "vaesdec", "int_x86_aesni_aesdec">;
+defm VAESDECLAST  : avx512_vaes<0xDF, "vaesdeclast", "int_x86_aesni_aesdeclast">;
+

lib/Target/X86/X86InstrInfo.td

def HasVLX       : Predicate<"Subtarget->hasVLX()">,
                      AssemblerPredicate<"FeatureVLX", "AVX-512 VL ISA">;
 def NoVLX        : Predicate<"!Subtarget->hasVLX()">;
 def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
 def NoVLX_Or_NoDQI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasDQI()">;
 def PKU        : Predicate<"Subtarget->hasPKU()">;
 
 def HasPOPCNT    : Predicate<"Subtarget->hasPOPCNT()">;
 def HasAES       : Predicate<"Subtarget->hasAES()">;
+def HasVAES      : Predicate<"Subtarget->hasVAES()">;
+def NoVLX_Or_NoVAES : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVAES()">;
 def HasFXSR      : Predicate<"Subtarget->hasFXSR()">;
 def HasXSAVE     : Predicate<"Subtarget->hasXSAVE()">;
 def HasXSAVEOPT  : Predicate<"Subtarget->hasXSAVEOPT()">;
 def HasXSAVEC    : Predicate<"Subtarget->hasXSAVEC()">;
 def HasXSAVES    : Predicate<"Subtarget->hasXSAVES()">;
 def HasPCLMUL    : Predicate<"Subtarget->hasPCLMUL()">;
 def HasFMA       : Predicate<"Subtarget->hasFMA()">;
 def HasFMA4      : Predicate<"Subtarget->hasFMA4()">;

lib/Target/X86/X86InstrSSE.td

def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
                 (SHA256RNDS2rr VR128:$dst, VR128:$src2), 0>;
 def : InstAlias<"sha256rnds2\t{$src2, $dst|$dst, $src2}",
                 (SHA256RNDS2rm VR128:$dst, i128mem:$src2), 0>;
 
 //===----------------------------------------------------------------------===//
 // AES-NI Instructions
 //===----------------------------------------------------------------------===//
 
-multiclass AESI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId128,
-                             PatFrag ld_frag, bit Is2Addr = 1> {
-  def rr : AES8I<opc, MRMSrcReg, (outs VR128:$dst),
-       (ins VR128:$src1, VR128:$src2),
-       !if(Is2Addr,
-           !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
-           !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
-       [(set VR128:$dst, (IntId128 VR128:$src1, VR128:$src2))]>,
+multiclass AESI_binop_rm_int<bits<8> opc, string OpcodeStr,
+                             Intrinsic IntId, PatFrag ld_frag,
+                             bit Is2Addr = 0, RegisterClass RC = VR128,
+                             X86MemOperand MemOp = i128mem> {
+  let AsmString = OpcodeStr##
+                  !if(Is2Addr, "\t{$src2, $dst|$dst, $src2}",
+                               "\t{$src2, $src1, $dst|$dst, $src1, $src2}") in {
+    def rr : AES8I<opc, MRMSrcReg, (outs RC:$dst),
+                   (ins RC:$src1, RC:$src2), "",
+                   [(set RC:$dst, (IntId RC:$src1, RC:$src2))]>,
                    Sched<[WriteAESDecEnc]>;
-  def rm : AES8I<opc, MRMSrcMem, (outs VR128:$dst),
-       (ins VR128:$src1, i128mem:$src2),
-       !if(Is2Addr,
-           !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
-           !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
-       [(set VR128:$dst,
-         (IntId128 VR128:$src1, (ld_frag addr:$src2)))]>,
+    def rm : AES8I<opc, MRMSrcMem, (outs RC:$dst),
+                   (ins RC:$src1, MemOp:$src2), "",
+                   [(set RC:$dst, (IntId RC:$src1, (ld_frag addr:$src2)))]>,
                    Sched<[WriteAESDecEncLd, ReadAfterLd]>;
   }
+}
 
 // Perform One Round of an AES Encryption/Decryption Flow
-let Predicates = [HasAVX, HasAES] in {
+let Predicates = [HasAVX, NoVLX_Or_NoVAES, HasAES] in {
   defm VAESENC          : AESI_binop_rm_int<0xDC, "vaesenc",
-                         int_x86_aesni_aesenc, loadv2i64, 0>, VEX_4V, VEX_WIG;
+                         int_x86_aesni_aesenc, loadv2i64>, VEX_4V, VEX_WIG;
   defm VAESENCLAST      : AESI_binop_rm_int<0xDD, "vaesenclast",
-                         int_x86_aesni_aesenclast, loadv2i64, 0>, VEX_4V, VEX_WIG;
+                         int_x86_aesni_aesenclast, loadv2i64>, VEX_4V, VEX_WIG;
   defm VAESDEC          : AESI_binop_rm_int<0xDE, "vaesdec",
-                         int_x86_aesni_aesdec, loadv2i64, 0>, VEX_4V, VEX_WIG;
+                         int_x86_aesni_aesdec, loadv2i64>, VEX_4V, VEX_WIG;
   defm VAESDECLAST      : AESI_binop_rm_int<0xDF, "vaesdeclast",
-                         int_x86_aesni_aesdeclast, loadv2i64, 0>, VEX_4V, VEX_WIG;
+                         int_x86_aesni_aesdeclast, loadv2i64>, VEX_4V, VEX_WIG;
+}
+
+let Predicates = [NoVLX, HasVAES] in {
+  defm VAESENCY         : AESI_binop_rm_int<0xDC, "vaesenc",
+                         int_x86_aesni_aesenc_256, loadv4i64, 0, VR256,
+                         i256mem>, VEX_4V, VEX_L, VEX_WIG;
+  defm VAESENCLASTY     : AESI_binop_rm_int<0xDD, "vaesenclast",
+                         int_x86_aesni_aesenclast_256, loadv4i64, 0, VR256,
+                         i256mem>, VEX_4V, VEX_L, VEX_WIG;
+  defm VAESDECY         : AESI_binop_rm_int<0xDE, "vaesdec",
+                         int_x86_aesni_aesdec_256, loadv4i64, 0, VR256,
+                         i256mem>, VEX_4V, VEX_L, VEX_WIG;
+  defm VAESDECLASTY     : AESI_binop_rm_int<0xDF, "vaesdeclast",
+                         int_x86_aesni_aesdeclast_256, loadv4i64, 0, VR256,
+                         i256mem>, VEX_4V, VEX_L, VEX_WIG;
 }
 
 let Constraints = "$src1 = $dst" in {
   defm AESENC          : AESI_binop_rm_int<0xDC, "aesenc",
-                         int_x86_aesni_aesenc, memopv2i64>;
+                         int_x86_aesni_aesenc, memopv2i64, 1>;
   defm AESENCLAST      : AESI_binop_rm_int<0xDD, "aesenclast",
-                         int_x86_aesni_aesenclast, memopv2i64>;
+                         int_x86_aesni_aesenclast, memopv2i64, 1>;
   defm AESDEC          : AESI_binop_rm_int<0xDE, "aesdec",
-                         int_x86_aesni_aesdec, memopv2i64>;
+                         int_x86_aesni_aesdec, memopv2i64, 1>;
   defm AESDECLAST      : AESI_binop_rm_int<0xDF, "aesdeclast",
-                         int_x86_aesni_aesdeclast, memopv2i64>;
+                         int_x86_aesni_aesdeclast, memopv2i64, 1>;
 }
 
 // Perform the AES InvMixColumn Transformation
 let Predicates = [HasAVX, HasAES] in {
   def VAESIMCrr : AES8I<0xDB, MRMSrcReg, (outs VR128:$dst),
       (ins VR128:$src1),
       "vaesimc\t{$src1, $dst|$dst, $src1}",
       [(set VR128:$dst,

lib/Target/X86/X86Subtarget.h

protected:
   /// True if the processor supports POPCNT.
   bool HasPOPCNT;
 
   /// True if the processor supports SSE4A instructions.
   bool HasSSE4A;
 
   /// Target has AES instructions
   bool HasAES;
+  bool HasVAES;
 
   /// Target has FXSAVE/FXRESTOR instructions
   bool HasFXSR;
 
   /// Target has XSAVE instructions
   bool HasXSAVE;
 
   /// Target has XSAVEOPT instructions
public:
   bool hasFp256() const { return hasAVX(); }
   bool hasInt256() const { return hasAVX2(); }
   bool hasSSE4A() const { return HasSSE4A; }
   bool hasMMX() const { return X863DNowLevel >= MMX; }
   bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
   bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
   bool hasPOPCNT() const { return HasPOPCNT; }
   bool hasAES() const { return HasAES; }
+  bool hasVAES() const { return HasVAES; }
   bool hasFXSR() const { return HasFXSR; }
   bool hasXSAVE() const { return HasXSAVE; }
   bool hasXSAVEOPT() const { return HasXSAVEOPT; }
   bool hasXSAVEC() const { return HasXSAVEC; }
   bool hasXSAVES() const { return HasXSAVES; }
   bool hasPCLMUL() const { return HasPCLMUL; }
   // Prefer FMA4 to FMA - its better for commutation/memory folding and
   // has equal or better performance on all supported targets.

lib/Target/X86/X86Subtarget.cpp

void X86Subtarget::initializeEnvironment() {
   X86SSELevel = NoSSE;
   X863DNowLevel = NoThreeDNow;
   HasX87 = false;
   HasCMov = false;
   HasX86_64 = false;
   HasPOPCNT = false;
   HasSSE4A = false;
   HasAES = false;
+  HasVAES = false;
   HasFXSR = false;
   HasXSAVE = false;
   HasXSAVEOPT = false;
   HasXSAVEC = false;
   HasXSAVES = false;
   HasPCLMUL = false;
   HasFMA = false;
   HasFMA4 = false;

test/CodeGen/X86/vaes-intrinsics-avx-x86.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+vaes -show-mc-encoding | FileCheck %s --check-prefix=VAES_AVX
+
+; {vaes, avx}
+define <4 x i64> @test_x86_aesni_aesenc_256(<4 x i64> %a0, <4 x i64> %a1) {
+; VAES_AVX-LABEL: test_x86_aesni_aesenc_256:
+; VAES_AVX:       # BB#0:
+; VAES_AVX-NEXT:    vaesenc %ymm1, %ymm0, %ymm0 # encoding: [0xc4,0xe2,0x7d,0xdc,0xc1]
+; VAES_AVX-NEXT:    retl # encoding: [0xc3]
+  %res = call <4 x i64> @llvm.x86.aesni.aesenc.256(<4 x i64> %a0, <4 x i64> %a1)
+  ret <4 x i64> %res
+}
+declare <4 x i64> @llvm.x86.aesni.aesenc.256(<4 x i64>, <4 x i64>) nounwind readnone

test/CodeGen/X86/vaes-intrinsics-avx512-x86.ll

+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+vaes,+avx512f -show-mc-encoding | FileCheck %s --check-prefix=VAES_AVX512
+
+define <8 x i64> @test_x86_aesni_aesenc_512(<8 x i64> %a0, <8 x i64> %a1) {
+; VAES_AVX512-LABEL: test_x86_aesni_aesenc_512:
+; VAES_AVX512:       # BB#0:
+; VAES_AVX512-NEXT:    vaesenc %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0xdc,0xc1]
+; VAES_AVX512-NEXT:    retq # encoding: [0xc3]
+  %res = call <8 x i64> @llvm.x86.aesni.aesenc.512(<8 x i64> %a0, <8 x i64> %a1)
+  ret <8 x i64> %res
+}
+declare <8 x i64> @llvm.x86.aesni.aesenc.512(<8 x i64>, <8 x i64>) nounwind readnone
+
+define <8 x i64> @test_x86_aesni_aesenclast_512(<8 x i64> %a0, <8 x i64> %a1) {
+; VAES_AVX512-LABEL: test_x86_aesni_aesenclast_512:
+; VAES_AVX512:       # BB#0:
+; VAES_AVX512-NEXT:    vaesenclast %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0xdd,0xc1]
+; VAES_AVX512-NEXT:    retq # encoding: [0xc3]
+  %res = call <8 x i64> @llvm.x86.aesni.aesenclast.512(<8 x i64> %a0, <8 x i64> %a1)
+  ret <8 x i64> %res
+}
+declare <8 x i64> @llvm.x86.aesni.aesenclast.512(<8 x i64>, <8 x i64>) nounwind readnone
+
+define <8 x i64> @test_x86_aesni_aesdec_512(<8 x i64> %a0, <8 x i64> %a1) {
+; VAES_AVX512-LABEL: test_x86_aesni_aesdec_512:
+; VAES_AVX512:       # BB#0:
+; VAES_AVX512-NEXT:    vaesdec %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0xde,0xc1]
+; VAES_AVX512-NEXT:    retq # encoding: [0xc3]
+  %res = call <8 x i64> @llvm.x86.aesni.aesdec.512(<8 x i64> %a0, <8 x i64> %a1)
+  ret <8 x i64> %res
+}
+declare <8 x i64> @llvm.x86.aesni.aesdec.512(<8 x i64>, <8 x i64>) nounwind readnone
+
+define <8 x i64> @test_x86_aesni_aesdeclast_512(<8 x i64> %a0, <8 x i64> %a1) {
+; VAES_AVX512-LABEL: test_x86_aesni_aesdeclast_512:
+; VAES_AVX512:       # BB#0:
+; VAES_AVX512-NEXT:    vaesdeclast %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0xdf,0xc1]
+; VAES_AVX512-NEXT:    retq # encoding: [0xc3]
+  %res = call <8 x i64> @llvm.x86.aesni.aesdeclast.512(<8 x i64> %a0, <8 x i64> %a1)
+  ret <8 x i64> %res
+}
+declare <8 x i64> @llvm.x86.aesni.aesdeclast.512(<8 x i64>, <8 x i64>) nounwind readnone
+

test/CodeGen/X86/vaes-intrinsics-avx512vl-x86.ll

+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+vaes,+avx512f,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=VAES_AVX512VL
+
+define <2 x i64> @test_x86_aesni_aesenc(<2 x i64> %a0, <2 x i64> %a1) {
+; VAES_AVX512VL-LABEL: test_x86_aesni_aesenc:
+; VAES_AVX512VL:       # BB#0:
+; VAES_AVX512VL-NEXT:    vaesenc %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0xdc,0xc1]
+; VAES_AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %res = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1)
+  ret <2 x i64> %res
+}
+declare <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <4 x i64> @test_x86_aesni_aesenc_256(<4 x i64> %a0, <4 x i64> %a1) {
+; VAES_AVX512VL-LABEL: test_x86_aesni_aesenc_256:
+; VAES_AVX512VL:       # BB#0:
+; VAES_AVX512VL-NEXT:    vaesenc %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0xdc,0xc1]
+; VAES_AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %res = call <4 x i64> @llvm.x86.aesni.aesenc.256(<4 x i64> %a0, <4 x i64> %a1)
+  ret <4 x i64> %res
+}
+declare <4 x i64> @llvm.x86.aesni.aesenc.256(<4 x i64>, <4 x i64>) nounwind readnone
+
+define <2 x i64> @test_x86_aesni_aesenclast(<2 x i64> %a0, <2 x i64> %a1) {
+; VAES_AVX512VL-LABEL: test_x86_aesni_aesenclast:
+; VAES_AVX512VL:       # BB#0:
+; VAES_AVX512VL-NEXT:    vaesenclast %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0xdd,0xc1]
+; VAES_AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %res = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %a0, <2 x i64> %a1)
+  ret <2 x i64> %res
+}
+declare <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <4 x i64> @test_x86_aesni_aesenclast_256(<4 x i64> %a0, <4 x i64> %a1) {
+; VAES_AVX512VL-LABEL: test_x86_aesni_aesenclast_256:
+; VAES_AVX512VL:       # BB#0:
+; VAES_AVX512VL-NEXT:    vaesenclast %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0xdd,0xc1]
+; VAES_AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %res = call <4 x i64> @llvm.x86.aesni.aesenclast.256(<4 x i64> %a0, <4 x i64> %a1)
+  ret <4 x i64> %res
+}
+declare <4 x i64> @llvm.x86.aesni.aesenclast.256(<4 x i64>, <4 x i64>) nounwind readnone
+
+define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) {
+; VAES_AVX512VL-LABEL: test_x86_aesni_aesdec:
+; VAES_AVX512VL:       # BB#0:
+; VAES_AVX512VL-NEXT:    vaesdec %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0xde,0xc1]
+; VAES_AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1)
+  ret <2 x i64> %res
+}
+declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <4 x i64> @test_x86_aesni_aesdec_256(<4 x i64> %a0, <4 x i64> %a1) {
+; VAES_AVX512VL-LABEL: test_x86_aesni_aesdec_256:
+; VAES_AVX512VL:       # BB#0:
+; VAES_AVX512VL-NEXT:    vaesdec %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0xde,0xc1]
+; VAES_AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %res = call <4 x i64> @llvm.x86.aesni.aesdec.256(<4 x i64> %a0, <4 x i64> %a1)
+  ret <4 x i64> %res
+}
+declare <4 x i64> @llvm.x86.aesni.aesdec.256(<4 x i64>, <4 x i64>) nounwind readnone
+
+define <2 x i64> @test_x86_aesni_aesdeclast(<2 x i64> %a0, <2 x i64> %a1) {
+; VAES_AVX512VL-LABEL: test_x86_aesni_aesdeclast:
+; VAES_AVX512VL:       # BB#0:
+; VAES_AVX512VL-NEXT:    vaesdeclast %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0xdf,0xc1]
+; VAES_AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %res = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1)
+  ret <2 x i64> %res
+}
+declare <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64>, <2 x i64>) nounwind readnone
+
+define <4 x i64> @test_x86_aesni_aesdeclast_256(<4 x i64> %a0, <4 x i64> %a1) {
+; VAES_AVX512VL-LABEL: test_x86_aesni_aesdeclast_256:
+; VAES_AVX512VL:       # BB#0:
+; VAES_AVX512VL-NEXT:    vaesdeclast %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0xdf,0xc1]
+; VAES_AVX512VL-NEXT:    retq # encoding: [0xc3]
+  %res = call <4 x i64> @llvm.x86.aesni.aesdeclast.256(<4 x i64> %a0, <4 x i64> %a1)
+  ret <4 x i64> %res
+}
+declare <4 x i64> @llvm.x86.aesni.aesdeclast.256(<4 x i64>, <4 x i64>) nounwind readnone
+

test/MC/X86/avx512vaes-encoding.s

+// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+vaes --show-encoding < %s  | FileCheck %s
+
+// CHECK: vaesenc %zmm3, %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdc,0xeb]
+          vaesenc %zmm3, %zmm2, %zmm21
+
+// CHECK: vaesenclast %zmm3, %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdd,0xeb]
+          vaesenclast %zmm3, %zmm2, %zmm21
+
+// CHECK: vaesdec %zmm3, %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xde,0xeb]
+          vaesdec %zmm3, %zmm2, %zmm21
+
+// CHECK: vaesdeclast %zmm3, %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdf,0xeb]
+          vaesdeclast %zmm3, %zmm2, %zmm21
+
+// CHECK: vaesenc  (%rcx), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdc,0x29]
+          vaesenc  (%rcx), %zmm2, %zmm21
+
+// CHECK: vaesenc  -256(%rsp), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdc,0x6c,0x24,0xfc]
+          vaesenc  -256(%rsp), %zmm2, %zmm21
+
+// CHECK: vaesenc  256(%rsp), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdc,0x6c,0x24,0x04]
+          vaesenc  256(%rsp), %zmm2, %zmm21
+
+// CHECK: vaesenc  268435456(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xdc,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesenc  268435456(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesenc  -536870912(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xdc,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesenc  -536870912(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesenc  -536870910(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xdc,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesenc  -536870910(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesenclast  (%rcx), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdd,0x29]
+          vaesenclast  (%rcx), %zmm2, %zmm21
+
+// CHECK: vaesenclast  -256(%rsp), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdd,0x6c,0x24,0xfc]
+          vaesenclast  -256(%rsp), %zmm2, %zmm21
+
+// CHECK: vaesenclast  256(%rsp), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdd,0x6c,0x24,0x04]
+          vaesenclast  256(%rsp), %zmm2, %zmm21
+
+// CHECK: vaesenclast  268435456(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xdd,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesenclast  268435456(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesenclast  -536870912(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xdd,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesenclast  -536870912(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesenclast  -536870910(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xdd,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesenclast  -536870910(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesdec  (%rcx), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xde,0x29]
+          vaesdec  (%rcx), %zmm2, %zmm21
+
+// CHECK: vaesdec  -256(%rsp), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xde,0x6c,0x24,0xfc]
+          vaesdec  -256(%rsp), %zmm2, %zmm21
+
+// CHECK: vaesdec  256(%rsp), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xde,0x6c,0x24,0x04]
+          vaesdec  256(%rsp), %zmm2, %zmm21
+
+// CHECK: vaesdec  268435456(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xde,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesdec  268435456(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesdec  -536870912(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xde,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesdec  -536870912(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesdec  -536870910(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xde,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesdec  -536870910(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesdeclast  (%rcx), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdf,0x29]
+          vaesdeclast  (%rcx), %zmm2, %zmm21
+
+// CHECK: vaesdeclast  -256(%rsp), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdf,0x6c,0x24,0xfc]
+          vaesdeclast  -256(%rsp), %zmm2, %zmm21
+
+// CHECK: vaesdeclast  256(%rsp), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x48,0xdf,0x6c,0x24,0x04]
+          vaesdeclast  256(%rsp), %zmm2, %zmm21
+
+// CHECK: vaesdeclast  268435456(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xdf,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesdeclast  268435456(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesdeclast  -536870912(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xdf,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesdeclast  -536870912(%rcx,%r14,8), %zmm2, %zmm21
+
+// CHECK: vaesdeclast  -536870910(%rcx,%r14,8), %zmm2, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x48,0xdf,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesdeclast  -536870910(%rcx,%r14,8), %zmm2, %zmm21
+

test/MC/X86/avx512vl_vaes-encoding.s

+//RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=skx -mattr=+vaes --show-encoding < %s  | FileCheck %s
+
+// CHECK: vaesenc %xmm3, %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdc,0xeb]
+          vaesenc %xmm3, %xmm2, %xmm21
+
+// CHECK: vaesenclast %xmm3, %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdd,0xeb]
+          vaesenclast %xmm3, %xmm2, %xmm21
+
+// CHECK: vaesdec %xmm3, %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xde,0xeb]
+          vaesdec %xmm3, %xmm2, %xmm21
+
+// CHECK: vaesdeclast %xmm3, %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdf,0xeb]
+          vaesdeclast %xmm3, %xmm2, %xmm21
+
+// CHECK: vaesenc  (%rcx), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdc,0x29]
+          vaesenc  (%rcx), %xmm2, %xmm21
+
+// CHECK: vaesenc  -64(%rsp), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdc,0x6c,0x24,0xfc]
+          vaesenc  -64(%rsp), %xmm2, %xmm21
+
+// CHECK: vaesenc  64(%rsp), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdc,0x6c,0x24,0x04]
+          vaesenc  64(%rsp), %xmm2, %xmm21
+
+// CHECK: vaesenc  268435456(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xdc,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesenc  268435456(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesenc  -536870912(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xdc,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesenc  -536870912(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesenc  -536870910(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xdc,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesenc  -536870910(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesenclast  (%rcx), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdd,0x29]
+          vaesenclast  (%rcx), %xmm2, %xmm21
+
+// CHECK: vaesenclast  -64(%rsp), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdd,0x6c,0x24,0xfc]
+          vaesenclast  -64(%rsp), %xmm2, %xmm21
+
+// CHECK: vaesenclast  64(%rsp), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdd,0x6c,0x24,0x04]
+          vaesenclast  64(%rsp), %xmm2, %xmm21
+
+// CHECK: vaesenclast  268435456(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xdd,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesenclast  268435456(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesenclast  -536870912(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xdd,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesenclast  -536870912(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesenclast  -536870910(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xdd,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesenclast  -536870910(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesdec  (%rcx), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xde,0x29]
+          vaesdec  (%rcx), %xmm2, %xmm21
+
+// CHECK: vaesdec  -64(%rsp), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xde,0x6c,0x24,0xfc]
+          vaesdec  -64(%rsp), %xmm2, %xmm21
+
+// CHECK: vaesdec  64(%rsp), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xde,0x6c,0x24,0x04]
+          vaesdec  64(%rsp), %xmm2, %xmm21
+
+// CHECK: vaesdec  268435456(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xde,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesdec  268435456(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesdec  -536870912(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xde,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesdec  -536870912(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesdec  -536870910(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xde,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesdec  -536870910(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesdeclast  (%rcx), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdf,0x29]
+          vaesdeclast  (%rcx), %xmm2, %xmm21
+
+// CHECK: vaesdeclast  -64(%rsp), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdf,0x6c,0x24,0xfc]
+          vaesdeclast  -64(%rsp), %xmm2, %xmm21
+
+// CHECK: vaesdeclast  64(%rsp), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x08,0xdf,0x6c,0x24,0x04]
+          vaesdeclast  64(%rsp), %xmm2, %xmm21
+
+// CHECK: vaesdeclast  268435456(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xdf,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesdeclast  268435456(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesdeclast  -536870912(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xdf,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesdeclast  -536870912(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesdeclast  -536870910(%rcx,%r14,8), %xmm2, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x08,0xdf,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesdeclast  -536870910(%rcx,%r14,8), %xmm2, %xmm21
+
+// CHECK: vaesenc %ymm3, %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdc,0xeb]
+          vaesenc %ymm3, %ymm2, %ymm21
+
+// CHECK: vaesenclast %ymm3, %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdd,0xeb]
+          vaesenclast %ymm3, %ymm2, %ymm21
+
+// CHECK: vaesdec %ymm3, %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xde,0xeb]
+          vaesdec %ymm3, %ymm2, %ymm21
+
+// CHECK: vaesdeclast %ymm3, %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdf,0xeb]
+          vaesdeclast %ymm3, %ymm2, %ymm21
+
+// CHECK: vaesenc  (%rcx), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdc,0x29]
+          vaesenc  (%rcx), %ymm2, %ymm21
+
+// CHECK: vaesenc  -128(%rsp), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdc,0x6c,0x24,0xfc]
+          vaesenc  -128(%rsp), %ymm2, %ymm21
+
+// CHECK: vaesenc  128(%rsp), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdc,0x6c,0x24,0x04]
+          vaesenc  128(%rsp), %ymm2, %ymm21
+
+// CHECK: vaesenc  268435456(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xdc,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesenc  268435456(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesenc  -536870912(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xdc,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesenc  -536870912(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesenc  -536870910(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xdc,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesenc  -536870910(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesenclast  (%rcx), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdd,0x29]
+          vaesenclast  (%rcx), %ymm2, %ymm21
+
+// CHECK: vaesenclast  -128(%rsp), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdd,0x6c,0x24,0xfc]
+          vaesenclast  -128(%rsp), %ymm2, %ymm21
+
+// CHECK: vaesenclast  128(%rsp), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdd,0x6c,0x24,0x04]
+          vaesenclast  128(%rsp), %ymm2, %ymm21
+
+// CHECK: vaesenclast  268435456(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xdd,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesenclast  268435456(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesenclast  -536870912(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xdd,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesenclast  -536870912(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesenclast  -536870910(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xdd,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesenclast  -536870910(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesdec  (%rcx), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xde,0x29]
+          vaesdec  (%rcx), %ymm2, %ymm21
+
+// CHECK: vaesdec  -128(%rsp), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xde,0x6c,0x24,0xfc]
+          vaesdec  -128(%rsp), %ymm2, %ymm21
+
+// CHECK: vaesdec  128(%rsp), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xde,0x6c,0x24,0x04]
+          vaesdec  128(%rsp), %ymm2, %ymm21
+
+// CHECK: vaesdec  268435456(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xde,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesdec  268435456(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesdec  -536870912(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xde,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesdec  -536870912(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesdec  -536870910(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xde,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesdec  -536870910(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesdeclast  (%rcx), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdf,0x29]
+          vaesdeclast  (%rcx), %ymm2, %ymm21
+
+// CHECK: vaesdeclast  -128(%rsp), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdf,0x6c,0x24,0xfc]
+          vaesdeclast  -128(%rsp), %ymm2, %ymm21
+
+// CHECK: vaesdeclast  128(%rsp), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xe2,0x6d,0x28,0xdf,0x6c,0x24,0x04]
+          vaesdeclast  128(%rsp), %ymm2, %ymm21
+
+// CHECK: vaesdeclast  268435456(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xdf,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vaesdeclast  268435456(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesdeclast  -536870912(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xdf,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vaesdeclast  -536870912(%rcx,%r14,8), %ymm2, %ymm21
+
+// CHECK: vaesdeclast  -536870910(%rcx,%r14,8), %ymm2, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x6d,0x28,0xdf,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vaesdeclast  -536870910(%rcx,%r14,8), %ymm2, %ymm21
+

test/MC/X86/avx_vaes-encoding.s

+// RUN: llvm-mc -triple x86_64-unknown-unknown -mattr=vaes --show-encoding %s | FileCheck %s
+
+// CHECK: vaesenc %ymm3, %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdc,0xcb]
+          vaesenc %ymm3, %ymm2, %ymm1
+
+// CHECK: vaesenclast %ymm3, %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdd,0xcb]
+          vaesenclast %ymm3, %ymm2, %ymm1
+
+// CHECK: vaesdec %ymm3, %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xde,0xcb]
+          vaesdec %ymm3, %ymm2, %ymm1
+
+// CHECK: vaesdeclast %ymm3, %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdf,0xcb]
+          vaesdeclast %ymm3, %ymm2, %ymm1
+
+// CHECK: vaesenc  (%rcx), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdc,0x09]
+          vaesenc  (%rcx), %ymm2, %ymm1
+
+// CHECK: vaesenc  -4(%rsp), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdc,0x4c,0x24,0xfc]
+          vaesenc  -4(%rsp), %ymm2, %ymm1
+
+// CHECK: vaesenc  4(%rsp), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdc,0x4c,0x24,0x04]
+          vaesenc  4(%rsp), %ymm2, %ymm1
+
+// CHECK: vaesenc  268435456(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xdc,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vaesenc  268435456(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesenc  -536870912(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xdc,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vaesenc  -536870912(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesenc  -536870910(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xdc,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vaesenc  -536870910(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesenclast  (%rcx), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdd,0x09]
+          vaesenclast  (%rcx), %ymm2, %ymm1
+
+// CHECK: vaesenclast  -4(%rsp), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdd,0x4c,0x24,0xfc]
+          vaesenclast  -4(%rsp), %ymm2, %ymm1
+
+// CHECK: vaesenclast  4(%rsp), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdd,0x4c,0x24,0x04]
+          vaesenclast  4(%rsp), %ymm2, %ymm1
+
+// CHECK: vaesenclast  268435456(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xdd,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vaesenclast  268435456(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesenclast  -536870912(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xdd,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vaesenclast  -536870912(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesenclast  -536870910(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xdd,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vaesenclast  -536870910(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesdec  (%rcx), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xde,0x09]
+          vaesdec  (%rcx), %ymm2, %ymm1
+
+// CHECK: vaesdec  -4(%rsp), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xde,0x4c,0x24,0xfc]
+          vaesdec  -4(%rsp), %ymm2, %ymm1
+
+// CHECK: vaesdec  4(%rsp), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xde,0x4c,0x24,0x04]
+          vaesdec  4(%rsp), %ymm2, %ymm1
+
+// CHECK: vaesdec  268435456(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xde,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vaesdec  268435456(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesdec  -536870912(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xde,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vaesdec  -536870912(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesdec  -536870910(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xde,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vaesdec  -536870910(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesdeclast  (%rcx), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdf,0x09]
+          vaesdeclast  (%rcx), %ymm2, %ymm1
+
+// CHECK: vaesdeclast  -4(%rsp), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdf,0x4c,0x24,0xfc]
+          vaesdeclast  -4(%rsp), %ymm2, %ymm1
+
+// CHECK: vaesdeclast  4(%rsp), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xe2,0x6d,0xdf,0x4c,0x24,0x04]
+          vaesdeclast  4(%rsp), %ymm2, %ymm1
+
+// CHECK: vaesdeclast  268435456(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xdf,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vaesdeclast  268435456(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesdeclast  -536870912(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xdf,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vaesdeclast  -536870912(%rcx,%r14,8), %ymm2, %ymm1
+
+// CHECK: vaesdeclast  -536870910(%rcx,%r14,8), %ymm2, %ymm1
+// CHECK: encoding: [0xc4,0xa2,0x6d,0xdf,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vaesdeclast  -536870910(%rcx,%r14,8), %ymm2, %ymm1
+