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[X86][Broadwell] Added the instruction scheduling information for the Broadwell CPU.
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Authored by gadi.haber on Oct 18 2017, 7:08 AM.

Details

Summary

Adding the scheduling information for the Browadwell (BDW) CPU target.

This patch adds the instruction scheduling information for the Broadwell (BDW) architecture target by adding the file X86SchedBroadwell.td located under the X86 Target.
We used the scheduling information retrieved from the Broadwell architects in order to create the file.
The scheduling information includes latency, number of micro-Ops and used ports by each BDW instruction.

The patch continues the scheduling replacement and insertion effort started with the SandyBridge (SNB) target in r310792, the Haswell (HSW) target in r311879, the SkylakeClient (SKL) target in rL313613 + rL315978 and the SkylakeServer (SKX) in rL315175.

Performance fluctuations may be expected due to code alignment effects.

Diff Detail

Repository
rL LLVM

Event Timeline

gadi.haber created this revision.Oct 18 2017, 7:08 AM
RKSimon added inline comments.Oct 18 2017, 7:42 AM
lib/Target/X86/X86.td
579

Other CPUs are still using HaswellModel (KNL, KNM + CannonLake) - is that correct?

gadi.haber edited the summary of this revision. (Show Details)Oct 18 2017, 7:56 AM
gadi.haber added inline comments.Oct 21 2017, 11:10 PM
lib/Target/X86/X86.td
579

Sorry for the delayed response. Was on a short vacation,
The answer is yes: KNL, KNM and CannonLake are currently all using the Haswell Model.

RKSimon accepted this revision.Oct 23 2017, 5:38 AM

LGTM.

lib/Target/X86/X86.td
579

OK none of this should affect this patch. I expected CannonLake to use the SkylakeServer model. The KNL/KNM architectures are very different to Haswell so I'd have expected something closer to SLM?

This revision is now accepted and ready to land.Oct 23 2017, 5:38 AM
This revision was automatically updated to reflect the committed changes.
lib/Target/X86/X86.td