[X86] Add missing entries in 'MemoryFoldTable2Addr' to get complete form of the table

[aymanmus]

Summary

Get the folding table 'MemoryFoldTable2Addr' to a complete state as part of the process explained in D38028

[RKSimon]

It'd be really great if we could get tests for more of this. We're really weak on non-SSE/AVX stack-folding tests for instance.

[craig.topper]

Most of this is NFC because we don't select any of these instructions during isel.

The only ones that might be a functional change are the ADC/SBB instructions.

[craig.topper]

LGTM

lib/Target/X86/X86InstrInfo.cpp

: X86GenInstrInfo((STI.isTarget64BitLP64() ? X86::ADJCALLSTACKDOWN64
                                                : X86::ADJCALLSTACKDOWN32),
                       (STI.isTarget64BitLP64() ? X86::ADJCALLSTACKUP64
                                                : X86::ADJCALLSTACKUP32),
                       X86::CATCHRET,
                       (STI.is64Bit() ? X86::RETQ : X86::RETL)),
       Subtarget(STI), RI(STI.getTargetTriple()) {
 
   static const X86MemoryFoldTableEntry MemoryFoldTable2Addr[] = {
+    { X86::ADC16ri,     X86::ADC16mi,    0 },
+    { X86::ADC16ri8,    X86::ADC16mi8,   0 },
+    { X86::ADC16rr,     X86::ADC16mr,    0 },
     { X86::ADC32ri,     X86::ADC32mi,    0 },
     { X86::ADC32ri8,    X86::ADC32mi8,   0 },
     { X86::ADC32rr,     X86::ADC32mr,    0 },
     { X86::ADC64ri32,   X86::ADC64mi32,  0 },
     { X86::ADC64ri8,    X86::ADC64mi8,   0 },
     { X86::ADC64rr,     X86::ADC64mr,    0 },
+    { X86::ADC8ri,      X86::ADC8mi,     0 },
+    { X86::ADC8ri8,     X86::ADC8mi8,    0 },
+    { X86::ADC8rr,      X86::ADC8mr,     0 },
     { X86::ADD16ri,     X86::ADD16mi,    0 },
     { X86::ADD16ri8,    X86::ADD16mi8,   0 },
     { X86::ADD16ri_DB,  X86::ADD16mi,    TB_NO_REVERSE },
     { X86::ADD16ri8_DB, X86::ADD16mi8,   TB_NO_REVERSE },
     { X86::ADD16rr,     X86::ADD16mr,    0 },
     { X86::ADD16rr_DB,  X86::ADD16mr,    TB_NO_REVERSE },
     { X86::ADD32ri,     X86::ADD32mi,    0 },
     { X86::ADD32ri8,    X86::ADD32mi8,   0 },
     { X86::ADD32ri_DB,  X86::ADD32mi,    TB_NO_REVERSE },
     { X86::ADD32ri8_DB, X86::ADD32mi8,   TB_NO_REVERSE },
     { X86::ADD32rr,     X86::ADD32mr,    0 },
     { X86::ADD32rr_DB,  X86::ADD32mr,    TB_NO_REVERSE },
     { X86::ADD64ri32,   X86::ADD64mi32,  0 },
     { X86::ADD64ri8,    X86::ADD64mi8,   0 },
     { X86::ADD64ri32_DB,X86::ADD64mi32,  TB_NO_REVERSE },
     { X86::ADD64ri8_DB, X86::ADD64mi8,   TB_NO_REVERSE },
     { X86::ADD64rr,     X86::ADD64mr,    0 },
     { X86::ADD64rr_DB,  X86::ADD64mr,    TB_NO_REVERSE },
     { X86::ADD8ri,      X86::ADD8mi,     0 },
+    { X86::ADD8ri8,     X86::ADD8mi8,    0 },
     { X86::ADD8rr,      X86::ADD8mr,     0 },
     { X86::AND16ri,     X86::AND16mi,    0 },
     { X86::AND16ri8,    X86::AND16mi8,   0 },
     { X86::AND16rr,     X86::AND16mr,    0 },
     { X86::AND32ri,     X86::AND32mi,    0 },
     { X86::AND32ri8,    X86::AND32mi8,   0 },
     { X86::AND32rr,     X86::AND32mr,    0 },
     { X86::AND64ri32,   X86::AND64mi32,  0 },
     { X86::AND64ri8,    X86::AND64mi8,   0 },
     { X86::AND64rr,     X86::AND64mr,    0 },
     { X86::AND8ri,      X86::AND8mi,     0 },
+    { X86::AND8ri8,     X86::AND8mi8,    0 },
     { X86::AND8rr,      X86::AND8mr,     0 },
+    { X86::BTC16ri8,    X86::BTC16mi8,   0 },
+    { X86::BTC32ri8,    X86::BTC32mi8,   0 },
+    { X86::BTC64ri8,    X86::BTC64mi8,   0 },
+    { X86::BTR16ri8,    X86::BTR16mi8,   0 },
+    { X86::BTR32ri8,    X86::BTR32mi8,   0 },
+    { X86::BTR64ri8,    X86::BTR64mi8,   0 },
+    { X86::BTS16ri8,    X86::BTS16mi8,   0 },
+    { X86::BTS32ri8,    X86::BTS32mi8,   0 },
+    { X86::BTS64ri8,    X86::BTS64mi8,   0 },
     { X86::DEC16r,      X86::DEC16m,     0 },
     { X86::DEC32r,      X86::DEC32m,     0 },
     { X86::DEC64r,      X86::DEC64m,     0 },
     { X86::DEC8r,       X86::DEC8m,      0 },
     { X86::INC16r,      X86::INC16m,     0 },
     { X86::INC32r,      X86::INC32m,     0 },
     { X86::INC64r,      X86::INC64m,     0 },
     { X86::INC8r,       X86::INC8m,      0 },
static const X86MemoryFoldTableEntry MemoryFoldTable2Addr[] = {
     { X86::OR16rr,      X86::OR16mr,     0 },
     { X86::OR32ri,      X86::OR32mi,     0 },
     { X86::OR32ri8,     X86::OR32mi8,    0 },
     { X86::OR32rr,      X86::OR32mr,     0 },
     { X86::OR64ri32,    X86::OR64mi32,   0 },
     { X86::OR64ri8,     X86::OR64mi8,    0 },
     { X86::OR64rr,      X86::OR64mr,     0 },
     { X86::OR8ri,       X86::OR8mi,      0 },
+    { X86::OR8ri8,      X86::OR8mi8,     0 },
     { X86::OR8rr,       X86::OR8mr,      0 },
+    { X86::RCL16r1,     X86::RCL16m1,    0 },
+    { X86::RCL16rCL,    X86::RCL16mCL,   0 },
+    { X86::RCL16ri,     X86::RCL16mi,    0 },
+    { X86::RCL32r1,     X86::RCL32m1,    0 },
+    { X86::RCL32rCL,    X86::RCL32mCL,   0 },
+    { X86::RCL32ri,     X86::RCL32mi,    0 },
+    { X86::RCL64r1,     X86::RCL64m1,    0 },
+    { X86::RCL64rCL,    X86::RCL64mCL,   0 },
+    { X86::RCL64ri,     X86::RCL64mi,    0 },
+    { X86::RCL8r1,      X86::RCL8m1,     0 },
+    { X86::RCL8rCL,     X86::RCL8mCL,    0 },
+    { X86::RCL8ri,      X86::RCL8mi,     0 },
+    { X86::RCR16r1,     X86::RCR16m1,    0 },
+    { X86::RCR16rCL,    X86::RCR16mCL,   0 },
+    { X86::RCR16ri,     X86::RCR16mi,    0 },
+    { X86::RCR32r1,     X86::RCR32m1,    0 },
+    { X86::RCR32rCL,    X86::RCR32mCL,   0 },
+    { X86::RCR32ri,     X86::RCR32mi,    0 },
+    { X86::RCR64r1,     X86::RCR64m1,    0 },
+    { X86::RCR64rCL,    X86::RCR64mCL,   0 },
+    { X86::RCR64ri,     X86::RCR64mi,    0 },
+    { X86::RCR8r1,      X86::RCR8m1,     0 },
+    { X86::RCR8rCL,     X86::RCR8mCL,    0 },
+    { X86::RCR8ri,      X86::RCR8mi,     0 },
     { X86::ROL16r1,     X86::ROL16m1,    0 },
     { X86::ROL16rCL,    X86::ROL16mCL,   0 },
     { X86::ROL16ri,     X86::ROL16mi,    0 },
     { X86::ROL32r1,     X86::ROL32m1,    0 },
     { X86::ROL32rCL,    X86::ROL32mCL,   0 },
     { X86::ROL32ri,     X86::ROL32mi,    0 },
     { X86::ROL64r1,     X86::ROL64m1,    0 },
     { X86::ROL64rCL,    X86::ROL64mCL,   0 },
static const X86MemoryFoldTableEntry MemoryFoldTable2Addr[] = {
     { X86::SAR32rCL,    X86::SAR32mCL,   0 },
     { X86::SAR32ri,     X86::SAR32mi,    0 },
     { X86::SAR64r1,     X86::SAR64m1,    0 },
     { X86::SAR64rCL,    X86::SAR64mCL,   0 },
     { X86::SAR64ri,     X86::SAR64mi,    0 },
     { X86::SAR8r1,      X86::SAR8m1,     0 },
     { X86::SAR8rCL,     X86::SAR8mCL,    0 },
     { X86::SAR8ri,      X86::SAR8mi,     0 },
+    { X86::SBB16ri,     X86::SBB16mi,    0 },
+    { X86::SBB16ri8,    X86::SBB16mi8,   0 },
+    { X86::SBB16rr,     X86::SBB16mr,    0 },
     { X86::SBB32ri,     X86::SBB32mi,    0 },
     { X86::SBB32ri8,    X86::SBB32mi8,   0 },
     { X86::SBB32rr,     X86::SBB32mr,    0 },
     { X86::SBB64ri32,   X86::SBB64mi32,  0 },
     { X86::SBB64ri8,    X86::SBB64mi8,   0 },
     { X86::SBB64rr,     X86::SBB64mr,    0 },
+    { X86::SBB8ri,      X86::SBB8mi,     0 },
+    { X86::SBB8ri8,     X86::SBB8mi8,    0 },
+    { X86::SBB8rr,      X86::SBB8mr,     0 },
     { X86::SHL16r1,     X86::SHL16m1,    0 },
     { X86::SHL16rCL,    X86::SHL16mCL,   0 },
     { X86::SHL16ri,     X86::SHL16mi,    0 },
     { X86::SHL32r1,     X86::SHL32m1,    0 },
     { X86::SHL32rCL,    X86::SHL32mCL,   0 },
     { X86::SHL32ri,     X86::SHL32mi,    0 },
     { X86::SHL64r1,     X86::SHL64m1,    0 },
     { X86::SHL64rCL,    X86::SHL64mCL,   0 },
static const X86MemoryFoldTableEntry MemoryFoldTable2Addr[] = {
     { X86::SUB16rr,     X86::SUB16mr,    0 },
     { X86::SUB32ri,     X86::SUB32mi,    0 },
     { X86::SUB32ri8,    X86::SUB32mi8,   0 },
     { X86::SUB32rr,     X86::SUB32mr,    0 },
     { X86::SUB64ri32,   X86::SUB64mi32,  0 },
     { X86::SUB64ri8,    X86::SUB64mi8,   0 },
     { X86::SUB64rr,     X86::SUB64mr,    0 },
     { X86::SUB8ri,      X86::SUB8mi,     0 },
+    { X86::SUB8ri8,     X86::SUB8mi8,    0 },
     { X86::SUB8rr,      X86::SUB8mr,     0 },
     { X86::XOR16ri,     X86::XOR16mi,    0 },
     { X86::XOR16ri8,    X86::XOR16mi8,   0 },
     { X86::XOR16rr,     X86::XOR16mr,    0 },
     { X86::XOR32ri,     X86::XOR32mi,    0 },
     { X86::XOR32ri8,    X86::XOR32mi8,   0 },
     { X86::XOR32rr,     X86::XOR32mr,    0 },
     { X86::XOR64ri32,   X86::XOR64mi32,  0 },
     { X86::XOR64ri8,    X86::XOR64mi8,   0 },
     { X86::XOR64rr,     X86::XOR64mr,    0 },
     { X86::XOR8ri,      X86::XOR8mi,     0 },
+    { X86::XOR8ri8,     X86::XOR8mi8,    0 },
     { X86::XOR8rr,      X86::XOR8mr,     0 }
   };
 
   for (X86MemoryFoldTableEntry Entry : MemoryFoldTable2Addr) {
     AddTableEntry(RegOp2MemOpTable2Addr, MemOp2RegOpTable,
                   Entry.RegOp, Entry.MemOp,
                   // Index 0, folded load and store, no alignment requirement.
                   Entry.Flags | TB_INDEX_0 | TB_FOLDED_LOAD | TB_FOLDED_STORE);