[X86][AsmParser] fix PR32035

[craig.topper]

test/MC/X86/pr32035.s

1 ↗

(On Diff #113849)

Can you add this to the existing intel-syntax-encoding.s test instead?

[coby]

moved test into intel-syntax-encoding.s

[RKSimon]

LGTM

[RKSimon]

@coby Are you intending to commit this?

[coby]

In D37473#878578, @RKSimon wrote:

@coby Are you intending to commit this?

indeed
somehow missed the lgtm mark
thanks!

llvm/trunk/lib/Target/X86/X86InstrInfo.td

 def : MnemonicAlias<"loopnz", "loopne">;
 
 def : MnemonicAlias<"pop",   "popw",  "att">, Requires<[In16BitMode]>;
 def : MnemonicAlias<"pop",   "popl",  "att">, Requires<[In32BitMode]>;
 def : MnemonicAlias<"pop",   "popq",  "att">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"popf",  "popfw", "att">, Requires<[In16BitMode]>;
 def : MnemonicAlias<"popf",  "popfl", "att">, Requires<[In32BitMode]>;
 def : MnemonicAlias<"popf",  "popfq", "att">, Requires<[In64BitMode]>;
+def : MnemonicAlias<"popf",  "popfq", "intel">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"popfd", "popfl", "att">;
 
 // FIXME: This is wrong for "push reg".  "push %bx" should turn into pushw in
 // all modes.  However: "push (addr)" and "push $42" should default to
 // pushl/pushq depending on the current mode.  Similar for "pop %bx"
 def : MnemonicAlias<"push",   "pushw",  "att">, Requires<[In16BitMode]>;
 def : MnemonicAlias<"push",   "pushl",  "att">, Requires<[In32BitMode]>;
 def : MnemonicAlias<"push",   "pushq",  "att">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"pushf",  "pushfw", "att">, Requires<[In16BitMode]>;
 def : MnemonicAlias<"pushf",  "pushfl", "att">, Requires<[In32BitMode]>;
 def : MnemonicAlias<"pushf",  "pushfq", "att">, Requires<[In64BitMode]>;
+def : MnemonicAlias<"pushf",  "pushfq", "intel">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"pushfd", "pushfl", "att">;
 
 def : MnemonicAlias<"popad",  "popal",  "intel">, Requires<[Not64BitMode]>;
 def : MnemonicAlias<"pushad", "pushal", "intel">, Requires<[Not64BitMode]>;
 def : MnemonicAlias<"popa",   "popaw",  "intel">, Requires<[In16BitMode]>;
 def : MnemonicAlias<"pusha",  "pushaw", "intel">, Requires<[In16BitMode]>;
 def : MnemonicAlias<"popa",   "popal",  "intel">, Requires<[In32BitMode]>;
 def : MnemonicAlias<"pusha",  "pushal", "intel">, Requires<[In32BitMode]>;

llvm/trunk/test/MC/X86/intel-syntax-encoding.s

 // CHECK: encoding: [0xf2]
 // CHECK: encoding: [0xf0]
 // CHECK: encoding: [0x48,0x01,0x00]
   release lock add [rax], rax
 // CHECK: encoding: [0xf3]
 // CHECK: encoding: [0xf0]
 // CHECK: encoding: [0x48,0x01,0x00]
 
+// CHECK: encoding: [0x9c]
+// CHECK: encoding: [0x9d]
+pushf
+popf
+
 LBB0_3:
 // CHECK: encoding: [0xeb,A]
   jmp LBB0_3
 // CHECK: encoding: [0xf2,0x0f,0x10,0x2c,0x25,0xf8,0xff,0xff,0xff]
         movsd   XMM5, QWORD PTR [-8]
 
 // CHECK: encoding: [0xd1,0xe7]
   shl EDI, 1