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[InstCombine] Remove shift handling from OptAndOp.
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Authored by craig.topper on Aug 6 2017, 3:31 PM.

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Details

Reviewers

spatel
davide

Commits

rG576fb91aefa3: [InstCombine] Remove shift handling from OptAndOp.
rL310234: [InstCombine] Remove shift handling from OptAndOp.

Summary

This is all handled by SimplifyDemandedBits.

Diff Detail

Repository: rL LLVM

Event Timeline

craig.topper created this revision.Aug 6 2017, 3:31 PM

Harbormaster completed remote builds in B9077: Diff 109941.Aug 6 2017, 3:32 PM

LGTM.

This revision is now accepted and ready to land.Aug 6 2017, 4:08 PM

Closed by commit rL310234: [InstCombine] Remove shift handling from OptAndOp. (authored by ctopper). · Explain WhyAug 6 2017, 4:31 PM

This revision was automatically updated to reflect the committed changes.

Revision Contents

Path

Size

llvm/

trunk/

lib/

Transforms/

InstCombine/

InstCombineAndOrXor.cpp

58 lines

Diff 109942

llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

Show First 20 Lines • Show All 168 Lines • ▼ Show 20 Lines	if (Op->hasOneUse()) {
Value *NewAnd = Builder.CreateAnd(X, AndRHS);		Value *NewAnd = Builder.CreateAnd(X, AndRHS);
NewAnd->takeName(Op);		NewAnd->takeName(Op);
return BinaryOperator::CreateXor(NewAnd, AndRHS);		return BinaryOperator::CreateXor(NewAnd, AndRHS);
}		}
}		}
}		}
}		}
break;		break;

case Instruction::Shl: {
// We know that the AND will not produce any of the bits shifted in, so if
// the anded constant includes them, clear them now!
//
uint32_t BitWidth = AndRHS->getType()->getBitWidth();
uint32_t OpRHSVal = OpRHS->getLimitedValue(BitWidth);
APInt ShlMask(APInt::getHighBitsSet(BitWidth, BitWidth-OpRHSVal));
ConstantInt *CI = Builder.getInt(AndRHS->getValue() & ShlMask);

if (CI->getValue() == ShlMask)
// Masking out bits that the shift already masks.
return replaceInstUsesWith(TheAnd, Op); // No need for the and.

if (CI != AndRHS) { // Reducing bits set in and.
TheAnd.setOperand(1, CI);
return &TheAnd;
}
break;
}
case Instruction::LShr: {
// We know that the AND will not produce any of the bits shifted in, so if
// the anded constant includes them, clear them now! This only applies to
// unsigned shifts, because a signed shr may bring in set bits!
//
uint32_t BitWidth = AndRHS->getType()->getBitWidth();
uint32_t OpRHSVal = OpRHS->getLimitedValue(BitWidth);
APInt ShrMask(APInt::getLowBitsSet(BitWidth, BitWidth - OpRHSVal));
ConstantInt *CI = Builder.getInt(AndRHS->getValue() & ShrMask);

if (CI->getValue() == ShrMask)
// Masking out bits that the shift already masks.
return replaceInstUsesWith(TheAnd, Op);

if (CI != AndRHS) {
TheAnd.setOperand(1, CI); // Reduce bits set in and cst.
return &TheAnd;
}
break;
}
case Instruction::AShr:
// Signed shr.
// See if this is shifting in some sign extension, then masking it out
// with an and.
if (Op->hasOneUse()) {
uint32_t BitWidth = AndRHS->getType()->getBitWidth();
uint32_t OpRHSVal = OpRHS->getLimitedValue(BitWidth);
APInt ShrMask(APInt::getLowBitsSet(BitWidth, BitWidth - OpRHSVal));
Constant *C = Builder.getInt(AndRHS->getValue() & ShrMask);
if (C == AndRHS) { // Masking out bits shifted in.
// (Val ashr C1) & C2 -> (Val lshr C1) & C2
// Make the argument unsigned.
Value *ShVal = Op->getOperand(0);
ShVal = Builder.CreateLShr(ShVal, OpRHS, Op->getName());
return BinaryOperator::CreateAnd(ShVal, AndRHS, TheAnd.getName());
}
}
break;
}		}
return nullptr;		return nullptr;
}		}

/// Emit a computation of: (V >= Lo && V < Hi) if Inside is true, otherwise		/// Emit a computation of: (V >= Lo && V < Hi) if Inside is true, otherwise
/// (V < Lo \|\| V >= Hi). This method expects that Lo <= Hi. IsSigned indicates		/// (V < Lo \|\| V >= Hi). This method expects that Lo <= Hi. IsSigned indicates
/// whether to treat V, Lo, and Hi as signed or not.		/// whether to treat V, Lo, and Hi as signed or not.
Value InstCombiner::insertRangeTest(Value V, const APInt &Lo, const APInt &Hi,		Value InstCombiner::insertRangeTest(Value V, const APInt &Lo, const APInt &Hi,
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