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Differential D3571

[mips] Implement tlbp, tlbr, tlbwi, and tlbwr
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Authored by dsanders on Apr 30 2014, 8:31 AM.

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Reviewers
dsanders
vmedic
Commits
rG8dcb116a3eb6: [mips] Implement tlbp, tlbr, tlbwi, and tlbwr
rL208301: [mips] Implement tlbp, tlbr, tlbwi, and tlbwr

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Event Timeline

dsanders updated this revision to Diff 8980.Apr 30 2014, 8:31 AM
dsanders retitled this revision from to [mips] Implement tlbp, tlbr, tlbwi, and tlbwr.
dsanders updated this object.
dsanders edited the test plan for this revision. (Show Details)
dsanders added a reviewer: vmedic.
vmedic edited edge metadata.May 5 2014, 2:28 AM

I don't know if the 80 characters per line limit applies to test files, as the new instructions with following encoding exceed this limit. Other then that, the patch looks good to me.

dsanders added a parent revision: D3569: [mips] Add highly experimental support for MIPS-I, MIPS-II, MIPS-III, and MIPS-V.May 7 2014, 7:26 AM
dsanders accepted this revision.May 8 2014, 4:44 AM
dsanders added a reviewer: dsanders.
This revision is now accepted and ready to land.May 8 2014, 4:44 AM
dsanders closed this revision.May 8 2014, 4:45 AM

Revision Contents

PathSize
lib/
Target/
Mips/
9 lines
7 lines
test/
MC/
Mips/
mips1/
4 lines
4 lines
mips2/
4 lines
4 lines
mips3/
4 lines
4 lines
mips32/
4 lines
4 lines
mips32r2/
4 lines
4 lines
mips4/
4 lines
4 lines
mips5/
4 lines
4 lines
mips64/
4 lines
4 lines
mips64r2/
4 lines
4 lines

Diff 8980

lib/Target/Mips/MipsInstrFormats.td

Show First 20 Lines • Show All 837 Lines • ▼ Show 20 Linesclass BARRIER_FM<bits<5> op> : StdArch {
let Inst{31-26} = 0; // SPECIAL let Inst{31-26} = 0; // SPECIAL
let Inst{25-21} = 0; let Inst{25-21} = 0;
let Inst{20-16} = 0; // rt = 0 let Inst{20-16} = 0; // rt = 0
let Inst{15-11} = 0; // rd = 0 let Inst{15-11} = 0; // rd = 0
let Inst{10-6} = op; // Operation let Inst{10-6} = op; // Operation
let Inst{5-0} = 0; // SLL let Inst{5-0} = 0; // SLL
} }
class COP0_TLB_FM<bits<6> op> : StdArch {
bits<32> Inst;
let Inst{31-26} = 0x10; // COP0
let Inst{25} = 1; // CO
let Inst{24-6} = 0;
let Inst{5-0} = op; // Operation
}

lib/Target/Mips/MipsInstrInfo.td

Show First 20 Lines • Show All 1,174 Lines • ▼ Show 20 Lines
def MTC2 : MFC3OP<"mtc2", GPR32Opnd>, MFC3OP_FM<0x12, 4>; def MTC2 : MFC3OP<"mtc2", GPR32Opnd>, MFC3OP_FM<0x12, 4>;
class Barrier<string asmstr> : InstSE<(outs), (ins), asmstr, [], NoItinerary, class Barrier<string asmstr> : InstSE<(outs), (ins), asmstr, [], NoItinerary,
FrmOther>; FrmOther>;
def SSNOP : Barrier<"ssnop">, BARRIER_FM<1>; def SSNOP : Barrier<"ssnop">, BARRIER_FM<1>;
def EHB : Barrier<"ehb">, BARRIER_FM<3>; def EHB : Barrier<"ehb">, BARRIER_FM<3>;
def PAUSE : Barrier<"pause">, BARRIER_FM<5>, Requires<[HasMips32r2]>; def PAUSE : Barrier<"pause">, BARRIER_FM<5>, Requires<[HasMips32r2]>;
class TLB<string asmstr> : InstSE<(outs), (ins), asmstr, [], NoItinerary,
FrmOther>;
def TLBP : TLB<"tlbp">, COP0_TLB_FM<0x08>;
def TLBR : TLB<"tlbr">, COP0_TLB_FM<0x01>;
def TLBWI : TLB<"tlbwi">, COP0_TLB_FM<0x02>;
def TLBWR : TLB<"tlbwr">, COP0_TLB_FM<0x06>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Instruction aliases // Instruction aliases
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def : InstAlias<"move $dst, $src", def : InstAlias<"move $dst, $src",
(ADDu GPR32Opnd:$dst, GPR32Opnd:$src,ZERO), 1>, (ADDu GPR32Opnd:$dst, GPR32Opnd:$src,ZERO), 1>,
Requires<[IsGP32, NotInMicroMips]>; Requires<[IsGP32, NotInMicroMips]>;
def : InstAlias<"bal $offset", (BGEZAL ZERO, brtarget:$offset), 0>; def : InstAlias<"bal $offset", (BGEZAL ZERO, brtarget:$offset), 0>;
def : InstAlias<"addu $rs, $rt, $imm", def : InstAlias<"addu $rs, $rt, $imm",
▲ Show 20 Lines • Show All 304 Lines • Show Last 20 Lines

test/MC/Mips/mips1/valid-xfail.s

# Instructions that should be valid but currently fail for known reasons (e.g. # Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet). # they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding. # This test is set up to XPASS if any instruction generates an encoding.
# #
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips1 | not FileCheck %s # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips1 | not FileCheck %s
# CHECK-NOT: encoding # CHECK-NOT: encoding
# XFAIL: * # XFAIL: *
.set noat .set noat
tlbp
tlbr
tlbwi
tlbwr
lwc0 c0_entrylo,-7321($s2) lwc0 c0_entrylo,-7321($s2)
lwc3 $10,-32265($k0) lwc3 $10,-32265($k0)
swc0 c0_prid,18904($s3) swc0 c0_prid,18904($s3)

test/MC/Mips/mips1/valid.s

Show First 20 Lines • Show All 84 Lines • ▼ Show 20 Lines# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips1 | FileCheck %s
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22
subu $sp,$s6,$s6 subu $sp,$s6,$s6
sw $ra,-10160($sp) sw $ra,-10160($sp)
swc1 $f6,-8465($t8) swc1 $f6,-8465($t8)
swc2 $25,24880($s0) swc2 $25,24880($s0)
swl $t7,13694($s3) swl $t7,13694($s3)
swr $s1,-26590($t6) swr $s1,-26590($t6)
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
xor $s2,$a0,$s8 xor $s2,$a0,$s8

test/MC/Mips/mips2/valid-xfail.s

# Instructions that should be valid but currently fail for known reasons (e.g. # Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet). # they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding. # This test is set up to XPASS if any instruction generates an encoding.
# #
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips2 | not FileCheck %s # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips2 | not FileCheck %s
# CHECK-NOT: encoding # CHECK-NOT: encoding
# XFAIL: * # XFAIL: *
.set noat .set noat
ldc3 $29,-28645($s1) ldc3 $29,-28645($s1)
lwc3 $10,-32265($k0) lwc3 $10,-32265($k0)
sdc3 $12,5835($t2) sdc3 $12,5835($t2)
tlbp
tlbr
tlbwi
tlbwr

test/MC/Mips/mips2/valid.s

Show First 20 Lines • Show All 101 Lines • ▼ Show 20 Lines# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips2 | FileCheck %s
sw $ra,-10160($sp) sw $ra,-10160($sp)
swc1 $f6,-8465($t8) swc1 $f6,-8465($t8)
swc2 $25,24880($s0) swc2 $25,24880($s0)
swl $t7,13694($s3) swl $t7,13694($s3)
swr $s1,-26590($t6) swr $s1,-26590($t6)
teqi $s5,-17504 teqi $s5,-17504
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
tlti $t6,-21059 tlti $t6,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tnei $t4,-29647 tnei $t4,-29647
trunc.w.d $f22,$f15 trunc.w.d $f22,$f15
trunc.w.s $f28,$f30 trunc.w.s $f28,$f30
xor $s2,$a0,$s8 xor $s2,$a0,$s8

test/MC/Mips/mips3/valid-xfail.s

# Instructions that should be valid but currently fail for known reasons (e.g. # Instructions that should be valid but currently fail for known reasons (e.g.
# they aren't implemented yet). # they aren't implemented yet).
# This test is set up to XPASS if any instruction generates an encoding. # This test is set up to XPASS if any instruction generates an encoding.
# #
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips3 | not FileCheck %s # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips3 | not FileCheck %s
# CHECK-NOT: encoding # CHECK-NOT: encoding
# XFAIL: * # XFAIL: *
.set noat .set noat
lwc3 $10,-32265($k0) lwc3 $10,-32265($k0)
tlbp
tlbr
tlbwi
tlbwr

test/MC/Mips/mips3/valid.s

Show First 20 Lines • Show All 152 Lines • ▼ Show 20 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips3 | FileCheck %s
sw $ra,-10160($sp) sw $ra,-10160($sp)
swc1 $f6,-8465($t8) swc1 $f6,-8465($t8)
swc2 $25,24880($s0) swc2 $25,24880($s0)
swl $t7,13694($s3) swl $t7,13694($s3)
swr $s1,-26590($t6) swr $s1,-26590($t6)
teqi $s5,-17504 teqi $s5,-17504
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
tlti $t6,-21059 tlti $t6,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tnei $t4,-29647 tnei $t4,-29647
trunc.l.d $f23,$f23 trunc.l.d $f23,$f23
trunc.l.s $f28,$f31 trunc.l.s $f28,$f31
trunc.w.d $f22,$f15 trunc.w.d $f22,$f15
trunc.w.s $f28,$f30 trunc.w.s $f28,$f30
xor $s2,$a0,$s8 xor $s2,$a0,$s8

test/MC/Mips/mips32/valid-xfail.s

Show All 32 Lines# XFAIL: *
c.ule.s $fcc7,$f21,$f30 c.ule.s $fcc7,$f21,$f30
c.ult.d $fcc6,$f6,$f17 c.ult.d $fcc6,$f6,$f17
c.ult.s $fcc7,$f24,$f10 c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24 c.un.d $fcc6,$f23,$f24
c.un.s $fcc1,$f30,$f4 c.un.s $fcc1,$f30,$f4
ldc3 $29,-28645($s1) ldc3 $29,-28645($s1)
rorv $t5,$a3,$s5 rorv $t5,$a3,$s5
sdc3 $12,5835($t2) sdc3 $12,5835($t2)
tlbp
tlbr
tlbwi
tlbwr

test/MC/Mips/mips32/valid.s

Show First 20 Lines • Show All 126 Lines • ▼ Show 20 Lines# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 | FileCheck %s
sw $ra,-10160($sp) sw $ra,-10160($sp)
swc1 $f6,-8465($t8) swc1 $f6,-8465($t8)
swc2 $25,24880($s0) swc2 $25,24880($s0)
swl $t7,13694($s3) swl $t7,13694($s3)
swr $s1,-26590($t6) swr $s1,-26590($t6)
teqi $s5,-17504 teqi $s5,-17504
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
tlti $t6,-21059 tlti $t6,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tnei $t4,-29647 tnei $t4,-29647
trunc.w.d $f22,$f15 trunc.w.d $f22,$f15
trunc.w.s $f28,$f30 trunc.w.s $f28,$f30
xor $s2,$a0,$s8 xor $s2,$a0,$s8

test/MC/Mips/mips32r2/valid-xfail.s

Show First 20 Lines • Show All 298 Lines • ▼ Show 20 Lines# XFAIL: *
tlbginv tlbginv
tlbginvf tlbginvf
tlbgp tlbgp
tlbgr tlbgr
tlbgwi tlbgwi
tlbgwr tlbgwr
tlbinv tlbinv
tlbinvf tlbinvf
tlbp
tlbr
tlbwi
tlbwr
trunc.l.d $f23,$f23 trunc.l.d $f23,$f23
trunc.l.s $f28,$f31 trunc.l.s $f28,$f31
wrpgpr $zero,$t5 wrpgpr $zero,$t5
xor.v $w20,$w21,$w30 xor.v $w20,$w21,$w30
yield $v1,$s0 yield $v1,$s0

test/MC/Mips/mips32r2/valid.s

Show First 20 Lines • Show All 154 Lines • ▼ Show 20 Lines# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
swc1 $f6,-8465($t8) swc1 $f6,-8465($t8)
swc2 $25,24880($s0) swc2 $25,24880($s0)
swl $t7,13694($s3) swl $t7,13694($s3)
swr $s1,-26590($t6) swr $s1,-26590($t6)
swxc1 $f19,$t4($k0) swxc1 $f19,$t4($k0)
teqi $s5,-17504 teqi $s5,-17504
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
tlti $t6,-21059 tlti $t6,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tnei $t4,-29647 tnei $t4,-29647
trunc.w.d $f22,$f15 trunc.w.d $f22,$f15
trunc.w.s $f28,$f30 trunc.w.s $f28,$f30
wsbh $k1,$t1 wsbh $k1,$t1
xor $s2,$a0,$s8 xor $s2,$a0,$s8

test/MC/Mips/mips4/valid-xfail.s

Show First 20 Lines • Show All 41 Lines • ▼ Show 20 Lines# XFAIL: *
nmadd.d $f18,$f9,$f14,$f19 nmadd.d $f18,$f9,$f14,$f19
nmadd.s $f0,$f5,$f25,$f12 nmadd.s $f0,$f5,$f25,$f12
nmsub.d $f30,$f8,$f16,$f30 nmsub.d $f30,$f8,$f16,$f30
nmsub.s $f1,$f24,$f19,$f4 nmsub.s $f1,$f24,$f19,$f4
recip.d $f19,$f6 recip.d $f19,$f6
recip.s $f3,$f30 recip.s $f3,$f30
rsqrt.d $f3,$f28 rsqrt.d $f3,$f28
rsqrt.s $f4,$f8 rsqrt.s $f4,$f8
tlbp
tlbr
tlbwi
tlbwr

test/MC/Mips/mips4/valid.s

Show First 20 Lines • Show All 170 Lines • ▼ Show 20 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips4 | FileCheck %s
swc1 $f6,-8465($t8) swc1 $f6,-8465($t8)
swc2 $25,24880($s0) swc2 $25,24880($s0)
swl $t7,13694($s3) swl $t7,13694($s3)
swr $s1,-26590($t6) swr $s1,-26590($t6)
swxc1 $f19,$t4($k0) swxc1 $f19,$t4($k0)
teqi $s5,-17504 teqi $s5,-17504
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
tlti $t6,-21059 tlti $t6,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tnei $t4,-29647 tnei $t4,-29647
trunc.l.d $f23,$f23 trunc.l.d $f23,$f23
trunc.l.s $f28,$f31 trunc.l.s $f28,$f31
trunc.w.d $f22,$f15 trunc.w.d $f22,$f15
trunc.w.s $f28,$f30 trunc.w.s $f28,$f30
xor $s2,$a0,$s8 xor $s2,$a0,$s8

test/MC/Mips/mips5/valid-xfail.s

Show First 20 Lines • Show All 79 Lines • ▼ Show 20 Lines# XFAIL: *
plu.ps $f1,$f26,$f29 plu.ps $f1,$f26,$f29
pul.ps $f9,$f30,$f26 pul.ps $f9,$f30,$f26
puu.ps $f24,$f9,$f2 puu.ps $f24,$f9,$f2
recip.d $f19,$f6 recip.d $f19,$f6
recip.s $f3,$f30 recip.s $f3,$f30
rsqrt.d $f3,$f28 rsqrt.d $f3,$f28
rsqrt.s $f4,$f8 rsqrt.s $f4,$f8
sub.ps $f5,$f14,$f26 sub.ps $f5,$f14,$f26
tlbp
tlbr
tlbwi
tlbwr

test/MC/Mips/mips5/valid.s

Show First 20 Lines • Show All 170 Lines • ▼ Show 20 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips5 | FileCheck %s
swc1 $f6,-8465($t8) swc1 $f6,-8465($t8)
swc2 $25,24880($s0) swc2 $25,24880($s0)
swl $t7,13694($s3) swl $t7,13694($s3)
swr $s1,-26590($t6) swr $s1,-26590($t6)
swxc1 $f19,$t4($k0) swxc1 $f19,$t4($k0)
teqi $s5,-17504 teqi $s5,-17504
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
tlti $t6,-21059 tlti $t6,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tnei $t4,-29647 tnei $t4,-29647
trunc.l.d $f23,$f23 trunc.l.d $f23,$f23
trunc.l.s $f28,$f31 trunc.l.s $f28,$f31
trunc.w.d $f22,$f15 trunc.w.d $f22,$f15
trunc.w.s $f28,$f30 trunc.w.s $f28,$f30
xor $s2,$a0,$s8 xor $s2,$a0,$s8

test/MC/Mips/mips64/valid-xfail.s

Show First 20 Lines • Show All 86 Lines • ▼ Show 20 Lines# XFAIL: *
plu.ps $f1,$f26,$f29 plu.ps $f1,$f26,$f29
pul.ps $f9,$f30,$f26 pul.ps $f9,$f30,$f26
puu.ps $f24,$f9,$f2 puu.ps $f24,$f9,$f2
recip.d $f19,$f6 recip.d $f19,$f6
recip.s $f3,$f30 recip.s $f3,$f30
rsqrt.d $f3,$f28 rsqrt.d $f3,$f28
rsqrt.s $f4,$f8 rsqrt.s $f4,$f8
sub.ps $f5,$f14,$f26 sub.ps $f5,$f14,$f26
tlbp
tlbr
tlbwi
tlbwr

test/MC/Mips/mips64/valid.s

Show First 20 Lines • Show All 184 Lines • ▼ Show 20 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 | FileCheck %s
swc1 $f6,-8465($t8) swc1 $f6,-8465($t8)
swc2 $25,24880($s0) swc2 $25,24880($s0)
swl $t7,13694($s3) swl $t7,13694($s3)
swr $s1,-26590($t6) swr $s1,-26590($t6)
swxc1 $f19,$t4($k0) swxc1 $f19,$t4($k0)
teqi $s5,-17504 teqi $s5,-17504
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
tlti $t6,-21059 tlti $t6,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tnei $t4,-29647 tnei $t4,-29647
trunc.l.d $f23,$f23 trunc.l.d $f23,$f23
trunc.l.s $f28,$f31 trunc.l.s $f28,$f31
trunc.w.d $f22,$f15 trunc.w.d $f22,$f15
trunc.w.s $f28,$f30 trunc.w.s $f28,$f30
xor $s2,$a0,$s8 xor $s2,$a0,$s8

test/MC/Mips/mips64r2/valid-xfail.s

Show First 20 Lines • Show All 300 Lines • ▼ Show 20 Lines# XFAIL: *
tlbginv tlbginv
tlbginvf tlbginvf
tlbgp tlbgp
tlbgr tlbgr
tlbgwi tlbgwi
tlbgwr tlbgwr
tlbinv tlbinv
tlbinvf tlbinvf
tlbp
tlbr
tlbwi
tlbwr
wrpgpr $zero,$t5 wrpgpr $zero,$t5
xor.v $w20,$w21,$w30 xor.v $w20,$w21,$w30
yield $v1,$s0 yield $v1,$s0

test/MC/Mips/mips64r2/valid.s

Show First 20 Lines • Show All 208 Lines • ▼ Show 20 Lines# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
swc1 $f6,-8465($t8) swc1 $f6,-8465($t8)
swc2 $25,24880($s0) swc2 $25,24880($s0)
swl $t7,13694($s3) swl $t7,13694($s3)
swr $s1,-26590($t6) swr $s1,-26590($t6)
swxc1 $f19,$t4($k0) swxc1 $f19,$t4($k0)
teqi $s5,-17504 teqi $s5,-17504
tgei $s1,5025 tgei $s1,5025
tgeiu $sp,-28621 tgeiu $sp,-28621
tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08]
tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01]
tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02]
tlbwr # CHECK: tlbwr # encoding: [0x42,0x00,0x00,0x06]
tlti $t6,-21059 tlti $t6,-21059
tltiu $ra,-5076 tltiu $ra,-5076
tnei $t4,-29647 tnei $t4,-29647
trunc.l.d $f23,$f23 trunc.l.d $f23,$f23
trunc.l.s $f28,$f31 trunc.l.s $f28,$f31
trunc.w.d $f22,$f15 trunc.w.d $f22,$f15
trunc.w.s $f28,$f30 trunc.w.s $f28,$f30
xor $s2,$a0,$s8 xor $s2,$a0,$s8
wsbh $k1,$t1 wsbh $k1,$t1