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Cleanup: two consecutive PAUSE instructions per spin loop iteration replaced with single one

Authored by AndreyChurbanov on Jul 17 2017, 9:35 AM.



Multiple consecutive hint to a processor about execution of a spin loop look redundant. This patch eliminates extra PAUSE leaving single one per iteration of spin loop on a barrier.

Testing on many platforms showed no performance impact of this change. But on Intel KNC the patch revealed performance regressions on Spec OMPM 2001 test suite (actually the pause instruction is not supported there - _mm_delay_32 intrinsic used instead). Making the pause two times longer restored the performance, and making it three times longer showed even better results - performance improvement on some tests - 314.mgrid_m, 324.apsi_m and 328.fma3d_m. So the delay interval changed from 100 ticks to 300.

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This revision is now accepted and ready to land.Jul 18 2017, 12:17 PM
This revision was automatically updated to reflect the committed changes.