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[PowerPC] avoid redundant analysis while lowering an immediate; NFC
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Authored by inouehrs on Jul 4 2017, 8:25 AM.

Details

Summary

This patch reduces compilation time by avoiding redundant analysis while selecting instructions to create an immediate.
If the instruction count required to create the input number without rotate is 2, we do not need further analysis to find a shorter instruction sequence with rotate; rotate + load constant cannot be done by 1 instruction (i.e. getInt64CountDirectnever return 0).
This patch should not change functionality.

Diff Detail

Repository
rL LLVM

Event Timeline

inouehrs created this revision.Jul 4 2017, 8:25 AM
nemanjai accepted this revision.Jul 10 2017, 1:26 PM

This makes perfect sense. LGTM.

This revision is now accepted and ready to land.Jul 10 2017, 1:26 PM
echristo edited edge metadata.Jul 10 2017, 1:28 PM

Perhaps an explanatory comment? :)

-eric

This revision was automatically updated to reflect the committed changes.

Committed with explanatory comments.

echristo added inline comments.Jul 11 2017, 1:34 PM
llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
710

Can uou change this routine name? (and the one below) They're pretty useless when reading to know what they mean.

@echristo In addition to getInt64Count, I feel that getInt64 is also somewhat confusing since we have getI64Imm for other purpose.
How about selectI64Imm and selectI64ImmInstrCount instead of getInt64 and getInt64Count?
Alternative names are getInt64MaterializationInstr and getInt64MaterializationInstrCount (suggested by @nemanjai)
Do you have any suggestion?