Make memory operands for MIs resulting from Memcpy/Memset on SystemZ

[jonpa]

Summary

On SystemZ, memory operands on the MIs that result from lowering of Memcpy (Memset is handled in a similar way) are currently missing.

I wanted to use the MachinePointerInfos passed to EmitTargetCodeForMemcpy(), but I did not find a simple way to just add them as an operand when calling DAG.getNode(). I therefore instead thought that since the achinePointerInfo is basically just a a Value and an offset, it might be good enough to just extract them
and reconstruct them during Pseudo Expansion.

It would of course have been nicer and cleaner to build SDNodes for these memory operands instead instead of extracting after isel. I however don't see any support for this... It seems MemSDNode has just one MachineMemOperand* as a protected member, so memcpy isn't supported with it, or? And there is no SDNode that would wrap a MachineMemOperand...

Is there any better way of doing this than per this patch? (I.e. making the memory operands in EmitTargetCodeForMemcpy() instead and passing them on through isel, to avoid the extraction).

Also, are these memory operands correct with just a load/store flag set?

[efriedma]

We don't current support MemIntrinsicSDNodes with more than one memory operand at the moment... but I don't think that would be hard to change. Probably worth fixing if you need it.

lib/Target/SystemZ/SystemZISelLowering.cpp

MachineBasicBlock *SystemZTargetLowering::emitExt128(MachineInstr &MI,
   }
   BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::INSERT_SUBREG), Dest)
     .addReg(In128).addReg(Src).addImm(SubReg);
 
   MI.eraseFromParent();
   return MBB;
 }
 
+static MachinePointerInfo getMachinePointerInfo(MachineInstr *MI,
+                                                unsigned BaseOpNo,
+                                                MachineRegisterInfo &MRI) {
+  MachineFunction *MF = MI->getParent()->getParent();
+  MachineOperand *BaseMO = &MI->getOperand(BaseOpNo);
+  unsigned Displ         = MI->getOperand(BaseOpNo + 1).getImm();
+  if (BaseMO->isReg()) {
+    MachineInstr *AddrDefMI = MRI.getVRegDef(BaseMO->getReg());
+    if (AddrDefMI != nullptr) {
+      if (AddrDefMI->getOpcode() == SystemZ::LARL &&
+          AddrDefMI->getOperand(1).isGlobal())
+        return MachinePointerInfo(AddrDefMI->getOperand(1).getGlobal(),
+                                  Displ);
+      if ((AddrDefMI->getOpcode() == SystemZ::LA ||
+           AddrDefMI->getOpcode() == SystemZ::LAY) &&
+          AddrDefMI->getOperand(1).isFI() &&
+          AddrDefMI->getOperand(3).getReg() == SystemZ::NoRegister) {
+        Displ += AddrDefMI->getOperand(2).getImm();
+        BaseMO = &AddrDefMI->getOperand(1);
+      }
+    }
+  }
+
+  if (BaseMO->isFI()) {
+    MachinePointerInfo MPtrI =
+      MachinePointerInfo::getFixedStack(*MF, BaseMO->getIndex());
+    MPtrI.Offset = Displ;
+    return MPtrI;
+  }
+
+  return MachinePointerInfo();
+}
+
 MachineBasicBlock *SystemZTargetLowering::emitMemMemWrapper(
     MachineInstr &MI, MachineBasicBlock *MBB, unsigned Opcode) const {
   MachineFunction &MF = *MBB->getParent();
   const SystemZInstrInfo *TII =
       static_cast<const SystemZInstrInfo *>(Subtarget.getInstrInfo());
   MachineRegisterInfo &MRI = MF.getRegInfo();
   DebugLoc DL = MI.getDebugLoc();
 
if (!isUInt<12>(SrcDisp)) {
       unsigned Reg = MRI.createVirtualRegister(&SystemZ::ADDR64BitRegClass);
       BuildMI(*MBB, MI, MI.getDebugLoc(), TII->get(SystemZ::LAY), Reg)
           .add(SrcBase)
           .addImm(SrcDisp)
           .addReg(0);
       SrcBase = MachineOperand::CreateReg(Reg, false);
       SrcDisp = 0;
     }
+    MachineInstr *BuiltMI =
     BuildMI(*MBB, MI, DL, TII->get(Opcode))
         .add(DestBase)
         .addImm(DestDisp)
         .addImm(ThisLength)
         .add(SrcBase)
-        .addImm(SrcDisp)
-        ->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
+        .addImm(SrcDisp);
+    if (!MI.memoperands_empty())
+      BuiltMI->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
+    else {
+      uint64_t Size = MI.getOperand(4).getImm();
+      MachinePointerInfo SrcPtrInfo = getMachinePointerInfo(&MI, 2, MRI);
+      if (!SrcPtrInfo.V.isNull())
+        BuiltMI->addMemOperand(MF, MF.getMachineMemOperand(SrcPtrInfo,
+                               MachineMemOperand::MOLoad, Size, 1));
+      if (Opcode != SystemZ::CLC) {
+        MachinePointerInfo DstPtrInfo = getMachinePointerInfo(&MI, 0, MRI);
+        if (!DstPtrInfo.V.isNull())
+          BuiltMI->addMemOperand(MF, MF.getMachineMemOperand(DstPtrInfo,
+                                 MachineMemOperand::MOStore, Size, 1));
+      }
+    }
+
     DestDisp += ThisLength;
     SrcDisp += ThisLength;
     Length -= ThisLength;
     // If there's another CLC to go, branch to the end if a difference
     // was found.
     if (EndMBB && Length > 0) {
       MachineBasicBlock *NextMBB = splitBlockBefore(MI, MBB);
       BuildMI(MBB, DL, TII->get(SystemZ::BRC))