[X86][Clang] Converting __mm{|256|512}_movm_epi{8|16|32|64} LLVMIR call into generic intrinsics.

[m_zuckerman]

Summary

This patch is a part two of two reviews, one for the clang and the other for LLVM.
In this patch, I covered the clang side, by introducing the intrinsic to the front end.
This is done by creating a generic replacement.

[m_zuckerman]

Ping

[craig.topper]

Y

lib/CodeGen/CGBuiltin.cpp

7176

Why can't we just use DstTy here to create the SExt?

[m_zuckerman]

lib/CodeGen/CGBuiltin.cpp

7176

You are right Thanks

[craig.topper]

lib/CodeGen/CGBuiltin.cpp

7176

That makes the IT parameter unnecessary now right? Which means we don't need to pass different values at the call site below.

[craig.topper]

LGTM

[m_zuckerman]

Thanks :)

lib/CodeGen/CGBuiltin.cpp

 
   if (Ops.size() == 2)
     return Res;
 
   assert(Ops.size() == 4);
   return EmitX86Select(CGF, Ops[3], Res, Ops[2]);
 }
 
+static Value *EmitX86SExtMask(CodeGenFunction &CGF, Value *Op, 
+                              llvm::Type *DstTy) {
+  unsigned NumberOfElements = DstTy->getVectorNumElements();
+  Value *Mask = getMaskVecValue(CGF, Op, NumberOfElements);
+  return CGF.Builder.CreateSExt(Mask, DstTy, "vpmovm2");
+}
+
 Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
                                            const CallExpr *E) {
   if (BuiltinID == X86::BI__builtin_ms_va_start ||
       BuiltinID == X86::BI__builtin_ms_va_end)
     return EmitVAStartEnd(EmitMSVAListRef(E->getArg(0)).getPointer(),
                           BuiltinID == X86::BI__builtin_ms_va_start);
   if (BuiltinID == X86::BI__builtin_ms_va_copy) {
     // Lower this manually. We can't reliably determine whether or not any

   case X86::BI__builtin_ia32_storeupd512_mask:
   case X86::BI__builtin_ia32_storeups512_mask:
     return EmitX86MaskedStore(*this, Ops, 1);
 
   case X86::BI__builtin_ia32_storess128_mask:
   case X86::BI__builtin_ia32_storesd128_mask: {
     return EmitX86MaskedStore(*this, Ops, 16);
   }
+
+  case X86::BI__builtin_ia32_cvtmask2b128:
+  case X86::BI__builtin_ia32_cvtmask2b256:
+  case X86::BI__builtin_ia32_cvtmask2b512:
+  case X86::BI__builtin_ia32_cvtmask2w128:
+  case X86::BI__builtin_ia32_cvtmask2w256:
+  case X86::BI__builtin_ia32_cvtmask2w512:
+  case X86::BI__builtin_ia32_cvtmask2d128:
+  case X86::BI__builtin_ia32_cvtmask2d256:
+  case X86::BI__builtin_ia32_cvtmask2d512:
+  case X86::BI__builtin_ia32_cvtmask2q128:
+  case X86::BI__builtin_ia32_cvtmask2q256:
+  case X86::BI__builtin_ia32_cvtmask2q512:
+    return EmitX86SExtMask(*this, Ops[0], ConvertType(E->getType()));
+
   case X86::BI__builtin_ia32_movdqa32store128_mask:
   case X86::BI__builtin_ia32_movdqa64store128_mask:
   case X86::BI__builtin_ia32_storeaps128_mask:
   case X86::BI__builtin_ia32_storeapd128_mask:
   case X86::BI__builtin_ia32_movdqa32store256_mask:
   case X86::BI__builtin_ia32_movdqa64store256_mask:
   case X86::BI__builtin_ia32_storeaps256_mask:
   case X86::BI__builtin_ia32_storeapd256_mask:

test/CodeGen/avx512bw-builtins.c

 __mmask64 test_mm512_movepi8_mask(__m512i __A) {
   // CHECK-LABEL: @test_mm512_movepi8_mask
   // CHECK: @llvm.x86.avx512.cvtb2mask.512
   return _mm512_movepi8_mask(__A); 
 }
 
 __m512i test_mm512_movm_epi8(__mmask64 __A) {
   // CHECK-LABEL: @test_mm512_movm_epi8
-  // CHECK: @llvm.x86.avx512.cvtmask2b.512
+  // CHECK:  %2 = bitcast i64 %1 to <64 x i1>
+  // CHECK:  %vpmovm2.i = sext <64 x i1> %2 to <64 x i8>
   return _mm512_movm_epi8(__A); 
 }
 
 __m512i test_mm512_movm_epi16(__mmask32 __A) {
   // CHECK-LABEL: @test_mm512_movm_epi16
-  // CHECK: @llvm.x86.avx512.cvtmask2w.512
+  // CHECK:  %2 = bitcast i32 %1 to <32 x i1>
+  // CHECK:  %vpmovm2.i = sext <32 x i1> %2 to <32 x i16>
   return _mm512_movm_epi16(__A); 
 }
 
 __m512i test_mm512_broadcastb_epi8(__m128i __A) {
   // CHECK-LABEL: @test_mm512_broadcastb_epi8
   // CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> zeroinitializer, <64 x i32> zeroinitializer
   return _mm512_broadcastb_epi8(__A);
 }

test/CodeGen/avx512dq-builtins.c

 __mmask16 test_mm512_movepi32_mask(__m512i __A) {
   // CHECK-LABEL: @test_mm512_movepi32_mask
   // CHECK: @llvm.x86.avx512.cvtd2mask.512
   return _mm512_movepi32_mask(__A); 
 }
 
 __m512i test_mm512_movm_epi32(__mmask16 __A) {
   // CHECK-LABEL: @test_mm512_movm_epi32
-  // CHECK: @llvm.x86.avx512.cvtmask2d.512
+  // CHECK: %2 = bitcast i16 %1 to <16 x i1>
+  // CHECK: %vpmovm2.i = sext <16 x i1> %2 to <16 x i32>
   return _mm512_movm_epi32(__A); 
 }
 
 __m512i test_mm512_movm_epi64(__mmask8 __A) {
   // CHECK-LABEL: @test_mm512_movm_epi64
-  // CHECK: @llvm.x86.avx512.cvtmask2q.512
+  // CHECK: %2 = bitcast i8 %1 to <8 x i1>
+  // CHECK: %vpmovm2.i = sext <8 x i1> %2 to <8 x i64>
   return _mm512_movm_epi64(__A); 
 }
 
 __mmask8 test_mm512_movepi64_mask(__m512i __A) {
   // CHECK-LABEL: @test_mm512_movepi64_mask
   // CHECK: @llvm.x86.avx512.cvtq2mask.512
   return _mm512_movepi64_mask(__A); 
 }

test/CodeGen/avx512vlbw-builtins.c

 __mmask32 test_mm256_movepi8_mask(__m256i __A) {
   // CHECK-LABEL: @test_mm256_movepi8_mask
   // CHECK: @llvm.x86.avx512.cvtb2mask.256
   return _mm256_movepi8_mask(__A); 
 }
 
 __m128i test_mm_movm_epi8(__mmask16 __A) {
   // CHECK-LABEL: @test_mm_movm_epi8
-  // CHECK: @llvm.x86.avx512.cvtmask2b.128
+  // CHECK: %2 = bitcast i16 %1 to <16 x i1>
+  // CHECK: %vpmovm2.i = sext <16 x i1> %2 to <16 x i8>
   return _mm_movm_epi8(__A); 
 }
 
 __m256i test_mm256_movm_epi8(__mmask32 __A) {
   // CHECK-LABEL: @test_mm256_movm_epi8
-  // CHECK: @llvm.x86.avx512.cvtmask2b.256
+  // CHECK: %2 = bitcast i32 %1 to <32 x i1>
+  // CHECK: %vpmovm2.i = sext <32 x i1> %2 to <32 x i8>
   return _mm256_movm_epi8(__A); 
 }
 
 __m128i test_mm_movm_epi16(__mmask8 __A) {
   // CHECK-LABEL: @test_mm_movm_epi16
-  // CHECK: @llvm.x86.avx512.cvtmask2w.128
+  // CHECK: %2 = bitcast i8 %1 to <8 x i1>
+  // CHECK: %vpmovm2.i = sext <8 x i1> %2 to <8 x i16>
   return _mm_movm_epi16(__A); 
 }
 
 __m256i test_mm256_movm_epi16(__mmask16 __A) {
   // CHECK-LABEL: @test_mm256_movm_epi16
-  // CHECK: @llvm.x86.avx512.cvtmask2w.256
+  // CHECK: %2 = bitcast i16 %1 to <16 x i1>
+  // CHECK: %vpmovm2.i = sext <16 x i1> %2 to <16 x i16>
   return _mm256_movm_epi16(__A); 
 }
 
 __m128i test_mm_mask_broadcastb_epi8(__m128i __O, __mmask16 __M, __m128i __A) {
   // CHECK-LABEL: @test_mm_mask_broadcastb_epi8
   // CHECK: shufflevector <16 x i8> %{{.*}}, <16 x i8> %{{.*}}, <16 x i32> zeroinitializer
   // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
   return _mm_mask_broadcastb_epi8(__O, __M, __A);

test/CodeGen/avx512vldq-builtins.c

 __mmask8 test_mm256_movepi32_mask(__m256i __A) {
   // CHECK-LABEL: @test_mm256_movepi32_mask
   // CHECK: @llvm.x86.avx512.cvtd2mask.256
   return _mm256_movepi32_mask(__A); 
 }
 
 __m128i test_mm_movm_epi32(__mmask8 __A) {
   // CHECK-LABEL: @test_mm_movm_epi32
-  // CHECK: @llvm.x86.avx512.cvtmask2d.128
+  // CHECK: %2 = bitcast i8 %1 to <8 x i1>
+  // CHECK: %extract.i = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+  // CHECK: %vpmovm2.i = sext <4 x i1> %extract.i to <4 x i32>
   return _mm_movm_epi32(__A); 
 }
 
 __m256i test_mm256_movm_epi32(__mmask8 __A) {
   // CHECK-LABEL: @test_mm256_movm_epi32
-  // CHECK: @llvm.x86.avx512.cvtmask2d.256
+  // CHECK: %2 = bitcast i8 %1 to <8 x i1>
+  // CHECK: %vpmovm2.i = sext <8 x i1> %2 to <8 x i32>
   return _mm256_movm_epi32(__A); 
 }
 
 __m128i test_mm_movm_epi64(__mmask8 __A) {
   // CHECK-LABEL: @test_mm_movm_epi64
-  // CHECK: @llvm.x86.avx512.cvtmask2q.128
+  // CHECK: %2 = bitcast i8 %1 to <8 x i1>
+  // CHECK: %extract.i = shufflevector <8 x i1> %2, <8 x i1> %2, <2 x i32> <i32 0, i32 1>
+  // CHECK: %vpmovm2.i = sext <2 x i1> %extract.i to <2 x i64>
   return _mm_movm_epi64(__A); 
 }
 
 __m256i test_mm256_movm_epi64(__mmask8 __A) {
   // CHECK-LABEL: @test_mm256_movm_epi64
-  // CHECK: @llvm.x86.avx512.cvtmask2q.256
+  // CHECK: %2 = bitcast i8 %1 to <8 x i1>
+  // CHECK: %extract.i = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+  // CHECK: %vpmovm2.i = sext <4 x i1> %extract.i to <4 x i64>
   return _mm256_movm_epi64(__A); 
 }
 
 __mmask8 test_mm_movepi64_mask(__m128i __A) {
   // CHECK-LABEL: @test_mm_movepi64_mask
   // CHECK: @llvm.x86.avx512.cvtq2mask.128
   return _mm_movepi64_mask(__A); 
 }