[mips][msa] Range adjustment for ldi_b builtin function operand

[smaksimovic]

Summary

Reasoning behind this change was allowing the function to accept all values from range [-128, 255] since all of them can be encoded in an 8bit wide value.
This differs from the prior state where only range [-128, 127] was accepted, where values were assumed to be signed, whereas now the actual interpretation
of the immediate is deferred to the consumer as required.

[sdardis]

Can you add a test to test/CodeGen/builtins-mips-msa.c covering the new extended range for ldi.b ?

LGTM.

[smaksimovic]

Added a new test to test/CodeGen/builtins-mips-msa.c, covering the new extended range for ldi.b.

cfe/trunk/lib/Sema/SemaChecking.cpp

bool Sema::CheckMipsBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
   // These intrinsics take an unsigned 1 bit immediate.
   case Mips::BI__builtin_msa_copy_s_d:
   case Mips::BI__builtin_msa_copy_u_d:
   case Mips::BI__builtin_msa_insve_d:
   case Mips::BI__builtin_msa_splati_d: i = 1; l = 0; u = 1; break;
   case Mips::BI__builtin_msa_sldi_d: i = 2; l = 0; u = 1; break;
   // Memory offsets and immediate loads.
   // These intrinsics take a signed 10 bit immediate.
-  case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 127; break;
+  case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 255; break;
   case Mips::BI__builtin_msa_ldi_h:
   case Mips::BI__builtin_msa_ldi_w:
   case Mips::BI__builtin_msa_ldi_d: i = 0; l = -512; u = 511; break;
   case Mips::BI__builtin_msa_ld_b: i = 1; l = -512; u = 511; m = 16; break;
   case Mips::BI__builtin_msa_ld_h: i = 1; l = -1024; u = 1022; m = 16; break;
   case Mips::BI__builtin_msa_ld_w: i = 1; l = -2048; u = 2044; m = 16; break;
   case Mips::BI__builtin_msa_ld_d: i = 1; l = -4096; u = 4088; m = 16; break;
   case Mips::BI__builtin_msa_st_b: i = 2; l = -512; u = 511; m = 16; break;

cfe/trunk/test/CodeGen/builtins-mips-msa-error.c

void test(void) {
   v4i32_r = __msa_ld_w(&v4i32_a, 14);               // expected-error {{argument should be a multiple of 16}}
   v2i64_r = __msa_ld_d(&v2i64_a, 23);               // expected-error {{argument should be a multiple of 16}}
 
   v16i8_r = __msa_ld_b(&v16i8_a, 512);               // expected-error {{argument should be a value from -512 to 511}}
   v8i16_r = __msa_ld_h(&v8i16_a, 512);               // expected-error {{argument should be a value from -512 to 511}}
   v4i32_r = __msa_ld_w(&v4i32_a, 512);               // expected-error {{argument should be a value from -512 to 511}}
   v2i64_r = __msa_ld_d(&v2i64_a, 512);               // expected-error {{argument should be a value from -512 to 511}}
 
-  v16i8_r = __msa_ldi_b(512);                        // expected-error {{argument should be a value from -512 to 511}}
+  v16i8_r = __msa_ldi_b(256);                        // expected-error {{argument should be a value from -128 to 255}}
   v8i16_r = __msa_ldi_h(512);                        // expected-error {{argument should be a value from -512 to 511}}
   v4i32_r = __msa_ldi_w(512);                        // expected-error {{argument should be a value from -512 to 511}}
   v2i64_r = __msa_ldi_d(512);                        // expected-error {{argument should be a value from -512 to 511}}
 
   v16i8_r = __msa_maxi_s_b(v16i8_a, 16);             // expected-error {{argument should be a value from -16 to 15}}
   v8i16_r = __msa_maxi_s_h(v8i16_a, 16);             // expected-error {{argument should be a value from -16 to 15}}
   v4i32_r = __msa_maxi_s_w(v4i32_a, 16);             // expected-error {{argument should be a value from -16 to 15}}
   v2i64_r = __msa_maxi_s_d(v2i64_a, 16);             // expected-error {{argument should be a value from -16 to 15}}
void test(void) {
   v4i32_r = __msa_insve_w(v4i32_r, 4, v4i32_a);      // expected-error {{argument should be a value from 0 to 3}}
   v2i64_r = __msa_insve_d(v2i64_r, 2, v2i64_a);      // expected-error {{argument should be a value from 0 to 1}}
 
   v16i8_r = __msa_ld_b(&v16i8_a, -513);              // expected-error {{argument should be a value from -512 to 511}}
   v8i16_r = __msa_ld_h(&v8i16_a, -513);              // expected-error {{argument should be a value from -512 to 511}}
   v4i32_r = __msa_ld_w(&v4i32_a, -513);              // expected-error {{argument should be a value from -512 to 511}}
   v2i64_r = __msa_ld_d(&v2i64_a, -513);              // expected-error {{argument should be a value from -512 to 511}}
 
-  v16i8_r = __msa_ldi_b(-513);                       // expected-error {{argument should be a value from -512 to 511}}
+  v16i8_r = __msa_ldi_b(-129);                       // expected-error {{argument should be a value from -128 to 255}}
   v8i16_r = __msa_ldi_h(-513);                       // expected-error {{argument should be a value from -512 to 511}}
   v4i32_r = __msa_ldi_w(-513);                       // expected-error {{argument should be a value from -512 to 511}}
   v2i64_r = __msa_ldi_d(-513);                       // expected-error {{argument should be a value from -512 to 511}}
 
   v16i8_r = __msa_maxi_s_b(v16i8_a, -17);            // expected-error {{argument should be a value from -16 to 15}}
   v8i16_r = __msa_maxi_s_h(v8i16_a, -17);            // expected-error {{argument should be a value from -16 to 15}}
   v4i32_r = __msa_maxi_s_w(v4i32_a, -17);            // expected-error {{argument should be a value from -16 to 15}}
   v2i64_r = __msa_maxi_s_d(v2i64_a, -17);            // expected-error {{argument should be a value from -16 to 15}}

cfe/trunk/test/CodeGen/builtins-mips-msa.c

void test(void) {
   v2i64_r = __msa_insve_d(v2i64_r, 1, v2i64_a); // CHECK: call <2  x i64> @llvm.mips.insve.d(
 
   v16i8_r = __msa_ld_b(&v16i8_a, 16); // CHECK: call <16 x i8>  @llvm.mips.ld.b(
   v8i16_r = __msa_ld_h(&v8i16_a, 32); // CHECK: call <8  x i16> @llvm.mips.ld.h(
   v4i32_r = __msa_ld_w(&v4i32_a, 48); // CHECK: call <4  x i32> @llvm.mips.ld.w(
   v2i64_r = __msa_ld_d(&v2i64_a, 96); // CHECK: call <2  x i64> @llvm.mips.ld.d(
 
   v16i8_r = __msa_ldi_b(3); // CHECK: call <16 x i8>  @llvm.mips.ldi.b(
+  v16i8_r = __msa_ldi_b(-128); // CHECK: call <16 x i8>  @llvm.mips.ldi.b(
+  v16i8_r = __msa_ldi_b(255); // CHECK: call <16 x i8>  @llvm.mips.ldi.b(
   v8i16_r = __msa_ldi_h(3); // CHECK: call <8  x i16> @llvm.mips.ldi.h(
   v4i32_r = __msa_ldi_w(3); // CHECK: call <4  x i32> @llvm.mips.ldi.w(
   v2i64_r = __msa_ldi_d(3); // CHECK: call <2  x i64> @llvm.mips.ldi.d(
 
   v8i16_r = __msa_madd_q_h(v8i16_r, v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.madd.q.h(
   v4i32_r = __msa_madd_q_w(v4i32_r, v4i32_a, v4i32_b); // CHECK: call <4  x i32> @llvm.mips.madd.q.w(
 
   v8i16_r = __msa_maddr_q_h(v8i16_r, v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.maddr.q.h(