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Differential D30978

[DAGCombine] Bail out if can't create a vector with at least two elements
ClosedPublic

Authored by zvi on Mar 15 2017, 5:15 AM.

Details

Reviewers
spatel
RKSimon
craig.topper
igorb
hfinkel
Commits
rG48cdde0e59e1: [DAGCombine] Bail out if can't create a vector with at least two elements
rL297878: [DAGCombine] Bail out if can't create a vector with at least two elements
Summary

Fixes pr32278

Diff Detail

Repository
rL LLVM

Event Timeline

zvi created this revision.Mar 15 2017, 5:15 AM
zvi added reviewers: spatel, hfinkel.Mar 15 2017, 11:34 AM
RKSimon accepted this revision.Mar 15 2017, 12:11 PM

LGTM

This revision is now accepted and ready to land.Mar 15 2017, 12:11 PM
RKSimon mentioned this in rL297822: [DAGCombine] Add reproducer for pr32278.Mar 15 2017, 12:39 PM
zvi updated this revision to Diff 91917.Mar 15 2017, 12:56 PM

Rebase

Closed by commit rL297878: [DAGCombine] Bail out if can't create a vector with at least two elements (authored by zvi). · Explain WhyMar 15 2017, 1:00 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
CodeGen/
SelectionDAG/
7 lines
test/
CodeGen/
Generic/
2 lines

Diff 91918

llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 14,092 Lines • ▼ Show 20 Lines if (In->getOpcode() == ISD::BITCAST &&
TLI.isTypeLegal(Scalar->getOperand(0).getValueType())) TLI.isTypeLegal(Scalar->getOperand(0).getValueType()))
Scalar = Scalar->getOperand(0); Scalar = Scalar->getOperand(0);
EVT SclTy = Scalar->getValueType(0); EVT SclTy = Scalar->getValueType(0);
if (!SclTy.isFloatingPoint() && !SclTy.isInteger()) if (!SclTy.isFloatingPoint() && !SclTy.isInteger())
return SDValue(); return SDValue();
EVT NVT = EVT::getVectorVT(*DAG.getContext(), SclTy, unsigned VNTNumElms = VT.getSizeInBits() / SclTy.getSizeInBits();
VT.getSizeInBits() / SclTy.getSizeInBits()); if (VNTNumElms < 2)
return SDValue();
EVT NVT = EVT::getVectorVT(*DAG.getContext(), SclTy, VNTNumElms);
if (!TLI.isTypeLegal(NVT) || !TLI.isTypeLegal(Scalar.getValueType())) if (!TLI.isTypeLegal(NVT) || !TLI.isTypeLegal(Scalar.getValueType()))
return SDValue(); return SDValue();
SDValue Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), NVT, Scalar); SDValue Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), NVT, Scalar);
return DAG.getBitcast(VT, Res); return DAG.getBitcast(VT, Res);
} }
} }
▲ Show 20 Lines • Show All 2,229 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/Generic/pr32278.ll

; PR32278 ; PR32278
; XFAIL: *
; REQUIRES: asserts
; RUN: llc < %s ; RUN: llc < %s
define i8 @foo_v4i1_0_0_1_1_2_2_3_3(i8 %in) { define i8 @foo_v4i1_0_0_1_1_2_2_3_3(i8 %in) {
%trunc = trunc i8 %in to i4 %trunc = trunc i8 %in to i4
%mask = bitcast i4 %trunc to <4 x i1> %mask = bitcast i4 %trunc to <4 x i1>
%s = shufflevector <4 x i1> %mask, <4 x i1> undef, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3> %s = shufflevector <4 x i1> %mask, <4 x i1> undef, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3>
%b = bitcast <8 x i1> %s to i8 %b = bitcast <8 x i1> %s to i8
ret i8 %b ret i8 %b
} }