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Differential D30330

[mips] Fix 64bit slt/sltu/nor with immediates
ClosedPublic

Authored by arichardson on Feb 24 2017, 3:17 AM.

Details

Reviewers
sdardis
theraven
atanasyan
Commits
rGe3cceed3b41c: [mips] Fix 64bit slt/sltu/nor with immediates
rL296482: [mips] Fix 64bit slt/sltu/nor with immediates

Diff Detail

Event Timeline

arichardson created this revision.Feb 24 2017, 3:17 AM
arichardson added a parent revision: D30298: [mips] Handle 64 bit immediate in and/or/xor pseudo instructions on mips64.
sdardis edited edge metadata.Feb 24 2017, 7:47 AM

Looks mostly ok. See my inlined comment about handling sltu.

lib/Target/Mips/Mips64InstrInfo.td
727–738

Rather than providing an alias which covers the imm64 case, instead provide an pseudo instruction like the old version of NORImm which takes which takes GPR64Opnds and imm64. Then unconditionally expand it like NORImm. and set the final opcode to the corresponding comparison. You will be able to provide a two operand alias then.

arichardson updated this revision to Diff 89723.Feb 24 2017, 2:10 PM
arichardson edited the summary of this revision. (Show Details)

Made the two argument version work

sdardis accepted this revision.Feb 27 2017, 3:16 AM

LGTM with the inline comments addressed. The logic error with the (outs) and (ins) appears to be doing the right thing, but should be corrected anyway.

Thanks for doing these patches.

lib/Target/Mips/Mips64InstrInfo.td
695

This entire hunk should be under "Assembler Pseudo Instructions".

698–700

Logic error: the GPR64Opnd:$rs should be with the outs.

Formatting. Keep the MipsAsmPseudoInst on the same line as the 'def'. When the line exceeds 80 chars, break it at the (ins ) construct, and align the (ins ..) with the outs above. E.g:

def SLTImm64 : MipsAsmPseudoInst<(outs GPR64Opnd:$rs),
                                 (ins GPR64Opnd:$rt, imm64:$imm),
                                 "slt\t$rs, $rt, $imm">, GPR_64;
703–705

Logic error: the GPR64Opnd:$rs should be with the outs.

Formatting as well.

707

imm64:$imm should be aligned under the GPR64Opnd:$rs.

lib/Target/Mips/MipsInstrInfo.td
2520

Logic error: RO: $rs should be with the 'outs'.

This revision is now accepted and ready to land.Feb 27 2017, 3:16 AM
arichardson updated this revision to Diff 89998.Feb 28 2017, 2:59 AM
arichardson marked 6 inline comments as done.

Addressed inline comments

arichardson added a comment.Feb 28 2017, 3:00 AM

If this looks good now could you please commit for me?

lib/Target/Mips/MipsInstrInfo.td
2520

That makes sense, I was a bit surprised when I copied it from the existing NORImm.

Closed by commit rL296482: [mips] Fix 64bit slt/sltu/nor with immediates (authored by sdardis). · Explain WhyFeb 28 2017, 8:07 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

Diff 89998

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Show First 20 Lines • Show All 2,372 Lines • ▼ Show 20 LinesMipsAsmParser::tryExpandInstruction(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
case Mips::Ulhu: case Mips::Ulhu:
return expandUlh(Inst, false, IDLoc, Out, STI) ? MER_Fail : MER_Success; return expandUlh(Inst, false, IDLoc, Out, STI) ? MER_Fail : MER_Success;
case Mips::Ush: case Mips::Ush:
return expandUsh(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success; return expandUsh(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success;
case Mips::Ulw: case Mips::Ulw:
case Mips::Usw: case Mips::Usw:
return expandUxw(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success; return expandUxw(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success;
case Mips::NORImm: case Mips::NORImm:
case Mips::NORImm64:
return expandAliasImmediate(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success;
case Mips::SLTImm64:
if (isInt<16>(Inst.getOperand(2).getImm())) {
Inst.setOpcode(Mips::SLTi64);
return MER_NotAMacro;
}
return expandAliasImmediate(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success;
case Mips::SLTUImm64:
if (isInt<16>(Inst.getOperand(2).getImm())) {
Inst.setOpcode(Mips::SLTiu64);
return MER_NotAMacro;
}
return expandAliasImmediate(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success; return expandAliasImmediate(Inst, IDLoc, Out, STI) ? MER_Fail : MER_Success;
case Mips::ADDi: case Mips::ADDi_MM: case Mips::ADDi: case Mips::ADDi_MM:
case Mips::ADDiu: case Mips::ADDiu_MM: case Mips::ADDiu: case Mips::ADDiu_MM:
case Mips::SLTi: case Mips::SLTi_MM: case Mips::SLTi: case Mips::SLTi_MM:
case Mips::SLTiu: case Mips::SLTiu_MM: case Mips::SLTiu: case Mips::SLTiu_MM:
if ((Inst.getNumOperands() == 3) && Inst.getOperand(0).isReg() && if ((Inst.getNumOperands() == 3) && Inst.getOperand(0).isReg() &&
Inst.getOperand(1).isReg() && Inst.getOperand(2).isImm()) { Inst.getOperand(1).isReg() && Inst.getOperand(2).isImm()) {
int64_t ImmValue = Inst.getOperand(2).getImm(); int64_t ImmValue = Inst.getOperand(2).getImm();
▲ Show 20 Lines • Show All 1,474 Lines • ▼ Show 20 Lines case Mips::SLTiu_MM:
FinalOpcode = Mips::SLTu_MM; FinalOpcode = Mips::SLTu_MM;
break; break;
case Mips::XORi_MM: case Mips::XORi_MM:
FinalOpcode = Mips::XOR_MM; FinalOpcode = Mips::XOR_MM;
break; break;
case Mips::ANDi64: case Mips::ANDi64:
FinalOpcode = Mips::AND64; FinalOpcode = Mips::AND64;
break; break;
case Mips::NORImm64:
FinalOpcode = Mips::NOR64;
break;
case Mips::ORi64: case Mips::ORi64:
FinalOpcode = Mips::OR64; FinalOpcode = Mips::OR64;
break; break;
case Mips::SLTImm64:
FinalOpcode = Mips::SLT64;
break;
case Mips::SLTUImm64:
FinalOpcode = Mips::SLTu64;
break;
case Mips::XORi64: case Mips::XORi64:
FinalOpcode = Mips::XOR64; FinalOpcode = Mips::XOR64;
break; break;
} }
if (FinalDstReg == Mips::NoRegister) if (FinalDstReg == Mips::NoRegister)
TOut.emitRRR(FinalOpcode, DstReg, DstReg, SrcReg, IDLoc, STI); TOut.emitRRR(FinalOpcode, DstReg, DstReg, SrcReg, IDLoc, STI);
else else
▲ Show 20 Lines • Show All 3,336 Lines • Show Last 20 Lines

lib/Target/Mips/Mips64InstrInfo.td

Show First 20 Lines • Show All 686 Lines • ▼ Show 20 Lines
def : MipsPat<(atomic_store_16 addr:$a, GPR64:$v), (SH64 GPR64:$v, addr:$a)>; def : MipsPat<(atomic_store_16 addr:$a, GPR64:$v), (SH64 GPR64:$v, addr:$a)>;
def : MipsPat<(atomic_store_32 addr:$a, GPR64:$v), (SW64 GPR64:$v, addr:$a)>; def : MipsPat<(atomic_store_32 addr:$a, GPR64:$v), (SW64 GPR64:$v, addr:$a)>;
def : MipsPat<(atomic_store_64 addr:$a, GPR64:$v), (SD GPR64:$v, addr:$a)>; def : MipsPat<(atomic_store_64 addr:$a, GPR64:$v), (SD GPR64:$v, addr:$a)>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Instruction aliases // Instruction aliases
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
let AdditionalPredicates = [NotInMicroMips] in { let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"move $dst, $src", def : MipsInstAlias<"move $dst, $src",
sdardisUnsubmitted
Done
ReplyInline Actions

This entire hunk should be under "Assembler Pseudo Instructions".

sdardis: This entire hunk should be under "Assembler Pseudo Instructions".
(OR64 GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64), 1>, (OR64 GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64), 1>,
GPR_64; GPR_64;
def : MipsInstAlias<"move $dst, $src", def : MipsInstAlias<"move $dst, $src",
(DADDu GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64), 1>, (DADDu GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64), 1>,
GPR_64; GPR_64;
sdardisUnsubmitted
Done
ReplyInline Actions

Logic error: the GPR64Opnd:$rs should be with the outs.

Formatting. Keep the MipsAsmPseudoInst on the same line as the 'def'. When the line exceeds 80 chars, break it at the (ins ) construct, and align the (ins ..) with the outs above. E.g:

def SLTImm64 : MipsAsmPseudoInst<(outs GPR64Opnd:$rs),
                                 (ins GPR64Opnd:$rt, imm64:$imm),
                                 "slt\t$rs, $rt, $imm">, GPR_64;
sdardis: Logic error: the GPR64Opnd:$rs should be with the outs. Formatting. Keep the MipsAsmPseudoInst…
def : MipsInstAlias<"dadd $rs, $rt, $imm", def : MipsInstAlias<"dadd $rs, $rt, $imm",
(DADDi GPR64Opnd:$rs, GPR64Opnd:$rt, simm16_64:$imm), (DADDi GPR64Opnd:$rs, GPR64Opnd:$rt, simm16_64:$imm),
0>, ISA_MIPS3_NOT_32R6_64R6; 0>, ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"dadd $rs, $imm", def : MipsInstAlias<"dadd $rs, $imm",
(DADDi GPR64Opnd:$rs, GPR64Opnd:$rs, simm16_64:$imm), (DADDi GPR64Opnd:$rs, GPR64Opnd:$rs, simm16_64:$imm),
sdardisUnsubmitted
Done
ReplyInline Actions

Logic error: the GPR64Opnd:$rs should be with the outs.

Formatting as well.

sdardis: Logic error: the GPR64Opnd:$rs should be with the outs. Formatting as well.
0>, ISA_MIPS3_NOT_32R6_64R6; 0>, ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"daddu $rs, $rt, $imm", def : MipsInstAlias<"daddu $rs, $rt, $imm",
sdardisUnsubmitted
Done
ReplyInline Actions

imm64:$imm should be aligned under the GPR64Opnd:$rs.

sdardis: imm64:$imm should be aligned under the GPR64Opnd:$rs.
(DADDiu GPR64Opnd:$rs, GPR64Opnd:$rt, simm16_64:$imm), (DADDiu GPR64Opnd:$rs, GPR64Opnd:$rt, simm16_64:$imm),
0>, ISA_MIPS3; 0>, ISA_MIPS3;
def : MipsInstAlias<"daddu $rs, $imm", def : MipsInstAlias<"daddu $rs, $imm",
(DADDiu GPR64Opnd:$rs, GPR64Opnd:$rs, simm16_64:$imm), (DADDiu GPR64Opnd:$rs, GPR64Opnd:$rs, simm16_64:$imm),
0>, ISA_MIPS3; 0>, ISA_MIPS3;
defm : OneOrTwoOperandMacroImmediateAlias<"and", ANDi64, GPR64Opnd, imm64>, defm : OneOrTwoOperandMacroImmediateAlias<"and", ANDi64, GPR64Opnd, imm64>,
GPR_64; GPR_64;
defm : OneOrTwoOperandMacroImmediateAlias<"or", ORi64, GPR64Opnd, imm64>, defm : OneOrTwoOperandMacroImmediateAlias<"or", ORi64, GPR64Opnd, imm64>,
GPR_64; GPR_64;
defm : OneOrTwoOperandMacroImmediateAlias<"xor", XORi64, GPR64Opnd, imm64>, defm : OneOrTwoOperandMacroImmediateAlias<"xor", XORi64, GPR64Opnd, imm64>,
GPR_64; GPR_64;
} }
def : MipsInstAlias<"dsll $rd, $rt, $rs", def : MipsInstAlias<"dsll $rd, $rt, $rs",
(DSLLV GPR64Opnd:$rd, GPR64Opnd:$rt, GPR32Opnd:$rs), 0>, (DSLLV GPR64Opnd:$rd, GPR64Opnd:$rt, GPR32Opnd:$rs), 0>,
ISA_MIPS3; ISA_MIPS3;
let AdditionalPredicates = [NotInMicroMips] in { let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"dneg $rt, $rs", def : MipsInstAlias<"dneg $rt, $rs",
(DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs), 1>, (DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs), 1>,
ISA_MIPS3; ISA_MIPS3;
def : MipsInstAlias<"dneg $rt", def : MipsInstAlias<"dneg $rt",
(DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt), 1>, (DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt), 1>,
ISA_MIPS3; ISA_MIPS3;
def : MipsInstAlias<"dnegu $rt, $rs", def : MipsInstAlias<"dnegu $rt, $rs",
(DSUBu GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs), 1>, (DSUBu GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs), 1>,
ISA_MIPS3; ISA_MIPS3;
def : MipsInstAlias<"dnegu $rt", def : MipsInstAlias<"dnegu $rt",
(DSUBu GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt), 1>, (DSUBu GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rt), 1>,
ISA_MIPS3; ISA_MIPS3;
sdardisUnsubmitted
Done
ReplyInline Actions

Rather than providing an alias which covers the imm64 case, instead provide an pseudo instruction like the old version of NORImm which takes which takes GPR64Opnds and imm64. Then unconditionally expand it like NORImm. and set the final opcode to the corresponding comparison. You will be able to provide a two operand alias then.

sdardis: Rather than providing an alias which covers the imm64 case, instead provide an pseudo…
} }
def : MipsInstAlias<"dsubi $rs, $rt, $imm", def : MipsInstAlias<"dsubi $rs, $rt, $imm",
(DADDi GPR64Opnd:$rs, GPR64Opnd:$rt, (DADDi GPR64Opnd:$rs, GPR64Opnd:$rt,
InvertedImOperand64:$imm), InvertedImOperand64:$imm),
0>, ISA_MIPS3_NOT_32R6_64R6; 0>, ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"dsubi $rs, $imm", def : MipsInstAlias<"dsubi $rs, $imm",
(DADDi GPR64Opnd:$rs, GPR64Opnd:$rs, (DADDi GPR64Opnd:$rs, GPR64Opnd:$rs,
InvertedImOperand64:$imm), InvertedImOperand64:$imm),
▲ Show 20 Lines • Show All 140 Lines • ▼ Show 20 Lines def : MipsInstAlias<"ddivu $rt, $rs", (DUDivMacro GPR64Opnd:$rt,
GPR64Opnd:$rt, GPR64Opnd:$rt,
GPR64Opnd:$rs), 0>, GPR64Opnd:$rs), 0>,
ISA_MIPS3_NOT_32R6_64R6; ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"ddivu $rd, $imm", (DUDivIMacro GPR64Opnd:$rd, def : MipsInstAlias<"ddivu $rd, $imm", (DUDivIMacro GPR64Opnd:$rd,
GPR64Opnd:$rd, GPR64Opnd:$rd,
imm64:$imm), 0>, imm64:$imm), 0>,
ISA_MIPS3_NOT_32R6_64R6; ISA_MIPS3_NOT_32R6_64R6;
} }
def NORImm64 : NORIMM_DESC_BASE<GPR64Opnd, imm64>, GPR_64;
def : MipsInstAlias<"nor\t$rs, $imm", (NORImm64 GPR64Opnd:$rs, GPR64Opnd:$rs,
imm64:$imm)>, GPR_64;
def SLTImm64 : MipsAsmPseudoInst<(outs GPR64Opnd:$rs),
(ins GPR64Opnd:$rt, imm64:$imm),
"slt\t$rs, $rt, $imm">, GPR_64;
def : MipsInstAlias<"slt\t$rs, $imm", (SLTImm64 GPR64Opnd:$rs, GPR64Opnd:$rs,
imm64:$imm)>, GPR_64;
def SLTUImm64 : MipsAsmPseudoInst<(outs GPR64Opnd:$rs),
(ins GPR64Opnd:$rt, imm64:$imm),
"sltu\t$rs, $rt, $imm">, GPR_64;
def : MipsInstAlias<"sltu\t$rs, $imm", (SLTUImm64 GPR64Opnd:$rs, GPR64Opnd:$rs,
imm64:$imm)>, GPR_64;

lib/Target/Mips/MipsInstrInfo.td

Show First 20 Lines • Show All 2,400 Lines • ▼ Show 20 Lineslet AdditionalPredicates = [NotInMicroMips] in {
defm : OneOrTwoOperandMacroImmediateAlias<"addu", ADDiu>; defm : OneOrTwoOperandMacroImmediateAlias<"addu", ADDiu>;
defm : OneOrTwoOperandMacroImmediateAlias<"and", ANDi>, GPR_32; defm : OneOrTwoOperandMacroImmediateAlias<"and", ANDi>, GPR_32;
defm : OneOrTwoOperandMacroImmediateAlias<"or", ORi>, GPR_32; defm : OneOrTwoOperandMacroImmediateAlias<"or", ORi>, GPR_32;
defm : OneOrTwoOperandMacroImmediateAlias<"xor", XORi>, GPR_32; defm : OneOrTwoOperandMacroImmediateAlias<"xor", XORi>, GPR_32;
defm : OneOrTwoOperandMacroImmediateAlias<"slt", SLTi>; defm : OneOrTwoOperandMacroImmediateAlias<"slt", SLTi>, GPR_32;
defm : OneOrTwoOperandMacroImmediateAlias<"sltu", SLTiu>; defm : OneOrTwoOperandMacroImmediateAlias<"sltu", SLTiu>, GPR_32;
} }
def : MipsInstAlias<"mfc0 $rt, $rd", (MFC0 GPR32Opnd:$rt, COP0Opnd:$rd, 0), 0>; def : MipsInstAlias<"mfc0 $rt, $rd", (MFC0 GPR32Opnd:$rt, COP0Opnd:$rd, 0), 0>;
def : MipsInstAlias<"mtc0 $rt, $rd", (MTC0 COP0Opnd:$rd, GPR32Opnd:$rt, 0), 0>; def : MipsInstAlias<"mtc0 $rt, $rd", (MTC0 COP0Opnd:$rd, GPR32Opnd:$rt, 0), 0>;
def : MipsInstAlias<"mfc2 $rt, $rd", (MFC2 GPR32Opnd:$rt, COP2Opnd:$rd, 0), 0>; def : MipsInstAlias<"mfc2 $rt, $rd", (MFC2 GPR32Opnd:$rt, COP2Opnd:$rd, 0), 0>;
def : MipsInstAlias<"mtc2 $rt, $rd", (MTC2 COP2Opnd:$rd, GPR32Opnd:$rt, 0), 0>; def : MipsInstAlias<"mtc2 $rt, $rd", (MTC2 COP2Opnd:$rd, GPR32Opnd:$rt, 0), 0>;
let AdditionalPredicates = [NotInMicroMips] in { let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"b $offset", (BEQ ZERO, ZERO, brtarget:$offset), 0>; def : MipsInstAlias<"b $offset", (BEQ ZERO, ZERO, brtarget:$offset), 0>;
} }
▲ Show 20 Lines • Show All 91 Lines • ▼ Show 20 Lines MipsAsmPseudoInst<(outs RO:$rt), (ins Od:$imm32),
!strconcat(instr_asm, "\t$rt, $imm32")> ; !strconcat(instr_asm, "\t$rt, $imm32")> ;
def LoadAddrImm32 : LoadAddressFromImm32<"la", i32imm, GPR32Opnd>; def LoadAddrImm32 : LoadAddressFromImm32<"la", i32imm, GPR32Opnd>;
def JalTwoReg : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), (ins GPR32Opnd:$rs), def JalTwoReg : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), (ins GPR32Opnd:$rs),
"jal\t$rd, $rs"> ; "jal\t$rd, $rs"> ;
def JalOneReg : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs), def JalOneReg : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs),
"jal\t$rs"> ; "jal\t$rs"> ;
def NORImm : MipsAsmPseudoInst< class NORIMM_DESC_BASE<RegisterOperand RO, DAGOperand Imm> :
(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt, simm32_relaxed:$imm), MipsAsmPseudoInst<(outs RO:$rs), (ins RO:$rt, Imm:$imm),
sdardisUnsubmitted
Done
ReplyInline Actions

Logic error: RO: $rs should be with the 'outs'.

sdardis: Logic error: RO: $rs should be with the 'outs'.
arichardsonAuthorUnsubmitted
Not Done
ReplyInline Actions

That makes sense, I was a bit surprised when I copied it from the existing NORImm.

arichardson: That makes sense, I was a bit surprised when I copied it from the existing NORImm.
"nor\t$rs, $rt, $imm">; "nor\t$rs, $rt, $imm">;
def NORImm : NORIMM_DESC_BASE<GPR32Opnd, simm32_relaxed>, GPR_32;
def : MipsInstAlias<"nor\t$rs, $imm", (NORImm GPR32Opnd:$rs, GPR32Opnd:$rs, def : MipsInstAlias<"nor\t$rs, $imm", (NORImm GPR32Opnd:$rs, GPR32Opnd:$rs,
simm32_relaxed:$imm)>; simm32_relaxed:$imm)>, GPR_32;
let hasDelaySlot = 1, isCTI = 1 in { let hasDelaySlot = 1, isCTI = 1 in {
def BneImm : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), def BneImm : MipsAsmPseudoInst<(outs GPR32Opnd:$rt),
(ins imm64:$imm64, brtarget:$offset), (ins imm64:$imm64, brtarget:$offset),
"bne\t$rt, $imm64, $offset">; "bne\t$rt, $imm64, $offset">;
def BeqImm : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), def BeqImm : MipsAsmPseudoInst<(outs GPR32Opnd:$rt),
(ins imm64:$imm64, brtarget:$offset), (ins imm64:$imm64, brtarget:$offset),
"beq\t$rt, $imm64, $offset">; "beq\t$rt, $imm64, $offset">;
▲ Show 20 Lines • Show All 408 Lines • Show Last 20 Lines

test/MC/Mips/mips64-instalias-imm-expanding-broken.s

  • This file was deleted.
# RUN: llvm-mc -triple mips64el-unknown-linux -show-encoding -print-imm-hex %s | FileCheck %s
# XFAIL: *
.text
text_label:
# CHECK: text_label:
nor $4, $5, 0
# CHECK: addiu $4, $zero, 0x0 # encoding: [0x00,0x00,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 1
# CHECK-NEXT: addiu $4, $zero, 0x1 # encoding: [0x01,0x00,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x8000
# CHECK-NEXT: ori $4, $zero, 0x8000 # encoding: [0x00,0x80,0x04,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, -0x8000
# CHECK-NEXT: addiu $4, $zero, -0x8000 # encoding: [0x00,0x80,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x1a5a5
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xa5a5 # encoding: [0xa5,0xa5,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xFFFFFFFF
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xF0000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x7FFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x7FFFFFFFFFFFFFFF
# FIXME: this is awfully inefficient...
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xF000000000000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x30 # encoding: [0x3c,0x24,0x04,0x00]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xff00ff00
# CHECK-NEXT: ori $4, $zero, 0xff00 # encoding: [0x00,0xff,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff00 # encoding: [0x00,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
slt $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, -0x8000
# CHECK-NEXT: slti $4, $5, -0x8000 # encoding: [0x00,0x80,0xa4,0x28]
slt $4, $5, 0
# CHECK-NEXT: slti $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x28]
slt $4, $5, 0xFFFF
# CHECK-NEXT: ori $4, $zero, 0xffff # encoding: [0xff,0xff,0x04,0x34]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0xFFFFFFFF
# CHECK-NOT: slti $4, $5, -0x1 # encoding: [0xff,0xff,0xa4,0x28]
sltu $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, -0x8000
# CHECK-NEXT: sltiu $4, $5, -0x8000 # encoding: [0x00,0x80,0xa4,0x2c]
sltu $4, $5, 0
# CHECK-NEXT: sltiu $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x2c]
sltu $4, $5, 0xFFFF
# CHECK-NEXT: ori $4, $zero, 0xffff # encoding: [0xff,0xff,0x04,0x34]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
# FIXME: should this be sign extended or not???
sltu $4, $5, 0xFFFFFFFF
# CHECK-NOT: sltiu $4, $5, -0x1 # encoding: [0xff,0xff,0xa4,0x2c]

test/MC/Mips/mips64-instalias-imm-expanding.s

Show First 20 Lines • Show All 407 Lines • ▼ Show 20 Lines
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00] # CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, ~(0xf0000000|0x0f000000|0x000000f0) xor $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24] # CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00] # CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34] # CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00] # CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34] # CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00] # CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
nor $4, 0
# CHECK: addiu $1, $zero, 0x0 # encoding: [0x00,0x00,0x01,0x24]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 1
# CHECK-NEXT: addiu $1, $zero, 0x1 # encoding: [0x01,0x00,0x01,0x24]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0x8000
# CHECK-NEXT: ori $1, $zero, 0x8000 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, -0x8000
# CHECK-NEXT: addiu $1, $zero, -0x8000 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0x10000
# CHECK-NEXT: lui $1, 0x1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0x1a5a5
# CHECK-NEXT: lui $1, 0x1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xa5a5 # encoding: [0xa5,0xa5,0x21,0x34]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0xFFFFFFFF
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0xF0000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0x7FFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0x7FFFFFFFFFFFFFF
# CHECK-NEXT: lui $1, 0x7ff # encoding: [0xff,0x07,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $1, $zero, -0x1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0xF000000000000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x30 # encoding: [0x3c,0x0c,0x01,0x00]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $1, $zero, -0x1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff # encoding: [0xff,0x00,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff0f # encoding: [0x0f,0xff,0x21,0x34]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, 0xff00ff00
# CHECK-NEXT: ori $1, $zero, 0xff00 # encoding: [0x00,0xff,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff00 # encoding: [0x00,0xff,0x21,0x34]
# CHECK-NEXT: nor $4, $4, $1 # encoding: [0x27,0x20,0x81,0x00]
nor $4, $5, 0
# CHECK: addiu $4, $zero, 0x0 # encoding: [0x00,0x00,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 1
# CHECK-NEXT: addiu $4, $zero, 0x1 # encoding: [0x01,0x00,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x8000
# CHECK-NEXT: ori $4, $zero, 0x8000 # encoding: [0x00,0x80,0x04,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, -0x8000
# CHECK-NEXT: addiu $4, $zero, -0x8000 # encoding: [0x00,0x80,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x1a5a5
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xa5a5 # encoding: [0xa5,0xa5,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xFFFFFFFF
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xF0000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x7FFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x7FFFFFFFFFFFFFFF
# FIXME: this is awfully inefficient...
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xF000000000000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x30 # encoding: [0x3c,0x24,0x04,0x00]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xff00ff00
# CHECK-NEXT: ori $4, $zero, 0xff00 # encoding: [0x00,0xff,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff00 # encoding: [0x00,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
slt $4, -0x80000000
# CHECK: lui $1, 0x8000 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, -0x8001
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0x7fff # encoding: [0xff,0x7f,0x21,0x34]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, -0x8000
# CHECK-NEXT: slti $4, $4, -0x8000 # encoding: [0x00,0x80,0x84,0x28]
slt $4, 0
# CHECK-NEXT: slti $4, $4, 0x0 # encoding: [0x00,0x00,0x84,0x28]
slt $4, 0xFFFF
# CHECK-NEXT: ori $1, $zero, 0xffff # encoding: [0xff,0xff,0x01,0x34]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, 0x10000
# CHECK-NEXT: lui $1, 0x1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, 0xFFFFFFFF
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, 0xF0000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, 0x7FFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, 0x7FFFFFFFFFFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: slti $4, $4, -0x1 # encoding: [0xff,0xff,0x84,0x28]
slt $4, 0xF000000000000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x30 # encoding: [0x3c,0x0c,0x01,0x00]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $1, $zero, -0x1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff # encoding: [0xff,0x00,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff0f # encoding: [0x0f,0xff,0x21,0x34]
# CHECK-NEXT: slt $4, $4, $1 # encoding: [0x2a,0x20,0x81,0x00]
slt $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, -0x8000
# CHECK-NEXT: slti $4, $5, -0x8000 # encoding: [0x00,0x80,0xa4,0x28]
slt $4, $5, 0
# CHECK-NEXT: slti $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x28]
slt $4, $5, 0xFFFF
# CHECK-NEXT: ori $4, $zero, 0xffff # encoding: [0xff,0xff,0x04,0x34]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0xFFFFFFFF
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0xF0000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0x7FFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0x7FFFFFFFFFFFFFFF
# FIXME: this is awfully inefficient...
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: slti $4, $5, -0x1 # encoding: [0xff,0xff,0xa4,0x28]
slt $4, $5, 0xF000000000000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x30 # encoding: [0x3c,0x24,0x04,0x00]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
sltu $4, -0x80000000
# CHECK: lui $1, 0x8000 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, -0x8001
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0x7fff # encoding: [0xff,0x7f,0x21,0x34]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, -0x8000
# CHECK-NEXT: sltiu $4, $4, -0x8000 # encoding: [0x00,0x80,0x84,0x2c]
sltu $4, 0
# CHECK-NEXT: sltiu $4, $4, 0x0 # encoding: [0x00,0x00,0x84,0x2c]
sltu $4, 0xFFFF
# CHECK-NEXT: ori $1, $zero, 0xffff # encoding: [0xff,0xff,0x01,0x34]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, 0x10000
# CHECK-NEXT: lui $1, 0x1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, 0xFFFFFFFF
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, 0xF0000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, 0x7FFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, 0x7FFFFFFFFFFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: sltiu $4, $4, -0x1 # encoding: [0xff,0xff,0x84,0x2c]
sltu $4, 0xF000000000000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x30 # encoding: [0x3c,0x0c,0x01,0x00]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $1, $zero, -0x1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff # encoding: [0xff,0x00,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff0f # encoding: [0x0f,0xff,0x21,0x34]
# CHECK-NEXT: sltu $4, $4, $1 # encoding: [0x2b,0x20,0x81,0x00]
sltu $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, -0x8000
# CHECK-NEXT: sltiu $4, $5, -0x8000 # encoding: [0x00,0x80,0xa4,0x2c]
sltu $4, $5, 0
# CHECK-NEXT: sltiu $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x2c]
sltu $4, $5, 0xFFFF
# CHECK-NEXT: ori $4, $zero, 0xffff # encoding: [0xff,0xff,0x04,0x34]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, 0xFFFFFFFF
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, 0xF0000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, 0x7FFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, 0x7FFFFFFFFFFFFFFF
# FIXME: this is awfully inefficient...
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: sltiu $4, $5, -0x1 # encoding: [0xff,0xff,0xa4,0x2c]
sltu $4, $5, 0xF000000000000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x30 # encoding: [0x3c,0x24,0x04,0x00]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
lib/Target/Mips/MipsInstrInfo.td