In Thumb1 mode, the custom lowering for ARMISD::CMPZ could never emit tADDi3

[t.p.northover]

This looks fine to me.

llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp

case ARMISD::CMPZ: {
     //   The CMPZ #0 is useless and will be peepholed away but we need to keep it
     //   for its glue output.
     SDValue X = N->getOperand(0);
     auto *C = dyn_cast<ConstantSDNode>(N->getOperand(1).getNode());
     if (C && C->getSExtValue() < 0 && Subtarget->isThumb()) {
       int64_t Addend = -C->getSExtValue();
 
       SDNode *Add = nullptr;
-      // In T2 mode, ADDS can be better than CMN if the immediate fits in a
+      // ADDS can be better than CMN if the immediate fits in a
       // 16-bit ADDS, which means either [0,256) for tADDi8 or [0,8) for tADDi3.
       // Outside that range we can just use a CMN which is 32-bit but has a
       // 12-bit immediate range.
-      if (Subtarget->isThumb2() && Addend < 1<<8) {
+      if (Addend < 1<<8) {
+        if (Subtarget->isThumb2()) {
           SDValue Ops[] = { X, CurDAG->getTargetConstant(Addend, dl, MVT::i32),
                             getAL(CurDAG, dl), CurDAG->getRegister(0, MVT::i32),
                             CurDAG->getRegister(0, MVT::i32) };
           Add = CurDAG->getMachineNode(ARM::t2ADDri, dl, MVT::i32, Ops);
-      } else if (!Subtarget->isThumb2() && Addend < 1<<8) {
-        // FIXME: Add T1 tADDi8 code.
-        SDValue Ops[] = {CurDAG->getRegister(ARM::CPSR, MVT::i32), X,
-                         CurDAG->getTargetConstant(Addend, dl, MVT::i32),
-                         getAL(CurDAG, dl), CurDAG->getRegister(0, MVT::i32)};
-        Add = CurDAG->getMachineNode(ARM::tADDi8, dl, MVT::i32, Ops);
-      } else if (!Subtarget->isThumb2() && Addend < 1<<3) {
+        } else {
+          unsigned Opc = (Addend < 1<<3) ? ARM::tADDi3 : ARM::tADDi8;
           SDValue Ops[] = {CurDAG->getRegister(ARM::CPSR, MVT::i32), X,
                            CurDAG->getTargetConstant(Addend, dl, MVT::i32),
                            getAL(CurDAG, dl), CurDAG->getRegister(0, MVT::i32)};
-        Add = CurDAG->getMachineNode(ARM::tADDi3, dl, MVT::i32, Ops);
+          Add = CurDAG->getMachineNode(Opc, dl, MVT::i32, Ops);
+        }
       }
       if (Add) {
         SDValue Ops2[] = {SDValue(Add, 0), CurDAG->getConstant(0, dl, MVT::i32)};
         CurDAG->MorphNodeTo(N, ARMISD::CMPZ, CurDAG->getVTList(MVT::Glue), Ops2);
       }
     }
     // Other cases are autogenerated.
     break;

llvm/trunk/test/CodeGen/Thumb/cmp-add-fold.ll

 ; RUN: llc -mtriple=thumbv6m-eabi -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK --check-prefix=T1 %s
 ; RUN: llc -mtriple=thumbv7m-eabi -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK --check-prefix=T2 %s
 
 ; CHECK-LABEL: addri1:
-; CHECK: adds r0, #3
+; T1: adds r0, r0, #3
 ; T1-NEXT: b{{eq|ne}}
+; T2: adds r0, #3
 ; T2-NOT: cmp
 define i32 @addri1(i32 %a, i32 %b) {
   %c = add i32 %a, 3
   %d = icmp eq i32 %c, 0
   br i1 %d, label %true, label %false
 
 true:
   ret i32 4