[X86][Disassembler] Added SALC instruction

[craig.topper]

Do other assemblers/disassembler handle this instruction? Its not officially documented and I wasn't able to determine for sure what other tools do. For ffreep I at least stumbled onto postings about gcc emitting it and AMD has or had it in the optimization manual.

I also noticed sandpile.org says salc doesn't work in 64-bit mode.

[cray]

I know we have seen it in production code, but I can't remember what generated it currently. I just tested it with fasm and it assembled correctly. I was able to then disassemble it with IDA, and capstone.

Here is some good documentation on the instruction.
http://www.rcollins.org/secrets/opcodes/SALC.html

[craig.topper]

lib/Target/X86/X86InstrCMovSetCC.td

113 ↗

(On Diff #85978)

I think we need a Requires<[Not64BitMode]> here. sandpile.org and http://www.agner.org/optimize/instruction_tables.pdf both indicate its not available in 64-bit mode.

Can you also add a comment that's it undocumented just so its obvious why you can't find it in Intel or AMD official docs.

[majnemer]

In D29201#658545, @craig.topper wrote:

Do other assemblers/disassembler handle this instruction? Its not officially documented and I wasn't able to determine for sure what other tools do. For ffreep I at least stumbled onto postings about gcc emitting it and AMD has or had it in the optimization manual.

I also noticed sandpile.org says salc doesn't work in 64-bit mode.

FWIW, xed knows about salc: https://github.com/intelxed/xed/blob/eb45a282de284ec2574e2b54460b37b7e587996c/datafiles/xed-isa.txt#L8011

[cray]

Added Requires<[Not64BitMode]> to the SALC instruction, and added a comment saying that it is an undocumented instruction.

[craig.topper]

LGTM

llvm/trunk/lib/Target/X86/X86InstrCMovSetCC.td

-//===-- X86InstrCMovSetCC.td - Conditional Move and SetCC --*- tablegen -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file describes the X86 conditional move and set on condition
-// instructions.
-//
-//===----------------------------------------------------------------------===//
-
-
-// CMOV instructions.
-multiclass CMOV<bits<8> opc, string Mnemonic, PatLeaf CondNode> {
-  let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
-      isCommutable = 1, SchedRW = [WriteALU] in {
-    def NAME#16rr
-      : I<opc, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
-          !strconcat(Mnemonic, "{w}\t{$src2, $dst|$dst, $src2}"),
-          [(set GR16:$dst,
-                (X86cmov GR16:$src1, GR16:$src2, CondNode, EFLAGS))],
-                IIC_CMOV16_RR>, TB, OpSize16;
-    def NAME#32rr
-      : I<opc, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
-          !strconcat(Mnemonic, "{l}\t{$src2, $dst|$dst, $src2}"),
-          [(set GR32:$dst,
-                (X86cmov GR32:$src1, GR32:$src2, CondNode, EFLAGS))],
-                IIC_CMOV32_RR>, TB, OpSize32;
-    def NAME#64rr
-      :RI<opc, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
-          !strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
-          [(set GR64:$dst,
-                (X86cmov GR64:$src1, GR64:$src2, CondNode, EFLAGS))],
-                IIC_CMOV32_RR>, TB;
-  }
-
-  let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
-      SchedRW = [WriteALULd, ReadAfterLd] in {
-    def NAME#16rm
-      : I<opc, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2),
-          !strconcat(Mnemonic, "{w}\t{$src2, $dst|$dst, $src2}"),
-          [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2),
-                                    CondNode, EFLAGS))], IIC_CMOV16_RM>,
-                                    TB, OpSize16;
-    def NAME#32rm
-      : I<opc, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2),
-          !strconcat(Mnemonic, "{l}\t{$src2, $dst|$dst, $src2}"),
-          [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2),
-                                    CondNode, EFLAGS))], IIC_CMOV32_RM>,
-                                    TB, OpSize32;
-    def NAME#64rm
-      :RI<opc, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
-          !strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
-          [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2),
-                                    CondNode, EFLAGS))], IIC_CMOV32_RM>, TB;
-  } // Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst"
-} // end multiclass
-
-
-// Conditional Moves.
-defm CMOVO  : CMOV<0x40, "cmovo" , X86_COND_O>;
-defm CMOVNO : CMOV<0x41, "cmovno", X86_COND_NO>;
-defm CMOVB  : CMOV<0x42, "cmovb" , X86_COND_B>;
-defm CMOVAE : CMOV<0x43, "cmovae", X86_COND_AE>;
-defm CMOVE  : CMOV<0x44, "cmove" , X86_COND_E>;
-defm CMOVNE : CMOV<0x45, "cmovne", X86_COND_NE>;
-defm CMOVBE : CMOV<0x46, "cmovbe", X86_COND_BE>;
-defm CMOVA  : CMOV<0x47, "cmova" , X86_COND_A>;
-defm CMOVS  : CMOV<0x48, "cmovs" , X86_COND_S>;
-defm CMOVNS : CMOV<0x49, "cmovns", X86_COND_NS>;
-defm CMOVP  : CMOV<0x4A, "cmovp" , X86_COND_P>;
-defm CMOVNP : CMOV<0x4B, "cmovnp", X86_COND_NP>;
-defm CMOVL  : CMOV<0x4C, "cmovl" , X86_COND_L>;
-defm CMOVGE : CMOV<0x4D, "cmovge", X86_COND_GE>;
-defm CMOVLE : CMOV<0x4E, "cmovle", X86_COND_LE>;
-defm CMOVG  : CMOV<0x4F, "cmovg" , X86_COND_G>;
-
-
-// SetCC instructions.
-multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
-  let Uses = [EFLAGS] in {
-    def r    : I<opc, MRMXr,  (outs GR8:$dst), (ins),
-                     !strconcat(Mnemonic, "\t$dst"),
-                     [(set GR8:$dst, (X86setcc OpNode, EFLAGS))],
-                     IIC_SET_R>, TB, Sched<[WriteALU]>;
-    def m    : I<opc, MRMXm,  (outs), (ins i8mem:$dst),
-                     !strconcat(Mnemonic, "\t$dst"),
-                     [(store (X86setcc OpNode, EFLAGS), addr:$dst)],
-                     IIC_SET_M>, TB, Sched<[WriteALU, WriteStore]>;
-  } // Uses = [EFLAGS]
-}
-
-defm SETO  : SETCC<0x90, "seto",  X86_COND_O>;   // is overflow bit set
-defm SETNO : SETCC<0x91, "setno", X86_COND_NO>;  // is overflow bit not set
-defm SETB  : SETCC<0x92, "setb",  X86_COND_B>;   // unsigned less than
-defm SETAE : SETCC<0x93, "setae", X86_COND_AE>;  // unsigned greater or equal
-defm SETE  : SETCC<0x94, "sete",  X86_COND_E>;   // equal to
-defm SETNE : SETCC<0x95, "setne", X86_COND_NE>;  // not equal to
-defm SETBE : SETCC<0x96, "setbe", X86_COND_BE>;  // unsigned less than or equal
-defm SETA  : SETCC<0x97, "seta",  X86_COND_A>;   // unsigned greater than
-defm SETS  : SETCC<0x98, "sets",  X86_COND_S>;   // is signed bit set
-defm SETNS : SETCC<0x99, "setns", X86_COND_NS>;  // is not signed
-defm SETP  : SETCC<0x9A, "setp",  X86_COND_P>;   // is parity bit set
-defm SETNP : SETCC<0x9B, "setnp", X86_COND_NP>;  // is parity bit not set
-defm SETL  : SETCC<0x9C, "setl",  X86_COND_L>;   // signed less than
-defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>;  // signed greater or equal
-defm SETLE : SETCC<0x9E, "setle", X86_COND_LE>;  // signed less than or equal
-defm SETG  : SETCC<0x9F, "setg",  X86_COND_G>;   // signed greater than
-
+//===-- X86InstrCMovSetCC.td - Conditional Move and SetCC --*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes the X86 conditional move and set on condition
+// instructions.
+//
+//===----------------------------------------------------------------------===//
+
+
+// CMOV instructions.
+multiclass CMOV<bits<8> opc, string Mnemonic, PatLeaf CondNode> {
+  let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
+      isCommutable = 1, SchedRW = [WriteALU] in {
+    def NAME#16rr
+      : I<opc, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
+          !strconcat(Mnemonic, "{w}\t{$src2, $dst|$dst, $src2}"),
+          [(set GR16:$dst,
+                (X86cmov GR16:$src1, GR16:$src2, CondNode, EFLAGS))],
+                IIC_CMOV16_RR>, TB, OpSize16;
+    def NAME#32rr
+      : I<opc, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
+          !strconcat(Mnemonic, "{l}\t{$src2, $dst|$dst, $src2}"),
+          [(set GR32:$dst,
+                (X86cmov GR32:$src1, GR32:$src2, CondNode, EFLAGS))],
+                IIC_CMOV32_RR>, TB, OpSize32;
+    def NAME#64rr
+      :RI<opc, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
+          !strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
+          [(set GR64:$dst,
+                (X86cmov GR64:$src1, GR64:$src2, CondNode, EFLAGS))],
+                IIC_CMOV32_RR>, TB;
+  }
+
+  let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
+      SchedRW = [WriteALULd, ReadAfterLd] in {
+    def NAME#16rm
+      : I<opc, MRMSrcMem, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2),
+          !strconcat(Mnemonic, "{w}\t{$src2, $dst|$dst, $src2}"),
+          [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2),
+                                    CondNode, EFLAGS))], IIC_CMOV16_RM>,
+                                    TB, OpSize16;
+    def NAME#32rm
+      : I<opc, MRMSrcMem, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2),
+          !strconcat(Mnemonic, "{l}\t{$src2, $dst|$dst, $src2}"),
+          [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2),
+                                    CondNode, EFLAGS))], IIC_CMOV32_RM>,
+                                    TB, OpSize32;
+    def NAME#64rm
+      :RI<opc, MRMSrcMem, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2),
+          !strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}"),
+          [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2),
+                                    CondNode, EFLAGS))], IIC_CMOV32_RM>, TB;
+  } // Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst"
+} // end multiclass
+
+
+// Conditional Moves.
+defm CMOVO  : CMOV<0x40, "cmovo" , X86_COND_O>;
+defm CMOVNO : CMOV<0x41, "cmovno", X86_COND_NO>;
+defm CMOVB  : CMOV<0x42, "cmovb" , X86_COND_B>;
+defm CMOVAE : CMOV<0x43, "cmovae", X86_COND_AE>;
+defm CMOVE  : CMOV<0x44, "cmove" , X86_COND_E>;
+defm CMOVNE : CMOV<0x45, "cmovne", X86_COND_NE>;
+defm CMOVBE : CMOV<0x46, "cmovbe", X86_COND_BE>;
+defm CMOVA  : CMOV<0x47, "cmova" , X86_COND_A>;
+defm CMOVS  : CMOV<0x48, "cmovs" , X86_COND_S>;
+defm CMOVNS : CMOV<0x49, "cmovns", X86_COND_NS>;
+defm CMOVP  : CMOV<0x4A, "cmovp" , X86_COND_P>;
+defm CMOVNP : CMOV<0x4B, "cmovnp", X86_COND_NP>;
+defm CMOVL  : CMOV<0x4C, "cmovl" , X86_COND_L>;
+defm CMOVGE : CMOV<0x4D, "cmovge", X86_COND_GE>;
+defm CMOVLE : CMOV<0x4E, "cmovle", X86_COND_LE>;
+defm CMOVG  : CMOV<0x4F, "cmovg" , X86_COND_G>;
+
+
+// SetCC instructions.
+multiclass SETCC<bits<8> opc, string Mnemonic, PatLeaf OpNode> {
+  let Uses = [EFLAGS] in {
+    def r    : I<opc, MRMXr,  (outs GR8:$dst), (ins),
+                     !strconcat(Mnemonic, "\t$dst"),
+                     [(set GR8:$dst, (X86setcc OpNode, EFLAGS))],
+                     IIC_SET_R>, TB, Sched<[WriteALU]>;
+    def m    : I<opc, MRMXm,  (outs), (ins i8mem:$dst),
+                     !strconcat(Mnemonic, "\t$dst"),
+                     [(store (X86setcc OpNode, EFLAGS), addr:$dst)],
+                     IIC_SET_M>, TB, Sched<[WriteALU, WriteStore]>;
+  } // Uses = [EFLAGS]
+}
+
+defm SETO  : SETCC<0x90, "seto",  X86_COND_O>;   // is overflow bit set
+defm SETNO : SETCC<0x91, "setno", X86_COND_NO>;  // is overflow bit not set
+defm SETB  : SETCC<0x92, "setb",  X86_COND_B>;   // unsigned less than
+defm SETAE : SETCC<0x93, "setae", X86_COND_AE>;  // unsigned greater or equal
+defm SETE  : SETCC<0x94, "sete",  X86_COND_E>;   // equal to
+defm SETNE : SETCC<0x95, "setne", X86_COND_NE>;  // not equal to
+defm SETBE : SETCC<0x96, "setbe", X86_COND_BE>;  // unsigned less than or equal
+defm SETA  : SETCC<0x97, "seta",  X86_COND_A>;   // unsigned greater than
+defm SETS  : SETCC<0x98, "sets",  X86_COND_S>;   // is signed bit set
+defm SETNS : SETCC<0x99, "setns", X86_COND_NS>;  // is not signed
+defm SETP  : SETCC<0x9A, "setp",  X86_COND_P>;   // is parity bit set
+defm SETNP : SETCC<0x9B, "setnp", X86_COND_NP>;  // is parity bit not set
+defm SETL  : SETCC<0x9C, "setl",  X86_COND_L>;   // signed less than
+defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>;  // signed greater or equal
+defm SETLE : SETCC<0x9E, "setle", X86_COND_LE>;  // signed less than or equal
+defm SETG  : SETCC<0x9F, "setg",  X86_COND_G>;   // signed greater than
+
+// SALC is an undocumented instruction. Information for this instruction can be found
+// here http://www.rcollins.org/secrets/opcodes/SALC.html
+// Set AL if carry. 
+let Uses = [EFLAGS], Defs = [AL] in {
+  def SALC : I<0xD6, RawFrm, (outs), (ins), "salc", []>, Requires<[Not64BitMode]>;
+}

llvm/trunk/test/MC/Disassembler/X86/x86-16.txt

-# RUN: llvm-mc --disassemble %s -triple=i686-linux-gnu-code16 | FileCheck %s
-
-# CHECK: movl $305419896, %ebx
-0x66 0xbb 0x78 0x56 0x34 0x12
-
-# CHECK: pause
-0xf3 0x90
-
-# CHECK: sfence
-0x0f 0xae 0xf8
-
-# CHECK: lfence
-0x0f 0xae 0xe8
-
-# CHECK: mfence
-0x0f 0xae 0xf0
-
-# CHECK: stgi
-0x0f 0x01 0xdc
-
-# CHECK: clgi
-0x0f 0x01 0xdd
-
-# CHECK: rdtscp
-0x0f 0x01 0xf9
-
-# CHECK: movl %eax, 16(%ebp)
-0x67 0x66 0x89 0x45 0x10
-
-# CHECK: movl %eax, -16(%ebp)
-0x67 0x66 0x89 0x45 0xf0
-
-# CHECK: testb %cl, %bl
-0x84 0xcb
-
-# CHECK: cmpl %eax, %ebx
-0x66 0x39 0xc3
-
-# CHECK: addw %ax, %ax
-0x01 0xc0
-
-# CHECK: shrl %eax
-0x66 0xd1 0xe8
-
-# CHECK: shll %eax
-0x66 0xd1 0xe0
-
-# CHECK: shll %eax
-0x66 0xd1 0xe0
-
-# CHECK: movb 0, %al
-0xa0 0x00 0x00
-
-# CHECK: movw 0, %ax
-0xa1 0x00 0x00
-
-# CHECK: movl 0, %eax
-0x66 0xa1 0x00 0x00
-
-# CHECK: into
-0xce
-
-# CHECK: int3
-0xcc
-
-# CHECK: int $4
-0xcd 0x04
-
-# CHECK: int $127
-0xcd 0x7f
-
-# CHECK: pushfw
-0x9c
-
-# CHECK: pushfl
-0x66 0x9c
-
-# CHECK: popfw
-0x9d
-
-# CHECK: popfl
-0x66 0x9d
-
-# CHECK: retl
-0x66 0xc3
-
-# CHECK: cmoval %eax, %edx
-0x66 0x0f 0x47 0xd0
-
-# CHECK: cmovael %eax, %edx
-0x66 0x0f 0x43 0xd0
-
-# CHECK: cmovbel %eax, %edx
-0x66 0x0f 0x46 0xd0
-
-# CHECK: cmovbl %eax, %edx
-0x66 0x0f 0x42 0xd0
-
-# CHECK: cmovbw %bx, %bx
-0x0f 0x42 0xdb
-
-# CHECK: cmovbel %eax, %edx
-0x66 0x0f 0x46 0xd0
-
-# CHECK: cmovbl %eax, %edx
-0x66 0x0f 0x42 0xd0
-
-# CHECK: cmovel %eax, %edx
-0x66 0x0f 0x44 0xd0
-
-# CHECK: cmovgl %eax, %edx
-0x66 0x0f 0x4f 0xd0
-
-# CHECK: cmovgel %eax, %edx
-0x66 0x0f 0x4d 0xd0
-
-# CHECK: cmovll %eax, %edx
-0x66 0x0f 0x4c 0xd0
-
-# CHECK: cmovlel %eax, %edx
-0x66 0x0f 0x4e 0xd0
-
-# CHECK: cmovbel %eax, %edx
-0x66 0x0f 0x46 0xd0
-
-# CHECK: cmovnel %eax, %edx
-0x66 0x0f 0x45 0xd0
-
-# CHECK: cmovael %eax, %edx
-0x66 0x0f 0x43 0xd0
-
-# CHECK: cmoval %eax, %edx
-0x66 0x0f 0x47 0xd0
-
-# CHECK: cmovael %eax, %edx
-0x66 0x0f 0x43 0xd0
-
-# CHECK: cmovnel %eax, %edx
-0x66 0x0f 0x45 0xd0
-
-# CHECK: cmovlel %eax, %edx
-0x66 0x0f 0x4e 0xd0
-
-# CHECK: cmovgel %eax, %edx
-0x66 0x0f 0x4d 0xd0
-
-# CHECK: cmovnel %eax, %edx
-0x66 0x0f 0x45 0xd0
-
-# CHECK: cmovlel %eax, %edx
-0x66 0x0f 0x4e 0xd0
-
-# CHECK: cmovll %eax, %edx
-0x66 0x0f 0x4c 0xd0
-
-# CHECK: cmovgel %eax, %edx
-0x66 0x0f 0x4d 0xd0
-
-# CHECK: cmovgl %eax, %edx
-0x66 0x0f 0x4f 0xd0
-
-# CHECK: cmovnol %eax, %edx
-0x66 0x0f 0x41 0xd0
-
-# CHECK: cmovnpl %eax, %edx
-0x66 0x0f 0x4b 0xd0
-
-# CHECK: cmovnsl %eax, %edx
-0x66 0x0f 0x49 0xd0
-
-# CHECK: cmovnel %eax, %edx
-0x66 0x0f 0x45 0xd0
-
-# CHECK: cmovol %eax, %edx
-0x66 0x0f 0x40 0xd0
-
-# CHECK: cmovpl %eax, %edx
-0x66 0x0f 0x4a 0xd0
-
-# CHECK: cmovsl %eax, %edx
-0x66 0x0f 0x48 0xd0
-
-# CHECK: cmovel %eax, %edx
-0x66 0x0f 0x44 0xd0
-
-# CHECK: fmul %st(0)
-0xd8 0xc8
-
-# CHECK: fadd %st(0)
-0xd8 0xc0
-
-# CHECK: fsub %st(0)
-0xd8 0xe0
-
-# CHECK: fsubr %st(0)
-0xd8 0xe8
-
-# CHECK: fdivr %st(0)
-0xd8 0xf8
-
-# CHECK: fdiv %st(0)
-0xd8 0xf0
-
-# CHECK: movl %cs, %eax
-0x66 0x8c 0xc8
-
-# CHECK: movw %cs, %ax
-0x8c 0xc8
-
-# CHECK: movl %cs, (%eax)
-0x67 0x66 0x8c 0x08
-
-# CHECK: movw %cs, (%eax)
-0x67 0x8c 0x08
-
-# CHECK: movl %eax, %cs
-0x66 0x8e 0xc8
-
-# CHECK: movl (%eax), %cs
-0x67 0x66 0x8e 0x08
-
-# CHECK: movw (%eax), %cs
-0x67 0x8e 0x08
-
-# CHECKX: movl %cr0, %eax
-0x0f 0x20 0xc0
-
-# CHECKX: movl %cr1, %eax
-0x0f 0x20 0xc8
-
-# CHECKX: movl %cr2, %eax
-0x0f 0x20 0xd0
-
-# CHECKX: movl %cr3, %eax
-0x0f 0x20 0xd8
-
-# CHECKX: movl %cr4, %eax
-0x0f 0x20 0xe0
-
-# CHECKX: movl %dr0, %eax
-0x0f 0x21 0xc0
-
-# CHECKX: movl %dr1, %eax
-0x0f 0x21 0xc8
-
-# CHECKX: movl %dr1, %eax
-0x0f 0x21 0xc8
-
-# CHECKX: movl %dr2, %eax
-0x0f 0x21 0xd0
-
-# CHECKX: movl %dr3, %eax
-0x0f 0x21 0xd8
-
-# CHECKX: movl %dr4, %eax
-0x0f 0x21 0xe0
-
-# CHECKX: movl %dr5, %eax
-0x0f 0x21 0xe8
-
-# CHECKX: movl %dr6, %eax
-0x0f 0x21 0xf0
-
-# CHECKX: movl %dr7, %eax
-0x0f 0x21 0xf8
-
-# CHECK: wait
-0x9b
-
-# CHECK: movl %gs:124, %eax
-0x65 0x66 0x8b 0x06 0x7c 0x00
-
-# CHECK: pushaw
-0x60
-
-# CHECK: popaw
-0x61
-
-# CHECK: pushaw
-0x60
-
-# CHECK: popaw
-0x61
-
-# CHECK: pushal
-0x66 0x60
-
-# CHECK: popal
-0x66 0x61
-
-# CHECK: jmpw *8(%eax)
-0x67 0xff 0x60 0x08
-
-# CHECK: jmpl *8(%eax)
-0x67 0x66 0xff 0x60 0x08
-
-# CHECK: lcalll $2, $4660
-0x66 0x9a 0x34 0x12 0x00 0x00 0x02 0x00
-
-# CHECK: jcxz
-0xe3 0x00
-
-# CHECK: jecxz
-0x67 0xe3 0x00
-
-# CHECK: iretw
-0xcf
-
-# CHECK: iretw
-0xcf
-
-# CHECK: iretl
-0x66 0xcf
-
-# CHECK: sysretl
-0x0f 0x07
-
-# CHECK: sysretl
-0x0f 0x07
-
-# CHECK: testl -24(%ebp), %ecx
-0x67 0x66 0x85 0x4d 0xe8
-
-# CHECK: testl -24(%ebp), %ecx
-0x67 0x66 0x85 0x4d 0xe8
-
-# CHECK: pushw %cs
-0x0e
-
-# CHECK: pushw %ds
-0x1e
-
-# CHECK: pushw %ss
-0x16
-
-# CHECK: pushw %es
-0x06
-
-# CHECK: pushw %fs
-0x0f 0xa0
-
-# CHECK: pushw %gs
-0x0f 0xa8
-
-# CHECK: pushw %cs
-0x0e
-
-# CHECK: pushw %ds
-0x1e
-
-# CHECK: pushw %ss
-0x16
-
-# CHECK: pushw %es
-0x06
-
-# CHECK: pushw %fs
-0x0f 0xa0
-
-# CHECK: pushw %gs
-0x0f 0xa8
-
-# CHECK: pushl %cs
-0x66 0x0e
-
-# CHECK: pushl %ds
-0x66 0x1e
-
-# CHECK: pushl %ss
-0x66 0x16
-
-# CHECK: pushl %es
-0x66 0x06
-
-# CHECK: pushl %fs
-0x66 0x0f 0xa0
-
-# CHECK: pushl %gs
-0x66 0x0f 0xa8
-
-# CHECK: popw %ss
-0x17
-
-# CHECK: popw %ds
-0x1f
-
-# CHECK: popw %es
-0x07
-
-# CHECK: popl %ss
-0x66 0x17
-
-# CHECK: popl %ds
-0x66 0x1f
-
-# CHECK: popl %es
-0x66 0x07
-
-# CHECK: pushfl
-0x66 0x9c
-
-# CHECK: popfl
-0x66 0x9d
-
-# CHECK: pushfl
-0x66 0x9c
-
-# CHECK: popfl
-0x66 0x9d
-
-# CHECK: setb %bl
-0x0f 0x92 0xc3
-
-# CHECK: setb %bl
-0x0f 0x92 0xc3
-
-# CHECK: setae %bl
-0x0f 0x93 0xc3
-
-# CHECK: setae %bl
-0x0f 0x93 0xc3
-
-# CHECK: setbe %bl
-0x0f 0x96 0xc3
-
-# CHECK: seta %bl
-0x0f 0x97 0xc3
-
-# CHECK: setp %bl
-0x0f 0x9a 0xc3
-
-# CHECK: setnp %bl
-0x0f 0x9b 0xc3
-
-# CHECK: setl %bl
-0x0f 0x9c 0xc3
-
-# CHECK: setge %bl
-0x0f 0x9d 0xc3
-
-# CHECK: setle %bl
-0x0f 0x9e 0xc3
-
-# CHECK: setg %bl
-0x0f 0x9f 0xc3
-
-# CHECK: setne %cl
-0x0f 0x95 0xc1
-
-# CHECK: setb %bl
-0x0f 0x92 0xc3
-
-# CHECK: setb %bl
-0x0f 0x92 0xc3
-
-# CHECK: lcalll $31438, $31438
-0x66 0x9a 0xce 0x7a 0x00 0x00 0xce 0x7a
-
-# CHECK: lcalll $31438, $31438
-0x66 0x9a 0xce 0x7a 0x00 0x00 0xce 0x7a
-
-# CHECK: ljmpl $31438, $31438
-0x66 0xea 0xce 0x7a 0x00 0x00 0xce 0x7a
-
-# CHECK: ljmpl $31438, $31438
-0x66 0xea 0xce 0x7a 0x00 0x00 0xce 0x7a
-
-# CHECK: lcallw $31438, $31438
-0x9a 0xce 0x7a 0xce 0x7a
-
-# CHECK: lcallw $31438, $31438
-0x9a 0xce 0x7a 0xce 0x7a
-
-# CHECK: ljmpw $31438, $31438
-0xea 0xce 0x7a 0xce 0x7a
-
-# CHECK: ljmpw $31438, $31438
-0xea 0xce 0x7a 0xce 0x7a
-
-# CHECK: lcallw $31438, $31438
-0x9a 0xce 0x7a 0xce 0x7a
-
-# CHECK: lcallw $31438, $31438
-0x9a 0xce 0x7a 0xce 0x7a
-
-# CHECK: ljmpw $31438, $31438
-0xea 0xce 0x7a 0xce 0x7a
-
-# CHECK: ljmpw $31438, $31438
-0xea 0xce 0x7a 0xce 0x7a
-
-# CHECK: calll 
-0x66 0xe8 0x00 0x00 0x00 0x00
-
-# CHECK: callw
-0xe8 0x00 0x00
-
-# CHECK: incb %al
-0xfe 0xc0
-
-# CHECK: incw %ax
-0x40
-
-# CHECK: incl %eax
-0x66 0x40
-
-# CHECK: decb %al
-0xfe 0xc8
-
-# CHECK: decw %ax
-0x48
-
-# CHECK: decl %eax
-0x66 0x48
-
-# CHECK: pshufw $14, %mm4, %mm0
-0x0f 0x70 0xc4 0x0e
-
-# CHECK: pshufw $90, %mm4, %mm0
-0x0f 0x70 0xc4 0x5a
-
-# CHECK: aaa
-0x37
-
-# CHECK: aad $1
-0xd5 0x01
-
-# CHECK: aad
-0xd5 0x0a
-
-# CHECK: aad
-0xd5 0x0a
-
-# CHECK: aam $2
-0xd4 0x02
-
-# CHECK: aam
-0xd4 0x0a
-
-# CHECK: aam
-0xd4 0x0a
-
-# CHECK: aas
-0x3f
-
-# CHECK: daa
-0x27
-
-# CHECK: das
-0x2f
-
-# CHECK: retw $31438
-0xc2 0xce 0x7a
-
-# CHECK: lretw $31438
-0xca 0xce 0x7a
-
-# CHECK: retw $31438
-0xc2 0xce 0x7a
-
-# CHECK: lretw $31438
-0xca 0xce 0x7a
-
-# CHECK: retl $31438
-0x66 0xc2 0xce 0x7a
-
-# CHECK: lretl $31438
-0x66 0xca 0xce 0x7a
-
-# CHECK: bound 2(%eax), %bx
-0x67 0x62 0x58 0x02
-
-# CHECK: bound 4(%ebx), %ecx
-0x67 0x66 0x62 0x4b 0x04
-
-# CHECK: arpl %bx, %bx
-0x63 0xdb
-
-# CHECK: arpl %bx, 6(%ecx)
-0x67 0x63 0x59 0x06
-
-# CHECK: lgdtw 4(%eax)
-0x67 0x0f 0x01 0x50 0x04
-
-# CHECK: lgdtw 4(%eax)
-0x67 0x0f 0x01 0x50 0x04
-
-# CHECK: lgdtl 4(%eax)
-0x67 0x66 0x0f 0x01 0x50 0x04
-
-# CHECK: lidtw 4(%eax)
-0x67 0x0f 0x01 0x58 0x04
-
-# CHECK: lidtw 4(%eax)
-0x67 0x0f 0x01 0x58 0x04
-
-# CHECK: lidtl 4(%eax)
-0x67 0x66 0x0f 0x01 0x58 0x04
-
-# CHECK: sgdtw 4(%eax)
-0x67 0x0f 0x01 0x40 0x04
-
-# CHECK: sgdtw 4(%eax)
-0x67 0x0f 0x01 0x40 0x04
-
-# CHECK: sgdtl 4(%eax)
-0x67 0x66 0x0f 0x01 0x40 0x04
-
-# CHECK: sidtw 4(%eax)
-0x67 0x0f 0x01 0x48 0x04
-
-# CHECK: sidtw 4(%eax)
-0x67 0x0f 0x01 0x48 0x04
-
-# CHECK: sidtl 4(%eax)
-0x67 0x66 0x0f 0x01 0x48 0x04
-
-# CHECK: fcompi %st(2)
-0xdf 0xf2
-
-# CHECK: fcompi %st(2)
-0xdf 0xf2
-
-# CHECK: fcompi %st(1)
-0xdf 0xf1
-
-# CHECK: fucompi %st(2)
-0xdf 0xea
-
-# CHECK: fucompi %st(2)
-0xdf 0xea
-
-# CHECK: fucompi %st(1)
-0xdf 0xe9
-
-# CHECK: fldcw 32493
-0xd9 0x2e 0xed 0x7e
-
-# CHECK: fldcw 32493
-0xd9 0x2e 0xed 0x7e
-
-# CHECK: fnstcw 32493
-0xd9 0x3e 0xed 0x7e
-
-# CHECK: fnstcw 32493
-0xd9 0x3e 0xed 0x7e
-
-# CHECK: wait
-0x9b
-
-# CHECK: fnstcw 32493
-0xd9 0x3e 0xed 0x7e
-
-# CHECK: wait
-0x9b
-
-# CHECK: fnstcw 32493
-0xd9 0x3e 0xed 0x7e
-
-# CHECK: fnstsw 32493
-0xdd 0x3e 0xed 0x7e
-
-# CHECK: fnstsw 32493
-0xdd 0x3e 0xed 0x7e
-
-# CHECK: wait
-0x9b
-
-# CHECK: fnstsw 32493
-0xdd 0x3e 0xed 0x7e
-
-# CHECK: wait
-0x9b
-
-# CHECK: fnstsw 32493
-0xdd 0x3e 0xed 0x7e
-
-# CHECK: verr 32493
-0x0f 0x00 0x26 0xed 0x7e
-
-# CHECK: verr 32493
-0x0f 0x00 0x26 0xed 0x7e
-
-# CHECK: wait
-0x9b
-
-# CHECK: fnclex
-0xdb 0xe2
-
-# CHECK: fnclex
-0xdb 0xe2
-
-# CHECK: ud2
-0x0f 0x0b
-
-# CHECK: ud2
-0x0f 0x0b
-
-# CHECK: ud2b
-0x0f 0xb9
-
-# CHECK: loope
-0xe1 0x00
-
-# CHECK: loopne
-0xe0 0x00
-
-# CHECK: outsb
-0x6e
-
-# CHECK: outsw
-0x6f
-
-# CHECK: outsl
-0x66 0x6f
-
-# CHECK: insb
-0x6c
-
-# CHECK: insw
-0x6d
-
-# CHECK: insl
-0x66 0x6d
-
-# CHECK: movsb
-0xa4
-
-# CHECK: movsw
-0xa5
-
-# CHECK: movsl
-0x66 0xa5
-
-# CHECK: lodsb
-0xac
-
-# CHECK: lodsw
-0xad
-
-# CHECK: lodsl
-0x66 0xad
-
-# CHECK: stosb
-0xaa
-
-# CHECK: stosw
-0xab
-
-# CHECK: stosl
-0x66 0xab
-
-# CHECK: strw %ax
-0x0f 0x00 0xc8
-
-# CHECK: strl %eax
-0x66 0x0f 0x00 0xc8
-
-# CHECK: fsubp %st(1)
-0xde 0xe1
-
-# CHECK: fsubp %st(2)
-0xde 0xe2
-
-# CHECKX: nop
-0x66 0x90
-
-# CHECKX: nop
-0x90
-
-# CHECK: xchgl %ecx, %eax
-0x66 0x91
-
-# CHECK: xchgl %ecx, %eax
-0x66 0x91
-
-# CHECK: retw
-0xc3
-
-# CHECK: retl
-0x66 0xc3
-
-# CHECK: lretw
-0xcb
-
-# CHECK: lretl
-0x66 0xcb
-
-# CHECK: callw  -1
-0xe8 0xff 0xff
+# RUN: llvm-mc --disassemble %s -triple=i686-linux-gnu-code16 | FileCheck %s
+
+# CHECK: movl $305419896, %ebx
+0x66 0xbb 0x78 0x56 0x34 0x12
+
+# CHECK: pause
+0xf3 0x90
+
+# CHECK: sfence
+0x0f 0xae 0xf8
+
+# CHECK: lfence
+0x0f 0xae 0xe8
+
+# CHECK: mfence
+0x0f 0xae 0xf0
+
+# CHECK: stgi
+0x0f 0x01 0xdc
+
+# CHECK: clgi
+0x0f 0x01 0xdd
+
+# CHECK: rdtscp
+0x0f 0x01 0xf9
+
+# CHECK: movl %eax, 16(%ebp)
+0x67 0x66 0x89 0x45 0x10
+
+# CHECK: movl %eax, -16(%ebp)
+0x67 0x66 0x89 0x45 0xf0
+
+# CHECK: testb %cl, %bl
+0x84 0xcb
+
+# CHECK: cmpl %eax, %ebx
+0x66 0x39 0xc3
+
+# CHECK: addw %ax, %ax
+0x01 0xc0
+
+# CHECK: shrl %eax
+0x66 0xd1 0xe8
+
+# CHECK: shll %eax
+0x66 0xd1 0xe0
+
+# CHECK: shll %eax
+0x66 0xd1 0xe0
+
+# CHECK: movb 0, %al
+0xa0 0x00 0x00
+
+# CHECK: movw 0, %ax
+0xa1 0x00 0x00
+
+# CHECK: movl 0, %eax
+0x66 0xa1 0x00 0x00
+
+# CHECK: into
+0xce
+
+# CHECK: int3
+0xcc
+
+# CHECK: int $4
+0xcd 0x04
+
+# CHECK: int $127
+0xcd 0x7f
+
+# CHECK: pushfw
+0x9c
+
+# CHECK: pushfl
+0x66 0x9c
+
+# CHECK: popfw
+0x9d
+
+# CHECK: popfl
+0x66 0x9d
+
+# CHECK: retl
+0x66 0xc3
+
+# CHECK: cmoval %eax, %edx
+0x66 0x0f 0x47 0xd0
+
+# CHECK: cmovael %eax, %edx
+0x66 0x0f 0x43 0xd0
+
+# CHECK: cmovbel %eax, %edx
+0x66 0x0f 0x46 0xd0
+
+# CHECK: cmovbl %eax, %edx
+0x66 0x0f 0x42 0xd0
+
+# CHECK: cmovbw %bx, %bx
+0x0f 0x42 0xdb
+
+# CHECK: cmovbel %eax, %edx
+0x66 0x0f 0x46 0xd0
+
+# CHECK: cmovbl %eax, %edx
+0x66 0x0f 0x42 0xd0
+
+# CHECK: cmovel %eax, %edx
+0x66 0x0f 0x44 0xd0
+
+# CHECK: cmovgl %eax, %edx
+0x66 0x0f 0x4f 0xd0
+
+# CHECK: cmovgel %eax, %edx
+0x66 0x0f 0x4d 0xd0
+
+# CHECK: cmovll %eax, %edx
+0x66 0x0f 0x4c 0xd0
+
+# CHECK: cmovlel %eax, %edx
+0x66 0x0f 0x4e 0xd0
+
+# CHECK: cmovbel %eax, %edx
+0x66 0x0f 0x46 0xd0
+
+# CHECK: cmovnel %eax, %edx
+0x66 0x0f 0x45 0xd0
+
+# CHECK: cmovael %eax, %edx
+0x66 0x0f 0x43 0xd0
+
+# CHECK: cmoval %eax, %edx
+0x66 0x0f 0x47 0xd0
+
+# CHECK: cmovael %eax, %edx
+0x66 0x0f 0x43 0xd0
+
+# CHECK: cmovnel %eax, %edx
+0x66 0x0f 0x45 0xd0
+
+# CHECK: cmovlel %eax, %edx
+0x66 0x0f 0x4e 0xd0
+
+# CHECK: cmovgel %eax, %edx
+0x66 0x0f 0x4d 0xd0
+
+# CHECK: cmovnel %eax, %edx
+0x66 0x0f 0x45 0xd0
+
+# CHECK: cmovlel %eax, %edx
+0x66 0x0f 0x4e 0xd0
+
+# CHECK: cmovll %eax, %edx
+0x66 0x0f 0x4c 0xd0
+
+# CHECK: cmovgel %eax, %edx
+0x66 0x0f 0x4d 0xd0
+
+# CHECK: cmovgl %eax, %edx
+0x66 0x0f 0x4f 0xd0
+
+# CHECK: cmovnol %eax, %edx
+0x66 0x0f 0x41 0xd0
+
+# CHECK: cmovnpl %eax, %edx
+0x66 0x0f 0x4b 0xd0
+
+# CHECK: cmovnsl %eax, %edx
+0x66 0x0f 0x49 0xd0
+
+# CHECK: cmovnel %eax, %edx
+0x66 0x0f 0x45 0xd0
+
+# CHECK: cmovol %eax, %edx
+0x66 0x0f 0x40 0xd0
+
+# CHECK: cmovpl %eax, %edx
+0x66 0x0f 0x4a 0xd0
+
+# CHECK: cmovsl %eax, %edx
+0x66 0x0f 0x48 0xd0
+
+# CHECK: cmovel %eax, %edx
+0x66 0x0f 0x44 0xd0
+
+# CHECK: fmul %st(0)
+0xd8 0xc8
+
+# CHECK: fadd %st(0)
+0xd8 0xc0
+
+# CHECK: fsub %st(0)
+0xd8 0xe0
+
+# CHECK: fsubr %st(0)
+0xd8 0xe8
+
+# CHECK: fdivr %st(0)
+0xd8 0xf8
+
+# CHECK: fdiv %st(0)
+0xd8 0xf0
+
+# CHECK: movl %cs, %eax
+0x66 0x8c 0xc8
+
+# CHECK: movw %cs, %ax
+0x8c 0xc8
+
+# CHECK: movl %cs, (%eax)
+0x67 0x66 0x8c 0x08
+
+# CHECK: movw %cs, (%eax)
+0x67 0x8c 0x08
+
+# CHECK: movl %eax, %cs
+0x66 0x8e 0xc8
+
+# CHECK: movl (%eax), %cs
+0x67 0x66 0x8e 0x08
+
+# CHECK: movw (%eax), %cs
+0x67 0x8e 0x08
+
+# CHECKX: movl %cr0, %eax
+0x0f 0x20 0xc0
+
+# CHECKX: movl %cr1, %eax
+0x0f 0x20 0xc8
+
+# CHECKX: movl %cr2, %eax
+0x0f 0x20 0xd0
+
+# CHECKX: movl %cr3, %eax
+0x0f 0x20 0xd8
+
+# CHECKX: movl %cr4, %eax
+0x0f 0x20 0xe0
+
+# CHECKX: movl %dr0, %eax
+0x0f 0x21 0xc0
+
+# CHECKX: movl %dr1, %eax
+0x0f 0x21 0xc8
+
+# CHECKX: movl %dr1, %eax
+0x0f 0x21 0xc8
+
+# CHECKX: movl %dr2, %eax
+0x0f 0x21 0xd0
+
+# CHECKX: movl %dr3, %eax
+0x0f 0x21 0xd8
+
+# CHECKX: movl %dr4, %eax
+0x0f 0x21 0xe0
+
+# CHECKX: movl %dr5, %eax
+0x0f 0x21 0xe8
+
+# CHECKX: movl %dr6, %eax
+0x0f 0x21 0xf0
+
+# CHECKX: movl %dr7, %eax
+0x0f 0x21 0xf8
+
+# CHECK: wait
+0x9b
+
+# CHECK: movl %gs:124, %eax
+0x65 0x66 0x8b 0x06 0x7c 0x00
+
+# CHECK: pushaw
+0x60
+
+# CHECK: popaw
+0x61
+
+# CHECK: pushaw
+0x60
+
+# CHECK: popaw
+0x61
+
+# CHECK: pushal
+0x66 0x60
+
+# CHECK: popal
+0x66 0x61
+
+# CHECK: jmpw *8(%eax)
+0x67 0xff 0x60 0x08
+
+# CHECK: jmpl *8(%eax)
+0x67 0x66 0xff 0x60 0x08
+
+# CHECK: lcalll $2, $4660
+0x66 0x9a 0x34 0x12 0x00 0x00 0x02 0x00
+
+# CHECK: jcxz
+0xe3 0x00
+
+# CHECK: jecxz
+0x67 0xe3 0x00
+
+# CHECK: iretw
+0xcf
+
+# CHECK: iretw
+0xcf
+
+# CHECK: iretl
+0x66 0xcf
+
+# CHECK: sysretl
+0x0f 0x07
+
+# CHECK: sysretl
+0x0f 0x07
+
+# CHECK: testl -24(%ebp), %ecx
+0x67 0x66 0x85 0x4d 0xe8
+
+# CHECK: testl -24(%ebp), %ecx
+0x67 0x66 0x85 0x4d 0xe8
+
+# CHECK: pushw %cs
+0x0e
+
+# CHECK: pushw %ds
+0x1e
+
+# CHECK: pushw %ss
+0x16
+
+# CHECK: pushw %es
+0x06
+
+# CHECK: pushw %fs
+0x0f 0xa0
+
+# CHECK: pushw %gs
+0x0f 0xa8
+
+# CHECK: pushw %cs
+0x0e
+
+# CHECK: pushw %ds
+0x1e
+
+# CHECK: pushw %ss
+0x16
+
+# CHECK: pushw %es
+0x06
+
+# CHECK: pushw %fs
+0x0f 0xa0
+
+# CHECK: pushw %gs
+0x0f 0xa8
+
+# CHECK: pushl %cs
+0x66 0x0e
+
+# CHECK: pushl %ds
+0x66 0x1e
+
+# CHECK: pushl %ss
+0x66 0x16
+
+# CHECK: pushl %es
+0x66 0x06
+
+# CHECK: pushl %fs
+0x66 0x0f 0xa0
+
+# CHECK: pushl %gs
+0x66 0x0f 0xa8
+
+# CHECK: popw %ss
+0x17
+
+# CHECK: popw %ds
+0x1f
+
+# CHECK: popw %es
+0x07
+
+# CHECK: popl %ss
+0x66 0x17
+
+# CHECK: popl %ds
+0x66 0x1f
+
+# CHECK: popl %es
+0x66 0x07
+
+# CHECK: pushfl
+0x66 0x9c
+
+# CHECK: popfl
+0x66 0x9d
+
+# CHECK: pushfl
+0x66 0x9c
+
+# CHECK: popfl
+0x66 0x9d
+
+# CHECK: salc
+0xd6
+
+# CHECK: setb %bl
+0x0f 0x92 0xc3
+
+# CHECK: setb %bl
+0x0f 0x92 0xc3
+
+# CHECK: setae %bl
+0x0f 0x93 0xc3
+
+# CHECK: setae %bl
+0x0f 0x93 0xc3
+
+# CHECK: setbe %bl
+0x0f 0x96 0xc3
+
+# CHECK: seta %bl
+0x0f 0x97 0xc3
+
+# CHECK: setp %bl
+0x0f 0x9a 0xc3
+
+# CHECK: setnp %bl
+0x0f 0x9b 0xc3
+
+# CHECK: setl %bl
+0x0f 0x9c 0xc3
+
+# CHECK: setge %bl
+0x0f 0x9d 0xc3
+
+# CHECK: setle %bl
+0x0f 0x9e 0xc3
+
+# CHECK: setg %bl
+0x0f 0x9f 0xc3
+
+# CHECK: setne %cl
+0x0f 0x95 0xc1
+
+# CHECK: setb %bl
+0x0f 0x92 0xc3
+
+# CHECK: setb %bl
+0x0f 0x92 0xc3
+
+# CHECK: lcalll $31438, $31438
+0x66 0x9a 0xce 0x7a 0x00 0x00 0xce 0x7a
+
+# CHECK: lcalll $31438, $31438
+0x66 0x9a 0xce 0x7a 0x00 0x00 0xce 0x7a
+
+# CHECK: ljmpl $31438, $31438
+0x66 0xea 0xce 0x7a 0x00 0x00 0xce 0x7a
+
+# CHECK: ljmpl $31438, $31438
+0x66 0xea 0xce 0x7a 0x00 0x00 0xce 0x7a
+
+# CHECK: lcallw $31438, $31438
+0x9a 0xce 0x7a 0xce 0x7a
+
+# CHECK: lcallw $31438, $31438
+0x9a 0xce 0x7a 0xce 0x7a
+
+# CHECK: ljmpw $31438, $31438
+0xea 0xce 0x7a 0xce 0x7a
+
+# CHECK: ljmpw $31438, $31438
+0xea 0xce 0x7a 0xce 0x7a
+
+# CHECK: lcallw $31438, $31438
+0x9a 0xce 0x7a 0xce 0x7a
+
+# CHECK: lcallw $31438, $31438
+0x9a 0xce 0x7a 0xce 0x7a
+
+# CHECK: ljmpw $31438, $31438
+0xea 0xce 0x7a 0xce 0x7a
+
+# CHECK: ljmpw $31438, $31438
+0xea 0xce 0x7a 0xce 0x7a
+
+# CHECK: calll 
+0x66 0xe8 0x00 0x00 0x00 0x00
+
+# CHECK: callw
+0xe8 0x00 0x00
+
+# CHECK: incb %al
+0xfe 0xc0
+
+# CHECK: incw %ax
+0x40
+
+# CHECK: incl %eax
+0x66 0x40
+
+# CHECK: decb %al
+0xfe 0xc8
+
+# CHECK: decw %ax
+0x48
+
+# CHECK: decl %eax
+0x66 0x48
+
+# CHECK: pshufw $14, %mm4, %mm0
+0x0f 0x70 0xc4 0x0e
+
+# CHECK: pshufw $90, %mm4, %mm0
+0x0f 0x70 0xc4 0x5a
+
+# CHECK: aaa
+0x37
+
+# CHECK: aad $1
+0xd5 0x01
+
+# CHECK: aad
+0xd5 0x0a
+
+# CHECK: aad
+0xd5 0x0a
+
+# CHECK: aam $2
+0xd4 0x02
+
+# CHECK: aam
+0xd4 0x0a
+
+# CHECK: aam
+0xd4 0x0a
+
+# CHECK: aas
+0x3f
+
+# CHECK: daa
+0x27
+
+# CHECK: das
+0x2f
+
+# CHECK: retw $31438
+0xc2 0xce 0x7a
+
+# CHECK: lretw $31438
+0xca 0xce 0x7a
+
+# CHECK: retw $31438
+0xc2 0xce 0x7a
+
+# CHECK: lretw $31438
+0xca 0xce 0x7a
+
+# CHECK: retl $31438
+0x66 0xc2 0xce 0x7a
+
+# CHECK: lretl $31438
+0x66 0xca 0xce 0x7a
+
+# CHECK: bound 2(%eax), %bx
+0x67 0x62 0x58 0x02
+
+# CHECK: bound 4(%ebx), %ecx
+0x67 0x66 0x62 0x4b 0x04
+
+# CHECK: arpl %bx, %bx
+0x63 0xdb
+
+# CHECK: arpl %bx, 6(%ecx)
+0x67 0x63 0x59 0x06
+
+# CHECK: lgdtw 4(%eax)
+0x67 0x0f 0x01 0x50 0x04
+
+# CHECK: lgdtw 4(%eax)
+0x67 0x0f 0x01 0x50 0x04
+
+# CHECK: lgdtl 4(%eax)
+0x67 0x66 0x0f 0x01 0x50 0x04
+
+# CHECK: lidtw 4(%eax)
+0x67 0x0f 0x01 0x58 0x04
+
+# CHECK: lidtw 4(%eax)
+0x67 0x0f 0x01 0x58 0x04
+
+# CHECK: lidtl 4(%eax)
+0x67 0x66 0x0f 0x01 0x58 0x04
+
+# CHECK: sgdtw 4(%eax)
+0x67 0x0f 0x01 0x40 0x04
+
+# CHECK: sgdtw 4(%eax)
+0x67 0x0f 0x01 0x40 0x04
+
+# CHECK: sgdtl 4(%eax)
+0x67 0x66 0x0f 0x01 0x40 0x04
+
+# CHECK: sidtw 4(%eax)
+0x67 0x0f 0x01 0x48 0x04
+
+# CHECK: sidtw 4(%eax)
+0x67 0x0f 0x01 0x48 0x04
+
+# CHECK: sidtl 4(%eax)
+0x67 0x66 0x0f 0x01 0x48 0x04
+
+# CHECK: fcompi %st(2)
+0xdf 0xf2
+
+# CHECK: fcompi %st(2)
+0xdf 0xf2
+
+# CHECK: fcompi %st(1)
+0xdf 0xf1
+
+# CHECK: fucompi %st(2)
+0xdf 0xea
+
+# CHECK: fucompi %st(2)
+0xdf 0xea
+
+# CHECK: fucompi %st(1)
+0xdf 0xe9
+
+# CHECK: fldcw 32493
+0xd9 0x2e 0xed 0x7e
+
+# CHECK: fldcw 32493
+0xd9 0x2e 0xed 0x7e
+
+# CHECK: fnstcw 32493
+0xd9 0x3e 0xed 0x7e
+
+# CHECK: fnstcw 32493
+0xd9 0x3e 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnstcw 32493
+0xd9 0x3e 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnstcw 32493
+0xd9 0x3e 0xed 0x7e
+
+# CHECK: fnstsw 32493
+0xdd 0x3e 0xed 0x7e
+
+# CHECK: fnstsw 32493
+0xdd 0x3e 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnstsw 32493
+0xdd 0x3e 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnstsw 32493
+0xdd 0x3e 0xed 0x7e
+
+# CHECK: verr 32493
+0x0f 0x00 0x26 0xed 0x7e
+
+# CHECK: verr 32493
+0x0f 0x00 0x26 0xed 0x7e
+
+# CHECK: wait
+0x9b
+
+# CHECK: fnclex
+0xdb 0xe2
+
+# CHECK: fnclex
+0xdb 0xe2
+
+# CHECK: ud2
+0x0f 0x0b
+
+# CHECK: ud2
+0x0f 0x0b
+
+# CHECK: ud2b
+0x0f 0xb9
+
+# CHECK: loope
+0xe1 0x00
+
+# CHECK: loopne
+0xe0 0x00
+
+# CHECK: outsb
+0x6e
+
+# CHECK: outsw
+0x6f
+
+# CHECK: outsl
+0x66 0x6f
+
+# CHECK: insb
+0x6c
+
+# CHECK: insw
+0x6d
+
+# CHECK: insl
+0x66 0x6d
+
+# CHECK: movsb
+0xa4
+
+# CHECK: movsw
+0xa5
+
+# CHECK: movsl
+0x66 0xa5
+
+# CHECK: lodsb
+0xac
+
+# CHECK: lodsw
+0xad
+
+# CHECK: lodsl
+0x66 0xad
+
+# CHECK: stosb
+0xaa
+
+# CHECK: stosw
+0xab
+
+# CHECK: stosl
+0x66 0xab
+
+# CHECK: strw %ax
+0x0f 0x00 0xc8
+
+# CHECK: strl %eax
+0x66 0x0f 0x00 0xc8
+
+# CHECK: fsubp %st(1)
+0xde 0xe1
+
+# CHECK: fsubp %st(2)
+0xde 0xe2
+
+# CHECKX: nop
+0x66 0x90
+
+# CHECKX: nop
+0x90
+
+# CHECK: xchgl %ecx, %eax
+0x66 0x91
+
+# CHECK: xchgl %ecx, %eax
+0x66 0x91
+
+# CHECK: retw
+0xc3
+
+# CHECK: retl
+0x66 0xc3
+
+# CHECK: lretw
+0xcb
+
+# CHECK: lretl
+0x66 0xcb
+
+# CHECK: callw  -1
+0xe8 0xff 0xff

llvm/trunk/test/MC/X86/x86-32-coverage.s

 // CHECK: std
 // CHECK:  encoding: [0xfd]
           std
 
 // CHECK: sti
 // CHECK:  encoding: [0xfb]
           sti
 
+// CHECK: salc
+// CHECK:  encoding: [0xd6]
+          salc
+
 // CHECK: addb  $254, 3735928559(%ebx,%ecx,8)
 // CHECK:  encoding: [0x80,0x84,0xcb,0xef,0xbe,0xad,0xde,0xfe]
           addb  $0xfe,0xdeadbeef(%ebx,%ecx,8)
 
 // CHECK: addb  $254, 69
 // CHECK:  encoding: [0x80,0x05,0x45,0x00,0x00,0x00,0xfe]
           addb  $0xfe,0x45