RuntimeDyldELF: Implement LDST8_ABS_LO12_NC and LDST16_ABS_LO12_NC relocs

[peter.smith]

That looks correct to me according to ELF for the 64-bit ARM architecture definitions of R_AARCH_64_LDST8_ABS_LO12_NC and R_AARCH_64_LDST16_ABS_LO12_NC. Will be worth waiting to see if there are any other comments.

[davide]

LGTM

llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp

case ELF::R_AARCH64_ADR_PREL_PG_HI21: {
     break;
   }
   case ELF::R_AARCH64_ADD_ABS_LO12_NC:
     // Operation: S + A
     // Immediate goes in bits 21:10 of LD/ST instruction, taken
     // from bits 11:0 of X
     or32AArch64Imm(TargetPtr, Value + Addend);
     break;
+  case ELF::R_AARCH64_LDST8_ABS_LO12_NC:
+    // Operation: S + A
+    // Immediate goes in bits 21:10 of LD/ST instruction, taken
+    // from bits 11:0 of X
+    or32AArch64Imm(TargetPtr, getBits(Value + Addend, 0, 11));
+    break;
+  case ELF::R_AARCH64_LDST16_ABS_LO12_NC:
+    // Operation: S + A
+    // Immediate goes in bits 21:10 of LD/ST instruction, taken
+    // from bits 11:1 of X
+    or32AArch64Imm(TargetPtr, getBits(Value + Addend, 1, 11));
+    break;
   case ELF::R_AARCH64_LDST32_ABS_LO12_NC:
     // Operation: S + A
     // Immediate goes in bits 21:10 of LD/ST instruction, taken
     // from bits 11:2 of X
     or32AArch64Imm(TargetPtr, getBits(Value + Addend, 2, 11));
     break;
   case ELF::R_AARCH64_LDST64_ABS_LO12_NC:
     // Operation: S + A
case ELF::R_MIPS_PCHI16:
     return ELF::R_MIPS_PCLO16;
   default:
     break;
   }
   return ELF::R_MIPS_NONE;
 }
 
 // Sometimes we don't need to create thunk for a branch.
-// This typically happens when branch target is located 
+// This typically happens when branch target is located
 // in the same object file. In such case target is either
 // a weak symbol or symbol in a different executable section.
 // This function checks if branch target is located in the
 // same object file and if distance between source and target
 // fits R_AARCH64_CALL26 relocation. If both conditions are
 // met, it emits direct jump to the target and returns true.
 // Otherwise false is returned and thunk is created.
 bool RuntimeDyldELF::resolveAArch64ShortBranch(

llvm/trunk/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_relocations.s

# R_AARCH64_MOVW_UABS_G3
         movz    x0, #:abs_g3:f
 # R_AARCH64_MOVW_UABS_G2_NC
         movk    x0, #:abs_g2_nc:f
 # R_AARCH64_MOVW_UABS_G1_NC
         movk    x0, #:abs_g1_nc:f
 # R_AARCH64_MOVW_UABS_G0_NC
         movk    x0, #:abs_g0_nc:f
 l:
+# R_AARCH64_LDST8_ABS_LO12_NC
+        ldrsb x4, [x5, :lo12:a+1]
+# R_AARCH64_LDST16_ABS_LO12_NC
+        ldrh w4, [x5, :lo12:a+2]
 # R_AARCH64_LDST32_ABS_LO12_NC
         ldr s4, [x5, :lo12:a]
 # R_AARCH64_LDST64_ABS_LO12_NC
         ldr x4, [x5, :lo12:a]
 p:
 # R_AARCH64_ADR_PREL_PG_HI21
 # Test both low and high immediate values
         adrp x4, a + 20480 # 16384 + 4096
# R_AARCH64_PREL64
         .p2align        3
         .xword f - .
 
 # rtdyld-check: *{4}(g) = 0xd2e02460
 # rtdyld-check: *{4}(g + 4) = 0xf2c8ace0
 # rtdyld-check: *{4}(g + 8) = 0xf2b13560
 # rtdyld-check: *{4}(g + 12) = 0xf299bde0
 
-## Check LDST32_ABS_LO12_NC and LDST64_ABS_LO12_NC
-# rtdyld-check: (*{4}l)[21:10] = a[11:2]
-# rtdyld-check: (*{4}(l+4))[21:10] = a[11:3]
+## Check LDSTXX_ABS_LO12_NC
+# rtdyld-check: (*{4}l)[21:10] = (a+1)[11:0]
+# rtdyld-check: (*{4}(l+4))[21:10] = (a+2)[11:1]
+# rtdyld-check: (*{4}(l+8))[21:10] = a[11:2]
+# rtdyld-check: (*{4}(l+12))[21:10] = a[11:3]
 
 ## Check ADR_PREL_PG_HI21. Low order bits of immediate value
 ## go to bits 30:29. High order bits go to bits 23:5
 # rtdyld-check: (*{4}p)[30:29] = (a - p + 20480)[13:12]
 # rtdyld-check: (*{4}p)[23:5] = (a - p + 20480)[32:14]
 
 # rtdyld-check: *{8}k = f
 # rtdyld-check: *{4}r = (Q - r)[31:0]
 # rtdyld-check: *{8}(r + 8) = f - r - 8
 
 ## f & 0xFFF = 0xdef (bits 11:0 of f)
 ## 0xdef << 10 = 0x37bc00
 # rtdyld-check: *{4}(a) = 0x9137bc00