[InstCombine] icmp sgt (shl nsw X, C1), C0 --> icmp sgt X, C0 >> C1

[spatel]

Summary

Try harder to fold icmp with shl nsw as discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2017-January/108749.html

This may eventually help solve:
https://llvm.org/bugs/show_bug.cgi?id=30773

[spatel]

Ping.

[bryant]

This looks like the signed analogue of the unsigned case on line 1965. Since the unsigned case handles both ugt and ule (but makes the substitutions for ult), perhaps you could handle sle as well:

Name: sle
%c = shl nsw i8 %x, C1
%d = icmp sle %c, C0
  =>
%d = icmp sle %x, (C0 >> C1)

----------------------------------------
Optimization: sle
Done: 1
Optimization is correct!

http://rise4fun.com/Alive/j

[spatel]

In D28406#648394, @bryant wrote:

This looks like the signed analogue of the unsigned case on line 1965. Since the unsigned case handles both ugt and ule (but makes the substitutions for ult), perhaps you could handle sle as well:

Sure - I was planning to expand this for sle (slt) and the missed eq/ne folds. It will make the code patch slightly bigger to handle sgt/sle in one step, but if that's preferred to match the existing code, I think it's ok.

To match LLVM's canonicalization to slt, I think the Alive code becomes:
Pre: C0 != -128
%a = shl nsw i8 %x, C1
%b = icmp slt %a, C0

=>

%b = icmp slt %x, ((C0 - 1) >> C1) + 1

[spatel]

Patch updated:
Handle sgt, sle (slt), eq/ne in one patch to match the existing and related 'shl nuw' folds.
I added tests for sle with rL292248 and refactored with rL292260.

[bryant]

lib/Transforms/InstCombine/InstCombineCompares.cpp

1953

Cmp.isEquality() || Pred == ICmpInst::ICMP_UGT looks equivalent to Pred == ICMP_UGE. From memory, the unsigned counterparts only work with ugt and ule. It doesn't work with uge.

Name: ugt
%a = shl nsw i8 %x, C1
%b = icmp ugt %a, C0
  =>
%b = icmp ugt %x, (C0 >> C1)

----------------------------------------
Optimization: ugt
Done: 1
Optimization is correct! 

Name: eq
%a = shl nsw i8 %x, C1
%b = icmp eq %a, C0
  =>
%b = icmp eq %x, (C0 >> C1)

----------------------------------------
Optimization: eq
ERROR: Mismatch in values of i1 %b

http://rise4fun.com/Alive/D1

[bryant]

lib/Transforms/InstCombine/InstCombineCompares.cpp

1918

Just working by analogy (see below), I'm guessing that this isn't true for eq.

[spatel]

lib/Transforms/InstCombine/InstCombineCompares.cpp

1953

Except that Cmp.isEquality() has nothing to do with ICMP_UGE:

static bool isEquality(Predicate P) {
  return P == ICMP_EQ || P == ICMP_NE;
}

I'll take this as a suggestion to improve readability by spelling out the relevant predicates instead of using isEquality, but there is no functional change.

[bryant]

lib/Transforms/InstCombine/InstCombineCompares.cpp

1953

It doesn't work with uge because it doesn't work with eq. Line 1942 would allow the transform to happen if Pred == ICmpInst::ICMP_EQ, right? Am I mis-reading?

[spatel]

lib/Transforms/InstCombine/InstCombineCompares.cpp

1953

Sorry, I sent that reply too soon. I see now why there is confusion. You're correct (as Alive shows) that eq/ne don't work in general:

http://rise4fun.com/Alive/Yu

What's missing from the equation is the precondition / assertion that the shifted compare constant hasn't dropped any bits:
http://rise4fun.com/Alive/Ee

Known bits analysis should guarantee that cases like that are already folded to true/false, so there is no need for a compare. I'll add asserts to the patch. Makes sense?

[spatel]

Patch updated:
Add asserts for eq/ne compares (both for the existing NUW path and the NSW path that's being added here) to make it clear what the pre-conditions for these folds are.

[bryant]

I'm not seeing any test cases for nsw/nuw eq/ne. Should/Can they be added?

lib/Transforms/InstCombine/InstCombineCompares.cpp

1959

Can this branch be merged with ugt?

if (Cmp.isEquality() || Pred == ICMP_UGT) {
  assert(!Cmp.isEquality || C->lshr(*ShiftAmt).shl(*ShiftAmt) == *C &&
             "Compare known true or false was not folded");
  // do the transform
}

1974–1979

Should this go into its own patch?

[spatel]

In D28406#649696, @bryant wrote:

I'm not seeing any test cases for nsw/nuw eq/ne. Should/Can they be added?

This is why I started with a minimal patch. :)
This patch does not intend to change any functionality for the nuw path, so either those tests already exist or should be added separately. The removal of the trailing check for shl nuw + icmp eq/ne could have been part of r292260, so I can remove that separately if you think that's better. Ie, we're now handling all of the nuw transforms in the earlier block.

Tests that change with this patch and are commented with "Known bits analysis turns this into an equality predicate" are effectively tests of nsw+eq/ne, but I can add explicit checks.

lib/Transforms/InstCombine/InstCombineCompares.cpp

1959

It could, but I think this is easier to read, and I'd really prefer to leave refactoring for a follow-up if that seems worthwhile.

[spatel]

Patch updated:
Removed nuw distractions from this patch (rL292433, rL292440) and added extra tests for ne/eq (rL292441).

[bryant]

LGTM with just one nit.

lib/Transforms/InstCombine/InstCombineCompares.cpp

1915

shl nsw is also shifting out zeroes, no? It's ashr that shifts in sign bits.

[bryant]

lib/Transforms/InstCombine/InstCombineCompares.cpp

1915

What I mean is (also for the ugt summary): It's because shl shifts in zeroes that warrants this transform. In other words, in the un-transformed icmp, we're comparing against known zero bits introduced by the shl.

[spatel]

lib/Transforms/InstCombine/InstCombineCompares.cpp

1915

It's the nuw or nsw property of the shift that allows these transforms. Ie, any shift-left *shifts in* zeroes to the low bits. The fact that we've guaranteed *shifting out* sign-bits or zeroes from the high bits is what allows us to safely lshr/ashr the constant.

I'll try to make that clearer in the comment.

lib/Transforms/InstCombine/InstCombineCompares.cpp

Instruction *InstCombiner::foldICmpShlConstant(ICmpInst &Cmp,
   unsigned TypeBits = C->getBitWidth();
   if (ShiftAmt->uge(TypeBits))
     return nullptr;
 
   ICmpInst::Predicate Pred = Cmp.getPredicate();
   Value *X = Shl->getOperand(0);
   Type *ShType = Shl->getType();
 
+  // A 'shl nsw' is just shifting out sign bits, so adjust the compare constant
+  // and eliminate the shift.
+  if (Shl->hasNoSignedWrap()) {
+    if (Pred == ICmpInst::ICMP_SGT) {
+      // icmp Pred (shl nsw X, ShiftAmt), C --> icmp Pred X, (C >>s ShiftAmt)
+      APInt ShiftedC = C->ashr(*ShiftAmt);
+      return new ICmpInst(Pred, X, ConstantInt::get(ShType, ShiftedC));
+    }
+    if (Pred == ICmpInst::ICMP_EQ || Pred == ICmpInst::ICMP_NE) {
+      // This is the same code as the SGT case, but assert the pre-condition
+      // that is needed for this to work with equality predicates.
+      assert(C->ashr(*ShiftAmt).shl(*ShiftAmt) == *C &&
+             "Compare known true or false was not folded");
+      APInt ShiftedC = C->ashr(*ShiftAmt);
+      return new ICmpInst(Pred, X, ConstantInt::get(ShType, ShiftedC));
+    }
+    if (Pred == ICmpInst::ICMP_SLT) {
+      // SLE is the same as above, but SLE is canonicalized to SLT, so convert:
+      // (X << S) <=s C is equiv to X <=s (C >> S) for all C
+      // (X << S) <s (C + 1) is equiv to X <s (C >> S) + 1 if C <s SMAX
+      // (X << S) <s C is equiv to X <s ((C - 1) >> S) + 1 if C >s SMIN
+      assert(!C->isMinSignedValue() && "Unexpected icmp slt");
+      APInt ShiftedC = (*C - 1).ashr(*ShiftAmt) + 1;
+      return new ICmpInst(Pred, X, ConstantInt::get(ShType, ShiftedC));
+    }
     // If this is a signed comparison to 0 and the shift is sign preserving,
     // use the shift LHS operand instead; isSignTest may change 'Pred', so only
     // do that if we're sure to not continue on in this function.
-  if (Shl->hasNoSignedWrap() && isSignTest(Pred, *C))
+    if (isSignTest(Pred, *C))
       return new ICmpInst(Pred, X, Constant::getNullValue(ShType));
+  }
 
   // A 'shl nuw' is just shifting out zeros, so adjust the compare constant
   // and eliminate the shift.
   if (Shl->hasNoUnsignedWrap()) {
     if (Pred == ICmpInst::ICMP_UGT) {
       // icmp Pred (shl nuw X, ShiftAmt), C --> icmp Pred X, (C >>u ShiftAmt)
       APInt ShiftedC = C->lshr(*ShiftAmt);
       return new ICmpInst(Pred, X, ConstantInt::get(ShType, ShiftedC));
     }
     if (Pred == ICmpInst::ICMP_EQ || Pred == ICmpInst::ICMP_NE) {
       // This is the same code as the UGT case, but assert the pre-condition
       // that is needed for this to work with equality predicates.
       assert(C->lshr(*ShiftAmt).shl(*ShiftAmt) == *C &&
              "Compare known true or false was not folded");
       APInt ShiftedC = C->lshr(*ShiftAmt);
       return new ICmpInst(Pred, X, ConstantInt::get(ShType, ShiftedC));
     }
     if (Pred == ICmpInst::ICMP_ULT) {
       // ULE is the same as above, but ULE is canonicalized to ULT, so convert:
       // (X << S) <=u C is equiv to X <=u (C >> S) for all C
       // (X << S) <u (C + 1) is equiv to X <u (C >> S) + 1 if C <u ~0u
       // (X << S) <u C is equiv to X <u ((C - 1) >> S) + 1 if C >u 0
       assert(C->ugt(0) && "ult 0 should have been eliminated");
       APInt ShiftedC = (*C - 1).lshr(*ShiftAmt) + 1;
       return new ICmpInst(Pred, X, ConstantInt::get(ShType, ShiftedC));
     }
   }
 
-  if (Cmp.isEquality()) {
-    Constant *LShrC = ConstantInt::get(ShType, C->lshr(*ShiftAmt));
-
-    // If the shift is NSW and we compare to 0, then it is just shifting out
-    // sign bits, no need for an AND either.
-    if (Shl->hasNoSignedWrap() && *C == 0)
-      return new ICmpInst(Pred, X, LShrC);
-
-    if (Shl->hasOneUse()) {
-      // Otherwise, strength-reduce the shift into an 'and'.
-      Constant *Mask = ConstantInt::get(
-          ShType,
-          APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt->getZExtValue()));
-
-      Value *And = Builder->CreateAnd(X, Mask, Shl->getName() + ".mask");
-      return new ICmpInst(Pred, And, LShrC);
-    }
-  }
+  if (Cmp.isEquality() && Shl->hasOneUse()) {
+    // Strength-reduce the shift into an 'and'.
+    Constant *LShrC = ConstantInt::get(ShType, C->lshr(*ShiftAmt));
 
   // Otherwise, if this is a comparison of the sign bit, simplify to and/test.
   bool TrueIfSigned = false;
   if (Shl->hasOneUse() && isSignBitCheck(Pred, *C, TrueIfSigned)) {
     // (X << 31) <s 0  --> (X & 1) != 0
     Constant *Mask = ConstantInt::get(
         ShType,
         APInt::getOneBitSet(TypeBits, TypeBits - ShiftAmt->getZExtValue() - 1));

test/Transforms/InstCombine/icmp-shl-nsw.ll

 
 ; icmp sgt with shl nsw with a constant compare operand and constant
 ; shift amount can always be reduced to icmp sgt alone.
 
 ; Known bits analysis turns this into an equality predicate.
 
 define i1 @icmp_sgt1(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt1(
-; CHECK-NEXT:    [[SHL_MASK:%.*]] = and i8 %x, 127
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 [[SHL_MASK]], 64
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 %x, -64
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sgt i8 %shl, -128
   ret i1 %cmp
 }
 
 define i1 @icmp_sgt2(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt2(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[SHL]], -127
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 %x, -64
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sgt i8 %shl, -127
   ret i1 %cmp
 }
 
 define i1 @icmp_sgt3(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt3(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[SHL]], -16
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 %x, -8
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sgt i8 %shl, -16
   ret i1 %cmp
 }
 
 define i1 @icmp_sgt4(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt4(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[SHL]], -2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 %x, -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sgt i8 %shl, -2
   ret i1 %cmp
 }
 
 ; x >s -1 is a sign bit test.
 ; x >s 0 is a sign bit test.
 
 define i1 @icmp_sgt5(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt5(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[SHL]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 %x, 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sgt i8 %shl, 1
   ret i1 %cmp
 }
 
 define i1 @icmp_sgt6(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt6(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[SHL]], 16
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 %x, 8
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sgt i8 %shl, 16
   ret i1 %cmp
 }
 
 define i1 @icmp_sgt7(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt7(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[SHL]], 124
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 %x, 62
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sgt i8 %shl, 124
   ret i1 %cmp
 }
 
 ; Known bits analysis turns this into an equality predicate.
 
 define i1 @icmp_sgt8(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt8(
-; CHECK-NEXT:    [[SHL_MASK:%.*]] = and i8 %x, 127
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[SHL_MASK]], 63
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 %x, 63
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sgt i8 %shl, 125
   ret i1 %cmp
 }
 
 ; Compares with 126 and 127 are recognized as always false.
 
 ; Known bits analysis turns this into an equality predicate.
 
 define i1 @icmp_sgt9(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt9(
-; CHECK-NEXT:    [[SHL_MASK:%.*]] = and i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[SHL_MASK]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 %x, -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 7
   %cmp = icmp sgt i8 %shl, -128
   ret i1 %cmp
 }
 
 define i1 @icmp_sgt10(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt10(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 7
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[SHL]], -127
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 %x, -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 7
   %cmp = icmp sgt i8 %shl, -127
   ret i1 %cmp
 }
 
 define i1 @icmp_sgt11(i8 %x) {
 ; CHECK-LABEL: @icmp_sgt11(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 7
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[SHL]], -2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 %x, -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 7
   %cmp = icmp sgt i8 %shl, -2
   ret i1 %cmp
 }
 
 ; Splat vector version should fold the same way.
 
 define <2 x i1> @icmp_sgt11_vec(<2 x i8> %x) {
 ; CHECK-LABEL: @icmp_sgt11_vec(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw <2 x i8> %x, <i8 7, i8 7>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i8> [[SHL]], <i8 -2, i8 -2>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i8> %x, <i8 -1, i8 -1>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %shl = shl nsw <2 x i8> %x, <i8 7, i8 7>
   %cmp = icmp sgt <2 x i8> %shl, <i8 -2, i8 -2>
   ret <2 x i1> %cmp
 }
 
 ; Known bits analysis returns false for compares with >=0.
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;
 ; Repeat the shl nsw + sgt tests with predicate changed to 'sle'.
 ;
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 ; Known bits analysis turns this into an equality predicate.
 
 define i1 @icmp_sle1(i8 %x) {
 ; CHECK-LABEL: @icmp_sle1(
-; CHECK-NEXT:    [[SHL_MASK:%.*]] = and i8 %x, 127
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[SHL_MASK]], 64
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 %x, -64
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sle i8 %shl, -128
   ret i1 %cmp
 }
 
 define i1 @icmp_sle2(i8 %x) {
 ; CHECK-LABEL: @icmp_sle2(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SHL]], -126
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 %x, -63
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sle i8 %shl, -127
   ret i1 %cmp
 }
 
 define i1 @icmp_sle3(i8 %x) {
 ; CHECK-LABEL: @icmp_sle3(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SHL]], -15
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 %x, -7
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sle i8 %shl, -16
   ret i1 %cmp
 }
 
 define i1 @icmp_sle4(i8 %x) {
 ; CHECK-LABEL: @icmp_sle4(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SHL]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 %x, 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sle i8 %shl, -2
   ret i1 %cmp
 }
 
 ; x <=s -1 is a sign bit test.
 ; x <=s 0 is a sign bit test.
 
 define i1 @icmp_sle5(i8 %x) {
 ; CHECK-LABEL: @icmp_sle5(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SHL]], 2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 %x, 1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sle i8 %shl, 1
   ret i1 %cmp
 }
 
 define i1 @icmp_sle6(i8 %x) {
 ; CHECK-LABEL: @icmp_sle6(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SHL]], 17
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 %x, 9
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sle i8 %shl, 16
   ret i1 %cmp
 }
 
 define i1 @icmp_sle7(i8 %x) {
 ; CHECK-LABEL: @icmp_sle7(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SHL]], 125
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 %x, 63
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sle i8 %shl, 124
   ret i1 %cmp
 }
 
 ; Known bits analysis turns this into an equality predicate.
 
 define i1 @icmp_sle8(i8 %x) {
 ; CHECK-LABEL: @icmp_sle8(
-; CHECK-NEXT:    [[SHL_MASK:%.*]] = and i8 %x, 127
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 [[SHL_MASK]], 63
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 %x, 63
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp sle i8 %shl, 125
   ret i1 %cmp
 }
 
 ; Compares with 126 and 127 are recognized as always true.
 
 ; Known bits analysis turns this into an equality predicate.
 
 define i1 @icmp_sle9(i8 %x) {
 ; CHECK-LABEL: @icmp_sle9(
-; CHECK-NEXT:    [[SHL_MASK:%.*]] = and i8 %x, 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 [[SHL_MASK]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 %x, -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 7
   %cmp = icmp sle i8 %shl, -128
   ret i1 %cmp
 }
 
 define i1 @icmp_sle10(i8 %x) {
 ; CHECK-LABEL: @icmp_sle10(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 7
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SHL]], -126
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 %x, 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 7
   %cmp = icmp sle i8 %shl, -127
   ret i1 %cmp
 }
 
 define i1 @icmp_sle11(i8 %x) {
 ; CHECK-LABEL: @icmp_sle11(
-; CHECK-NEXT:    [[SHL:%.*]] = shl nsw i8 %x, 7
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SHL]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 %x, 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 7
   %cmp = icmp sle i8 %shl, -2
   ret i1 %cmp
 }
 
 ; Some of the earlier sgt/sle tests are transformed to eq/ne, but try a couple
 ; of those explicitly, so we know no intermediate transforms are necessary.
 
 define i1 @icmp_eq1(i8 %x) {
 ; CHECK-LABEL: @icmp_eq1(
-; CHECK-NEXT:    [[SHL_MASK:%.*]] = and i8 %x, 127
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[SHL_MASK]], 6
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 %x, 6
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 1
   %cmp = icmp eq i8 %shl, 12
   ret i1 %cmp
 }
 
 define i1 @icmp_ne1(i8 %x) {
 ; CHECK-LABEL: @icmp_ne1(
-; CHECK-NEXT:    [[SHL_MASK:%.*]] = and i8 %x, 3
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 [[SHL_MASK]], 2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 %x, -2
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %shl = shl nsw i8 %x, 6
   %cmp = icmp ne i8 %shl, -128
   ret i1 %cmp
 }