Add bound violation handling for Intel(R) Memory Protection Extensions (Intel(R) MPX)

[valentinagiusti]

Summary

This patch adds support for handling the SIGSEGV signal with 'si_code ==
SEGV_BNDERR', which is thrown when a bound violation is caught by the
Intel(R) MPX technology.

Signed-off-by: Valentina Giusti <[e-mail]>

[labath]

lgtm.

At one point I'd like to change this code to not transfer the "crash reason" as string, but in a more structured way (i.e., qXfer:siginfo:read packet), but that is certainly out of scope of this patch.

[valentinagiusti]

used llvm:raw_string_ostream instead of std::stringstream

[zturner]

source/Plugins/Process/POSIX/CrashReason.cpp

38 ↗

(On Diff #73811)

Actually I'm not sure this is correct. Since you initialize the stream with str, as soon as you call stream.str() it will flush everything to the underlying string. Now str will contain the full formatted data. Then you will call str += str and have a second copy of it.

I think you should just write stream.flush();

Can you check whether this works?

[valentinagiusti]

fixed usage of llvm:raw_string_ostream

lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_xtended_registers/mpx_bound_violation/Makefile

+LEVEL = ../../../../make
+
+CXX_SOURCES := main.cpp
+
+CFLAGS_EXTRAS += -mmpx -fcheck-pointer-bounds -fuse-ld=bfd
+
+include $(LEVEL)/Makefile.rules

lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_xtended_registers/mpx_bound_violation/TestBoundViolation.py

+"""
+Test the Intel(R) MPX bound violation signal.
+"""
+
+from __future__ import print_function
+
+
+import os
+import sys
+import time
+import re
+import lldb
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+
+class RegisterCommandsTestCase(TestBase):
+
+    mydir = TestBase.compute_mydir(__file__)
+
+    @skipIf(compiler="clang")
+    @skipIf(oslist=no_match(['linux']))
+    @skipIf(archs=no_match(['i386', 'x86_64']))
+    @skipIf(oslist=["linux"], compiler="gcc", compiler_version=["<", "5"]) #GCC version >= 5 supports Intel(R) MPX.
+    def test_mpx_boundary_violation(self):
+        """Test Intel(R) MPX bound violation signal."""
+        self.build()
+        self.mpx_boundary_violation()
+
+    def mpx_boundary_violation(self):
+        exe = os.path.join(os.getcwd(), "a.out")
+        self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+        self.runCmd("run", RUN_SUCCEEDED)
+
+        target = self.dbg.GetSelectedTarget()
+        process = target.GetProcess()
+
+        if (process.GetState() == lldb.eStateExited):
+            self.skipTest("Intel(R) MPX is not supported.")
+
+        if (process.GetState() == lldb.eStateStopped):
+            self.expect("thread backtrace", STOPPED_DUE_TO_SIGNAL,
+                        substrs = ['stop reason = signal SIGSEGV: upper bound violation',
+                                   'fault address:', 'lower bound:', 'upper bound:'])
+
+        self.runCmd("continue")
+
+        if (process.GetState() == lldb.eStateStopped):
+            self.expect("thread backtrace", STOPPED_DUE_TO_SIGNAL,
+                        substrs = ['stop reason = signal SIGSEGV: lower bound violation',
+                                   'fault address:', 'lower bound:', 'upper bound:'])
+
+        self.runCmd("continue")
+        self.assertTrue(process.GetState() == lldb.eStateExited,
+                        PROCESS_EXITED)

lldb/trunk/packages/Python/lldbsuite/test/functionalities/register/intel_xtended_registers/mpx_bound_violation/main.cpp

+//===-- main.cpp ------------------------------------------------*- C++ -*-===//
+////
+////                     The LLVM Compiler Infrastructure
+////
+//// This file is distributed under the University of Illinois Open Source
+//// License. See LICENSE.TXT for details.
+////
+////===----------------------------------------------------------------------===//
+//
+
+#include <cstddef>
+#include <sys/prctl.h>
+
+static void violate_upper_bound(int *ptr, int size)
+{
+  int i;
+  i = *(ptr + size);
+}
+
+static void violate_lower_bound (int *ptr, int size)
+{
+  int i;
+  i = *(ptr - size);
+}
+
+int
+main(int argc, char const *argv[])
+{
+  unsigned int rax, rbx, rcx, rdx;
+  int array[5];
+
+  // This call returns 0 only if the CPU and the kernel support Intel(R) MPX.
+  if (prctl(PR_MPX_ENABLE_MANAGEMENT, 0, 0, 0, 0) != 0)
+    return -1;
+
+  violate_upper_bound(array, 5);
+  violate_lower_bound(array, 5);
+
+  return 0;
+}

lldb/trunk/source/Plugins/Process/Linux/NativeThreadLinux.cpp

if (info) {
     case SIGFPE:
     case SIGILL:
       // In case of MIPS64 target, SI_KERNEL is generated for invalid 64bit
       // address.
       const auto reason =
           (info->si_signo == SIGBUS && info->si_code == SI_KERNEL)
               ? CrashReason::eInvalidAddress
               : GetCrashReason(*info);
-      m_stop_description = GetCrashReasonString(
-          reason, reinterpret_cast<uintptr_t>(info->si_addr));
+      m_stop_description = GetCrashReasonString(reason, *info);
       break;
     }
   }
 }
 
 bool NativeThreadLinux::IsStopped(int *signo) {
   if (!StateIsStoppedState(m_state, false))
     return false;

lldb/trunk/source/Plugins/Process/POSIX/CrashReason.h

 #include <string>
 
 enum class CrashReason {
   eInvalidCrashReason,
 
   // SIGSEGV crash reasons.
   eInvalidAddress,
   ePrivilegedAddress,
+  eBoundViolation,
 
   // SIGILL crash reasons.
   eIllegalOpcode,
   eIllegalOperand,
   eIllegalAddressingMode,
   eIllegalTrap,
   ePrivilegedOpcode,
   ePrivilegedRegister,
enum class CrashReason {
   eFloatDivideByZero,
   eFloatOverflow,
   eFloatUnderflow,
   eFloatInexactResult,
   eFloatInvalidOperation,
   eFloatSubscriptRange
 };
 
-std::string GetCrashReasonString(CrashReason reason, lldb::addr_t fault_addr);
+std::string GetCrashReasonString(CrashReason reason, const siginfo_t &info);
 
 const char *CrashReasonAsString(CrashReason reason);
 
 CrashReason GetCrashReason(const siginfo_t &info);
 
 #endif // #ifndef liblldb_CrashReason_H_

lldb/trunk/source/Plugins/Process/POSIX/CrashReason.cpp

 //===-- CrashReason.cpp -----------------------------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #include "CrashReason.h"
 
+#include "llvm/Support/raw_ostream.h"
+
 #include <sstream>
 
 namespace {
 
 void AppendFaultAddr(std::string &str, lldb::addr_t addr) {
   std::stringstream ss;
   ss << " (fault address: 0x" << std::hex << addr << ")";
   str += ss.str();
 }
 
+void AppendBounds(std::string &str, lldb::addr_t lower_bound,
+                  lldb::addr_t upper_bound, lldb::addr_t addr) {
+  llvm::raw_string_ostream stream(str);
+  if ((unsigned long)addr < lower_bound)
+    stream << ": lower bound violation ";
+  else
+    stream << ": upper bound violation ";
+  stream << "(fault address: 0x";
+  stream.write_hex(addr);
+  stream << ", lower bound: 0x";
+  stream.write_hex(lower_bound);
+  stream << ", upper bound: 0x";
+  stream.write_hex(upper_bound);
+  stream << ")";
+  stream.flush();
+}
+
 CrashReason GetCrashReasonForSIGSEGV(const siginfo_t &info) {
   assert(info.si_signo == SIGSEGV);
 
   switch (info.si_code) {
 #ifdef SI_KERNEL
   case SI_KERNEL:
     // Some platforms will occasionally send nonstandard spurious SI_KERNEL
     // codes.
     // One way to get this is via unaligned SIMD loads.
     return CrashReason::eInvalidAddress; // for lack of anything better
 #endif
   case SEGV_MAPERR:
     return CrashReason::eInvalidAddress;
   case SEGV_ACCERR:
     return CrashReason::ePrivilegedAddress;
+#ifndef SEGV_BNDERR
+#define SEGV_BNDERR 3
+#endif
+  case SEGV_BNDERR:
+    return CrashReason::eBoundViolation;
   }
 
   assert(false && "unexpected si_code for SIGSEGV");
   return CrashReason::eInvalidCrashReason;
 }
 
 CrashReason GetCrashReasonForSIGILL(const siginfo_t &info) {
   assert(info.si_signo == SIGILL);
case BUS_OBJERR:
     return CrashReason::eHardwareError;
   }
 
   assert(false && "unexpected si_code for SIGBUS");
   return CrashReason::eInvalidCrashReason;
 }
 }
 
-std::string GetCrashReasonString(CrashReason reason, lldb::addr_t fault_addr) {
+std::string GetCrashReasonString(CrashReason reason, const siginfo_t &info) {
   std::string str;
 
   switch (reason) {
   default:
     assert(false && "invalid CrashReason");
     break;
 
   case CrashReason::eInvalidAddress:
     str = "signal SIGSEGV: invalid address";
-    AppendFaultAddr(str, fault_addr);
+    AppendFaultAddr(str, reinterpret_cast<lldb::addr_t>(info.si_addr));
     break;
   case CrashReason::ePrivilegedAddress:
     str = "signal SIGSEGV: address access protected";
-    AppendFaultAddr(str, fault_addr);
+    AppendFaultAddr(str, reinterpret_cast<lldb::addr_t>(info.si_addr));
+    break;
+  case CrashReason::eBoundViolation:
+    str = "signal SIGSEGV";
+// Make sure that siginfo_t has the bound fields available.
+#if defined(si_lower) && defined(si_upper)
+    AppendBounds(str, reinterpret_cast<lldb::addr_t>(info.si_lower),
+                     reinterpret_cast<lldb::addr_t>(info.si_upper),
+                     reinterpret_cast<lldb::addr_t>(info.si_addr));
+#endif
     break;
   case CrashReason::eIllegalOpcode:
     str = "signal SIGILL: illegal instruction";
     break;
   case CrashReason::eIllegalOperand:
     str = "signal SIGILL: illegal instruction operand";
     break;
   case CrashReason::eIllegalAddressingMode:
#else
 
   // SIGSEGV crash reasons.
   case CrashReason::eInvalidAddress:
     str = "eInvalidAddress";
     break;
   case CrashReason::ePrivilegedAddress:
     str = "ePrivilegedAddress";
     break;
+  case CrashReason::eBoundViolation:
+    str = "eBoundViolation";
+    break;
 
   // SIGILL crash reasons.
   case CrashReason::eIllegalOpcode:
     str = "eIllegalOpcode";
     break;
   case CrashReason::eIllegalOperand:
     str = "eIllegalOperand";
     break;