Don't randomly encode %rip where illegal

[dougk]

handle Intel syntax also

[niravd]

The patch is missing the intel syntax tests cases. Otherwise LGTM.

[dougk]

test Intel syntax

lib/Target/X86/AsmParser/X86AsmParser.cpp

case AsmToken::Percent: {
     unsigned RegNo;
     SMLoc Start, End;
     if (ParseRegister(RegNo, Start, End)) return nullptr;
     if (RegNo == X86::EIZ || RegNo == X86::RIZ) {
       Error(Start, "%eiz and %riz can only be used as index registers",
             SMRange(Start, End));
       return nullptr;
     }
+    if (RegNo == X86::RIP) {
+      Error(Start, "%rip can only be used as a base register",
+            SMRange(Start, End));
+      return nullptr;
+    }
 
     // If this is a segment register followed by a ':', then this is the start
     // of a memory reference, otherwise this is a normal register reference.
     if (getLexer().isNot(AsmToken::Colon))
       return X86Operand::CreateReg(RegNo, Start, End);
 
     if (!X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(RegNo))
       return ErrorOperand(Start, "invalid segment register");
if (getLexer().is(AsmToken::Comma)) {
     // value. We don't support the later form, but we want to parse it
     // correctly.
     //
     // Not that even though it would be completely consistent to support syntax
     // like "1(%eax,,1)", the assembler doesn't. Use "eiz" or "riz" for this.
     if (getLexer().is(AsmToken::Percent)) {
       SMLoc L;
       if (ParseRegister(IndexReg, L, L)) return nullptr;
+      if (BaseReg == X86::RIP) {
+        Error(IndexLoc, "%rip as base register can not have an index register");
+        return nullptr;
+      }
+      if (IndexReg == X86::RIP) {
+        Error(IndexLoc, "%rip is not allowed as an index register");
+        return nullptr;
+      }
 
       if (getLexer().isNot(AsmToken::RParen)) {
         // Parse the scale amount:
         //  ::= ',' [scale-expression]
         if (getLexer().isNot(AsmToken::Comma)) {
           Error(Parser.getTok().getLoc(),
                 "expected comma in scale expression");
           return nullptr;

test/MC/X86/x86_errors.s

 // 64: error: instruction requires: Not 64-bit mode
 jcxz 1
 
 // 32: error: register %cr8 is only available in 64-bit mode
 movl %edx, %cr8
 
 // 32: error: register %dr8 is only available in 64-bit mode
 movl %edx, %dr8
+
+// 32: error: register %rip is only available in 64-bit mode
+// 64: error: %rip can only be used as a base register
+mov %rip, %rax
+
+// 32: error: register %rax is only available in 64-bit mode
+// 64: error: %rip is not allowed as an index register
+mov (%rax,%rip), %rbx