Use Intel CPU flags to determine target supported features.

[valentinagiusti]

Summary

This patch uses the instruction CPUID to verify that FXSAVE, XSAVE, AVX
and MPX are supported by the target hardware. In case the HW supports XSAVE,
and at least one of the extended register sets, it further checks if the
target software has the kernel support for such features, by verifying that
their XSAVE part is correctly managed.

[labath]

I have to admit I have very little knowledge of this part of the code. Could you provide a bit of a high-level overview of this change? Does this fix an existing problem ? (If so, should it have a test?) Or is it just a refactor?

source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

12

Please include the system header last.

187

I like the short names, but let's make this an enum class, so the names don't leak into the global namespace.

[valentinagiusti]

This fixes the fact that there is no proper check that the kernel or the hardware are actually supporting either AVX or MPX. Before this patch, the code only relied on a "hack" that checks if it's possible to do a ptrace to retrieve the XSAVE or FXSAVE areas: the assumption was that if XSAVE is there, then there must be also AVX and MPX, which obviously is not the correct thing to do.
The 'cpuid' calls (wrappers for the CPUID instruction) get the info directly from the hardware, and then the ptrace call is made to actually get either FXSAVE or XSAVE. If XSAVE is there, then 'cpuid' is used again to check the hardware for AVX and MPX, and then if this step is also successful, the XSAVE memory region is further checked to verify that the kernel is properly handling these features.
Basically it's both a refactoring and a fix, and it doesn't require a dedicated test: the fact that the current register tests succeed is proof enough.

[valentinagiusti]

moved header to the bottom and moved enum into header file

source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.h

protected:
   size_t GetFPRSize() override;
 
   Error ReadFPR() override;
 
   Error WriteFPR() override;
 
 private:
   // Private member types.
-  enum FPRType { eFPRTypeNotValid = 0, eFPRTypeFXSAVE, eFPRTypeXSAVE };
+  enum XStateType { eXStateTypeNotValid = 0, eXStateTypeFXSAVE, eXStateTypeXSAVE };
+  enum RegSet { gpr, fpu, avx, mpx };
 
   // Info about register ranges.
   struct RegInfo {
     uint32_t num_registers;
     uint32_t num_gpr_registers;
     uint32_t num_fpr_registers;
     uint32_t num_avx_registers;
     uint32_t num_mpx_registers;
struct RegInfo {
     uint32_t last_mpxr;
     uint32_t first_mpxc;
     uint32_t last_mpxc;
     uint32_t first_dr;
     uint32_t gpr_flags;
   };
 
   // Private member variables.
-  mutable FPRType m_fpr_type;
-  FPR m_fpr;
+  mutable XStateType m_xstate_type;
+  FPR m_fpr; // Extended States Area, named FPR for historical reasons.
   IOVEC m_iovec;
   YMM m_ymm_set;
   MPX m_mpx_set;
   RegInfo m_reg_info;
   uint64_t m_gpr_x86_64[k_num_gpr_registers_x86_64];
   uint32_t m_fctrl_offset_in_userarea;
 
   // Private member methods.
+  bool HasFXSAVE() const;
+
+  bool HasXSAVE() const;
+
+  bool IsCPUFeatureAvailable(RegSet feature_code) const;
+
   bool IsRegisterSetAvailable(uint32_t set_index) const;
 
   bool IsGPR(uint32_t reg_index) const;
 
-  FPRType GetFPRType() const;
+  XStateType GetXStateType() const;
 
   bool IsFPR(uint32_t reg_index) const;
 
-  bool IsFPR(uint32_t reg_index, FPRType fpr_type) const;
-
   bool CopyXSTATEtoYMM(uint32_t reg_index, lldb::ByteOrder byte_order);
 
   bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order);
 
   bool IsAVX(uint32_t reg_index) const;
 
   bool CopyXSTATEtoMPX(uint32_t reg);
 

source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

 //===-- NativeRegisterContextLinux_x86_64.cpp ---------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #if defined(__i386__) || defined(__x86_64__)
 
 #include "NativeRegisterContextLinux_x86_64.h"
 
 #include "lldb/Core/DataBufferHeap.h"
 #include "lldb/Core/Error.h"
 #include "lldb/Core/Log.h"
 #include "lldb/Core/RegisterValue.h"
 #include "lldb/Host/HostInfo.h"
 
 #include "Plugins/Process/Utility/RegisterContextLinux_i386.h"
 #include "Plugins/Process/Utility/RegisterContextLinux_x86_64.h"
 
+#include <cpuid.h>
+
 using namespace lldb_private;
 using namespace lldb_private::process_linux;
 
 // ----------------------------------------------------------------------------
 // Private namespace.
 // ----------------------------------------------------------------------------
 
 namespace {
static_assert((sizeof(g_mpx_regnums_x86_64) / sizeof(g_mpx_regnums_x86_64[0])) -
                       1 ==
                   k_num_mpx_registers_x86_64,
               "g_mpx_regnums_x86_64 has wrong number of register infos");
 
 // Number of register sets provided by this context.
 enum { k_num_extended_register_sets = 2, k_num_register_sets = 4 };
 
 // Register sets for x86 32-bit.
 static const RegisterSet g_reg_sets_i386[k_num_register_sets] = {
     {"General Purpose Registers", "gpr", k_num_gpr_registers_i386,
      g_gpr_regnums_i386},
     {"Floating Point Registers", "fpu", k_num_fpr_registers_i386,
      g_fpu_regnums_i386},
     {"Advanced Vector Extensions", "avx", k_num_avx_registers_i386,
      g_avx_regnums_i386},
     { "Memory Protection Extensions", "mpx", k_num_mpx_registers_i386,
      g_mpx_regnums_i386}};

 // Support ptrace extensions even when compiled without required kernel support
 #ifndef NT_X86_XSTATE
 #define NT_X86_XSTATE 0x202
 #endif
 #ifndef NT_PRXFPREG
 #define NT_PRXFPREG 0x46e62b7f
 #endif
 
+// ----------------------------------------------------------------------------
+// Required MPX define.
+// ----------------------------------------------------------------------------
+
+// Support MPX extensions also if compiled with compiler without MPX support.
+#ifndef bit_MPX
+#define bit_MPX 0x4000
+#endif
+
+// ----------------------------------------------------------------------------
+// XCR0 extended register sets masks.
+// ----------------------------------------------------------------------------
+#define mask_XSTATE_AVX (1ULL << 2)
+#define mask_XSTATE_BNDREGS (1ULL << 3)
+#define mask_XSTATE_BNDCFG (1ULL << 4)
+#define mask_XSTATE_MPX (mask_XSTATE_BNDREGS | mask_XSTATE_BNDCFG)
+
 NativeRegisterContextLinux *
 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread,
     uint32_t concrete_frame_idx) {
   return new NativeRegisterContextLinux_x86_64(target_arch, native_thread,
                                                concrete_frame_idx);
 }
 
CreateRegisterInfoInterface(const ArchSpec &target_arch) {
   }
 }
 
 NativeRegisterContextLinux_x86_64::NativeRegisterContextLinux_x86_64(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread,
     uint32_t concrete_frame_idx)
     : NativeRegisterContextLinux(native_thread, concrete_frame_idx,
                                  CreateRegisterInfoInterface(target_arch)),
-      m_fpr_type(eFPRTypeNotValid), m_fpr(), m_iovec(), m_ymm_set(),
+      m_xstate_type(eXStateTypeNotValid), m_fpr(), m_iovec(), m_ymm_set(),
       m_mpx_set(), m_reg_info(), m_gpr_x86_64() {
   // Set up data about ranges of valid registers.
   switch (target_arch.GetMachine()) {
   case llvm::Triple::x86:
     m_reg_info.num_registers = k_num_registers_i386;
     m_reg_info.num_gpr_registers = k_num_gpr_registers_i386;
     m_reg_info.num_fpr_registers = k_num_fpr_registers_i386;
     m_reg_info.num_avx_registers = k_num_avx_registers_i386;
if (reg == LLDB_INVALID_REGNUM) {
     // This is likely an internal register for lldb use only and should not be
     // directly queried.
     error.SetErrorStringWithFormat("register \"%s\" is an internal-only lldb "
                                    "register, cannot read directly",
                                    reg_info->name);
     return error;
   }
 
-  if (IsFPR(reg, GetFPRType())) {
+  if (IsFPR(reg) || IsAVX(reg) || IsMPX(reg)) {
     error = ReadFPR();
     if (error.Fail())
       return error;
   } else {
     uint32_t full_reg = reg;
     bool is_subreg = reg_info->invalidate_regs &&
                      (reg_info->invalidate_regs[0] != LLDB_INVALID_REGNUM);
 
if (byte_order != lldb::eByteOrderInvalid) {
             m_fpr.xstate.fxsave.stmm[reg - m_reg_info.first_mm].bytes,
             reg_info->byte_size, byte_order);
       if (reg >= m_reg_info.first_xmm && reg <= m_reg_info.last_xmm)
         reg_value.SetBytes(
             m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_xmm].bytes,
             reg_info->byte_size, byte_order);
       if (reg >= m_reg_info.first_ymm && reg <= m_reg_info.last_ymm) {
         // Concatenate ymm using the register halves in xmm.bytes and ymmh.bytes
-        if (GetFPRType() == eFPRTypeXSAVE && CopyXSTATEtoYMM(reg, byte_order))
+        if (CopyXSTATEtoYMM(reg, byte_order))
           reg_value.SetBytes(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
                              reg_info->byte_size, byte_order);
         else {
           error.SetErrorString("failed to copy ymm register value");
           return error;
         }
       }
       if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
-        if (GetFPRType() == eFPRTypeXSAVE && CopyXSTATEtoMPX(reg))
+        if (CopyXSTATEtoMPX(reg))
           reg_value.SetBytes(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes,
                              reg_info->byte_size, byte_order);
         else {
           error.SetErrorString("failed to copy mpx register value");
           return error;
         }
       }
       if (reg >= m_reg_info.first_mpxc && reg <= m_reg_info.last_mpxc) {
-        if (GetFPRType() == eFPRTypeXSAVE && CopyXSTATEtoMPX(reg))
+        if (CopyXSTATEtoMPX(reg))
           reg_value.SetBytes(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes,
                              reg_info->byte_size, byte_order);
         else {
           error.SetErrorString("failed to copy mpx register value");
           return error;
         }
       }
 
Error NativeRegisterContextLinux_x86_64::WriteRegister(
   if (reg_index == LLDB_INVALID_REGNUM)
     return Error("no lldb regnum for %s", reg_info && reg_info->name
                                               ? reg_info->name
                                               : "<unknown register>");
 
   if (IsGPR(reg_index))
     return WriteRegisterRaw(reg_index, reg_value);
 
-  if (IsFPR(reg_index, GetFPRType())) {
+  if (IsFPR(reg_index) || IsAVX(reg_index) || IsMPX(reg_index)) {
     if (reg_info->encoding == lldb::eEncodingVector) {
       if (reg_index >= m_reg_info.first_st && reg_index <= m_reg_info.last_st)
         ::memcpy(
             m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_st].bytes,
             reg_value.GetBytes(), reg_value.GetByteSize());
 
       if (reg_index >= m_reg_info.first_mm && reg_index <= m_reg_info.last_mm)
         ::memcpy(
             m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_mm].bytes,
             reg_value.GetBytes(), reg_value.GetByteSize());
 
       if (reg_index >= m_reg_info.first_xmm && reg_index <= m_reg_info.last_xmm)
         ::memcpy(
             m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_xmm].bytes,
             reg_value.GetBytes(), reg_value.GetByteSize());
 
       if (reg_index >= m_reg_info.first_ymm &&
           reg_index <= m_reg_info.last_ymm) {
-        if (GetFPRType() != eFPRTypeXSAVE)
-          return Error("target processor does not support AVX");
-
         // Store ymm register content, and split into the register halves in
         // xmm.bytes and ymmh.bytes
         ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes,
                  reg_value.GetBytes(), reg_value.GetByteSize());
         if (!CopyYMMtoXSTATE(reg_index, GetByteOrder()))
           return Error("CopyYMMtoXSTATE() failed");
       }
 
       if (reg_index >= m_reg_info.first_mpxr &&
           reg_index <= m_reg_info.last_mpxr) {
-        if (GetFPRType() != eFPRTypeXSAVE)
-          return Error("target processor does not support MPX");
-
         ::memcpy(m_mpx_set.mpxr[reg_index - m_reg_info.first_mpxr].bytes,
                  reg_value.GetBytes(), reg_value.GetByteSize());
         if (!CopyMPXtoXSTATE(reg_index))
           return Error("CopyMPXtoXSTATE() failed");
       }
 
       if (reg_index >= m_reg_info.first_mpxc &&
           reg_index <= m_reg_info.last_mpxc) {
-        if (GetFPRType() != eFPRTypeXSAVE)
-          return Error("target processor does not support MPX");
-
         ::memcpy(m_mpx_set.mpxc[reg_index - m_reg_info.first_mpxc].bytes,
                  reg_value.GetBytes(), reg_value.GetByteSize());
         if (!CopyMPXtoXSTATE(reg_index))
           return Error("CopyMPXtoXSTATE() failed");
       }
     } else {
       // Get pointer to m_fpr.xstate.fxsave variable and set the data to it.
 
if (dst == nullptr) {
     error.SetErrorStringWithFormat("DataBufferHeap instance of size %" PRIu64
                                    " returned a null pointer",
                                    REG_CONTEXT_SIZE);
     return error;
   }
 
   ::memcpy(dst, &m_gpr_x86_64, GetRegisterInfoInterface().GetGPRSize());
   dst += GetRegisterInfoInterface().GetGPRSize();
-  if (GetFPRType() == eFPRTypeFXSAVE)
+  if (GetXStateType() == eXStateTypeFXSAVE)
     ::memcpy(dst, &m_fpr.xstate.fxsave, sizeof(m_fpr.xstate.fxsave));
-  else if (GetFPRType() == eFPRTypeXSAVE) {
+  else if (GetXStateType() == eXStateTypeXSAVE) {
     lldb::ByteOrder byte_order = GetByteOrder();
 
+    if (IsCPUFeatureAvailable(avx)) {
       // Assemble the YMM register content from the register halves.
       for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm;
            ++reg) {
         if (!CopyXSTATEtoYMM(reg, byte_order)) {
-        error.SetErrorStringWithFormat("NativeRegisterContextLinux_x86_64::%s "
-                                       "CopyXSTATEtoYMM() failed for reg num "
-                                       "%" PRIu32,
-                                       __FUNCTION__, reg);
+          error.SetErrorStringWithFormat(
+              "NativeRegisterContextLinux_x86_64::%s "
           return error;
         }
       }
+    }
 
+    if (IsCPUFeatureAvailable(mpx)) {
       for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc;
            ++reg) {
         if (!CopyXSTATEtoMPX(reg)) {
-        error.SetErrorStringWithFormat("NativeRegisterContextLinux_x86_64::%s "
-                                       "CopyXSTATEtoMPX() failed for reg num "
-                                       "%" PRIu32,
-                                       __FUNCTION__, reg);
+          error.SetErrorStringWithFormat(
+              "NativeRegisterContextLinux_x86_64::%s "
           return error;
         }
       }
+    }
     // Copy the extended register state including the assembled ymm registers.
     ::memcpy(dst, &m_fpr, sizeof(m_fpr));
   } else {
     assert(false && "how do we save the floating point registers?");
     error.SetErrorString("unsure how to save the floating point registers");
   }
   /** The following code is specific to Linux x86 based architectures,
    *  where the register orig_eax (32 bit)/orig_rax (64 bit) is set to
Error NativeRegisterContextLinux_x86_64::WriteAllRegisterValues(
   }
   ::memcpy(&m_gpr_x86_64, src, GetRegisterInfoInterface().GetGPRSize());
 
   error = WriteGPR();
   if (error.Fail())
     return error;
 
   src += GetRegisterInfoInterface().GetGPRSize();
-  if (GetFPRType() == eFPRTypeFXSAVE)
+  if (GetXStateType() == eXStateTypeFXSAVE)
     ::memcpy(&m_fpr.xstate.fxsave, src, sizeof(m_fpr.xstate.fxsave));
-  else if (GetFPRType() == eFPRTypeXSAVE)
+  else if (GetXStateType() == eXStateTypeXSAVE)
     ::memcpy(&m_fpr.xstate.xsave, src, sizeof(m_fpr.xstate.xsave));
 
   error = WriteFPR();
   if (error.Fail())
     return error;
 
-  if (GetFPRType() == eFPRTypeXSAVE) {
+  if (GetXStateType() == eXStateTypeXSAVE) {
     lldb::ByteOrder byte_order = GetByteOrder();
 
+    if (IsCPUFeatureAvailable(avx)) {
       // Parse the YMM register content from the register halves.
       for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm;
            ++reg) {
         if (!CopyYMMtoXSTATE(reg, byte_order)) {
-        error.SetErrorStringWithFormat("NativeRegisterContextLinux_x86_64::%s "
-                                       "CopyYMMtoXSTATE() failed for reg num "
-                                       "%" PRIu32,
-                                       __FUNCTION__, reg);
+          error.SetErrorStringWithFormat(
+              "NativeRegisterContextLinux_x86_64::%s "
           return error;
         }
       }
+    }
 
+    if (IsCPUFeatureAvailable(mpx)) {
       for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc;
            ++reg) {
         if (!CopyMPXtoXSTATE(reg)) {
-        error.SetErrorStringWithFormat("NativeRegisterContextLinux_x86_64::%s "
-                                         "CopyMPXtoXSTATE() failed for reg num "
-                                         "%" PRIu32,
-                                         __FUNCTION__, reg);
+          error.SetErrorStringWithFormat(
+              "NativeRegisterContextLinux_x86_64::%s "
           return error;
         }
       }
     }
+  }
 
   return error;
 }
 
+bool NativeRegisterContextLinux_x86_64::HasFXSAVE() const {
+  unsigned int rax, rbx, rcx, rdx;
+
+  // Check if FXSAVE is enabled.
+  if (!__get_cpuid(1, &rax, &rbx, &rcx, &rdx))
+    return false;
+  if ((rdx & bit_FXSAVE) == bit_FXSAVE) {
+    m_xstate_type = eXStateTypeFXSAVE;
+    if (const_cast<NativeRegisterContextLinux_x86_64 *>(this)->ReadFPR().Fail())
+      return false;
+    return true;
+  }
+  return false;
+}
+
+bool NativeRegisterContextLinux_x86_64::HasXSAVE() const {
+  unsigned int rax, rbx, rcx, rdx;
+
+  // Check if XSAVE is enabled.
+  if (!__get_cpuid(1, &rax, &rbx, &rcx, &rdx))
+    return false;
+  if ((rcx & bit_OSXSAVE) == bit_OSXSAVE) {
+    m_xstate_type = eXStateTypeXSAVE;
+    if (const_cast<NativeRegisterContextLinux_x86_64 *>(this)->ReadFPR().Fail())
+      return false;
+    return true;
+  }
+  return false;
+}
+
+bool NativeRegisterContextLinux_x86_64::IsCPUFeatureAvailable(
+    RegSet feature_code) const {
+  unsigned int rax, rbx, rcx, rdx;
+
+  // Check if XSAVE is enabled.
+  if (!HasXSAVE())
+    return false;
+
+  __get_cpuid(1, &rax, &rbx, &rcx, &rdx);
+  switch (feature_code) {
+  case avx: // Check if CPU has AVX and if there is kernel support, by reading in the XCR0 area of XSAVE.
+    if (((rcx & bit_AVX) != 0) && ((m_fpr.xstate.xsave.i387.xcr0 & mask_XSTATE_AVX) == mask_XSTATE_AVX))
+      return true;
+  case mpx: // Check if CPU has MPX and if there is kernel support, by reading in the XCR0 area of XSAVE.
+    if (__get_cpuid_max(0, NULL) > 7) {
+      __cpuid_count(7, 0, rax, rbx, rcx, rdx);
+      if (((rbx & bit_MPX) != 0) && ((m_fpr.xstate.xsave.i387.xcr0 & mask_XSTATE_MPX) == mask_XSTATE_MPX))
+        return true;
+    }
+  default:
+    return false;
+  }
+}
+
 bool NativeRegisterContextLinux_x86_64::IsRegisterSetAvailable(
     uint32_t set_index) const {
-  // Note: Extended register sets are assumed to be at the end of g_reg_sets.
   uint32_t num_sets = k_num_register_sets - k_num_extended_register_sets;
 
-  if (GetFPRType() == eFPRTypeXSAVE) {
-    // AVX is the first extended register set.
-    num_sets += 2;
-  }
+  switch (set_index) {
+  case gpr:
+  case fpu:
     return (set_index < num_sets);
+  case avx:
+    return IsCPUFeatureAvailable(avx);
+  case mpx:
+    return IsCPUFeatureAvailable(mpx);
+  default:
+    return false;
+  }
 }
 
 bool NativeRegisterContextLinux_x86_64::IsGPR(uint32_t reg_index) const {
   // GPRs come first.
   return reg_index <= m_reg_info.last_gpr;
 }
 
-NativeRegisterContextLinux_x86_64::FPRType
-NativeRegisterContextLinux_x86_64::GetFPRType() const {
-  Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_PROCESS));
-  if (m_fpr_type == eFPRTypeNotValid) {
-    // TODO: Use assembly to call cpuid on the inferior and query ebx or ecx.
-
-    // Try and see if AVX register retrieval works.
-    m_fpr_type = eFPRTypeXSAVE;
-    if (const_cast<NativeRegisterContextLinux_x86_64 *>(this)
-            ->ReadFPR()
-            .Fail()) {
-      // Fall back to general floating point with no AVX support.
-      m_fpr_type = eFPRTypeFXSAVE;
-
-      // Check if FXSAVE area can be read.
-      if (const_cast<NativeRegisterContextLinux_x86_64 *>(this)
-              ->ReadFPR()
-              .Fail()) {
-        if (log)
-          log->Printf("NativeRegisterContextLinux_x86_64::%s ptrace APIs "
-                      "failed to read XSAVE/FXSAVE area",
-                      __FUNCTION__);
-      }
-    }
-  }
-  return m_fpr_type;
+NativeRegisterContextLinux_x86_64::XStateType
+NativeRegisterContextLinux_x86_64::GetXStateType() const {
+  if (m_xstate_type == eXStateTypeNotValid) {
+    if (HasXSAVE())
+      m_xstate_type = eXStateTypeXSAVE;
+    else if (HasFXSAVE())
+      m_xstate_type = eXStateTypeFXSAVE;
+  return m_xstate_type;
 }
 
 bool NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index) const {
   return (m_reg_info.first_fpr <= reg_index &&
           reg_index <= m_reg_info.last_fpr);
 }
 
-bool NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index,
-                                              FPRType fpr_type) const {
-  bool generic_fpr = IsFPR(reg_index);
-
-  if (fpr_type == eFPRTypeXSAVE)
-    return generic_fpr || IsAVX(reg_index) || IsMPX(reg_index);
-  return generic_fpr;
-}
-
 Error NativeRegisterContextLinux_x86_64::WriteFPR() {
-  const FPRType fpr_type = GetFPRType();
+  const XStateType fpr_type = GetXStateType();
   const lldb_private::ArchSpec &target_arch =
       GetRegisterInfoInterface().GetTargetArchitecture();
   switch (fpr_type) {
-  case FPRType::eFPRTypeFXSAVE:
+  case XStateType::eXStateTypeFXSAVE:
     // For 32-bit inferiors on x86_32/x86_64 architectures,
     // FXSAVE area can be written using PTRACE_SETREGSET ptrace api
     // For 64-bit inferiors on x86_64 architectures,
     // FXSAVE area can be written using PTRACE_SETFPREGS ptrace api
     switch (target_arch.GetMachine()) {
     case llvm::Triple::x86:
       return WriteRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave),
                               NT_PRXFPREG);
     case llvm::Triple::x86_64:
       return NativeRegisterContextLinux::WriteFPR();
     default:
       assert(false && "Unhandled target architecture.");
       break;
     }
-  case FPRType::eFPRTypeXSAVE:
+  case XStateType::eXStateTypeXSAVE:
     return WriteRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave),
                             NT_X86_XSTATE);
   default:
     return Error("Unrecognized FPR type");
   }
 }
 
 bool NativeRegisterContextLinux_x86_64::IsAVX(uint32_t reg_index) const {
+  if (!IsCPUFeatureAvailable(avx))
+    return false;
   return (m_reg_info.first_ymm <= reg_index &&
           reg_index <= m_reg_info.last_ymm);
 }
 
 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoYMM(
     uint32_t reg_index, lldb::ByteOrder byte_order) {
   if (!IsAVX(reg_index))
     return false;
if (byte_order == lldb::eByteOrderBig) {
     ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(YMMHReg));
     return true;
   }
   return false; // unsupported or invalid byte order
 }
 
 void *NativeRegisterContextLinux_x86_64::GetFPRBuffer() {
-  const FPRType fpr_type = GetFPRType();
-  switch (fpr_type) {
-  case FPRType::eFPRTypeFXSAVE:
+  const XStateType xstate_type = GetXStateType();
+  switch (xstate_type) {
+  case XStateType::eXStateTypeFXSAVE:
     return &m_fpr.xstate.fxsave;
-  case FPRType::eFPRTypeXSAVE:
+  case XStateType::eXStateTypeXSAVE:
     return &m_iovec;
   default:
     return nullptr;
   }
 }
 
 size_t NativeRegisterContextLinux_x86_64::GetFPRSize() {
-  const FPRType fpr_type = GetFPRType();
-  switch (fpr_type) {
-  case FPRType::eFPRTypeFXSAVE:
+  const XStateType xstate_type = GetXStateType();
+  switch (xstate_type) {
+  case XStateType::eXStateTypeFXSAVE:
     return sizeof(m_fpr.xstate.fxsave);
-  case FPRType::eFPRTypeXSAVE:
+  case XStateType::eXStateTypeXSAVE:
     return sizeof(m_iovec);
   default:
     return 0;
   }
 }
 
 Error NativeRegisterContextLinux_x86_64::ReadFPR() {
-  const FPRType fpr_type = GetFPRType();
+  const XStateType xstate_type = GetXStateType();
   const lldb_private::ArchSpec &target_arch =
       GetRegisterInfoInterface().GetTargetArchitecture();
-  switch (fpr_type) {
-  case FPRType::eFPRTypeFXSAVE:
+  switch (xstate_type) {
+  case XStateType::eXStateTypeFXSAVE:
     // For 32-bit inferiors on x86_32/x86_64 architectures,
     // FXSAVE area can be read using PTRACE_GETREGSET ptrace api
     // For 64-bit inferiors on x86_64 architectures,
     // FXSAVE area can be read using PTRACE_GETFPREGS ptrace api
     switch (target_arch.GetMachine()) {
     case llvm::Triple::x86:
       return ReadRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_PRXFPREG);
     case llvm::Triple::x86_64:
       return NativeRegisterContextLinux::ReadFPR();
     default:
       assert(false && "Unhandled target architecture.");
       break;
     }
-  case FPRType::eFPRTypeXSAVE:
+  case XStateType::eXStateTypeXSAVE:
     return ReadRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_X86_XSTATE);
   default:
     return Error("Unrecognized FPR type");
   }
 }
 
 bool NativeRegisterContextLinux_x86_64::IsMPX(uint32_t reg_index) const {
-    return (m_reg_info.first_mpxr <= reg_index &&
-            reg_index <= m_reg_info.last_mpxc);
+  if (!IsCPUFeatureAvailable(mpx))
+    return false;
 }
 
 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoMPX(uint32_t reg) {
   if (!IsMPX(reg))
     return false;
 
   if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
     ::memcpy(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes,

source/Plugins/Process/Utility/RegisterContext_x86.h

struct {
       uint32_t foseg; // FPU Operand Pointer Selector (fos)
     } i386_; // Added _ in the end to avoid error with gcc defining i386 in some
              // cases
   } ptr;
   uint32_t mxcsr;     // MXCSR Register State
   uint32_t mxcsrmask; // MXCSR Mask
   MMSReg stmm[8];     // 8*16 bytes for each FP-reg = 128 bytes
   XMMReg xmm[16];     // 16*16 bytes for each XMM-reg = 256 bytes
-  uint32_t padding[24];
+  uint8_t padding1[48];
+  uint64_t xcr0;
+  uint8_t padding2[40];
 };
 
 //---------------------------------------------------------------------------
 // Extended floating-point registers
 //---------------------------------------------------------------------------
 
 struct YMMHReg {
   uint8_t bytes[16]; // 16 * 8 bits for the high bytes of each YMM register