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Differential D24346

[x86] Accept 'retn' as an alias to 'ret[lqw]'\'ret' (At&t\Intel)
ClosedPublic

Authored by coby on Sep 8 2016, 8:10 AM.

Details

Reviewers
zvi
delena
dwmw2
igorb
Commits
rG76bfc6670b08: [x86] Accept 'retn' as an alias to 'ret[lqw]'\'ret' (At&t\Intel)
rL282601: [x86] Accept 'retn' as an alias to 'ret[lqw]'\'ret' (At&t\Intel)
Summary

Implement 'retn' simply by aliasing it to the relevant 'ret' instruction

Diff Detail

Repository
rL LLVM

Event Timeline

coby updated this revision to Diff 70700.Sep 8 2016, 8:10 AM
coby retitled this revision from to [x86] Accept 'retn' as an alias to 'ret[lqw]'\'ret' (At&t\Intel).
coby updated this object.
coby added reviewers: dwmw2, delena.
coby set the repository for this revision to rL LLVM.
coby added a subscriber: llvm-commits.
coby added reviewers: zvi, igorb.Sep 8 2016, 12:47 PM
zvi accepted this revision.Sep 26 2016, 11:40 PM
zvi edited edge metadata.

LGTM

This revision is now accepted and ready to land.Sep 26 2016, 11:40 PM
Closed by commit rL282601: [x86] Accept 'retn' as an alias to 'ret[lqw]'\'ret' (At&t\Intel) (authored by myatsina). · Explain WhySep 28 2016, 9:01 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
X86/
6 lines
test/
MC/
X86/
16 lines

Diff 70700

lib/Target/X86/X86InstrInfo.td

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def : MnemonicAlias<"repe", "rep">; def : MnemonicAlias<"repe", "rep">;
def : MnemonicAlias<"repz", "rep">; def : MnemonicAlias<"repz", "rep">;
def : MnemonicAlias<"repnz", "repne">; def : MnemonicAlias<"repnz", "repne">;
def : MnemonicAlias<"ret", "retw", "att">, Requires<[In16BitMode]>; def : MnemonicAlias<"ret", "retw", "att">, Requires<[In16BitMode]>;
def : MnemonicAlias<"ret", "retl", "att">, Requires<[In32BitMode]>; def : MnemonicAlias<"ret", "retl", "att">, Requires<[In32BitMode]>;
def : MnemonicAlias<"ret", "retq", "att">, Requires<[In64BitMode]>; def : MnemonicAlias<"ret", "retq", "att">, Requires<[In64BitMode]>;
// Apply 'ret' behavior to 'retn'
def : MnemonicAlias<"retn", "retw", "att">, Requires<[In16BitMode]>;
def : MnemonicAlias<"retn", "retl", "att">, Requires<[In32BitMode]>;
def : MnemonicAlias<"retn", "retq", "att">, Requires<[In64BitMode]>;
def : MnemonicAlias<"retn", "ret", "intel">;
def : MnemonicAlias<"sal", "shl", "intel">; def : MnemonicAlias<"sal", "shl", "intel">;
def : MnemonicAlias<"salb", "shlb", "att">; def : MnemonicAlias<"salb", "shlb", "att">;
def : MnemonicAlias<"salw", "shlw", "att">; def : MnemonicAlias<"salw", "shlw", "att">;
def : MnemonicAlias<"sall", "shll", "att">; def : MnemonicAlias<"sall", "shll", "att">;
def : MnemonicAlias<"salq", "shlq", "att">; def : MnemonicAlias<"salq", "shlq", "att">;
def : MnemonicAlias<"smovb", "movsb", "att">; def : MnemonicAlias<"smovb", "movsb", "att">;
def : MnemonicAlias<"smovw", "movsw", "att">; def : MnemonicAlias<"smovw", "movsw", "att">;
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test/MC/X86/ret.s

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// 16: retl $0 // 16: retl $0
// 16: encoding: [0x66,0xc2,0x00,0x00] // 16: encoding: [0x66,0xc2,0x00,0x00]
retq $0 retq $0
// 64: retq $0 // 64: retq $0
// 64: encoding: [0xc2,0x00,0x00] // 64: encoding: [0xc2,0x00,0x00]
// ERR32: error: instruction requires: 64-bit mode // ERR32: error: instruction requires: 64-bit mode
// ERR16: error: instruction requires: 64-bit mode // ERR16: error: instruction requires: 64-bit mode
retn
// 64: retq
// 64: encoding: [0xc3]
// 32: retl
// 32: encoding: [0xc3]
// 16: retw
// 16: encoding: [0xc3]
retn $0
// 64: retq $0
// 64: encoding: [0xc2,0x00,0x00]
// 32: retl $0
// 32: encoding: [0xc2,0x00,0x00]
// 16: retw $0
// 16: encoding: [0xc2,0x00,0x00]
lret lret
// 64: lretl // 64: lretl
// 64: encoding: [0xcb] // 64: encoding: [0xcb]
// 32: lretl // 32: lretl
// 32: encoding: [0xcb] // 32: encoding: [0xcb]
// 16: lretw // 16: lretw
// 16: encoding: [0xcb] // 16: encoding: [0xcb]
lretw lretw
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