AMDGPU/SI: Make sure llvm.amdgcn.implicitarg.ptr() is at least 4-byte aligned

[• tstellarAMD]

Summary

This fixes some OpenCV tests that were broken by libclc commit r276443.

[arsenm]

LGTM. I still think we should fix this to be the offset from the base pointer though

[jvesely]

lgtm. sorry about the breakage.

matt, I don't see how offset would fix this. pointer is more generic. If you know it's the same AS you can get the offset by subtracting, and it leaves open the option of being in different AS.

llvm/trunk/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

SDValue AMDGPUTargetLowering::CreateLiveInRegister(SelectionDAG &DAG,
   } else {
     VirtualRegister = MRI.getLiveInVirtReg(Reg);
   }
   return DAG.getRegister(VirtualRegister, VT);
 }
 
 uint32_t AMDGPUTargetLowering::getImplicitParameterOffset(
     const AMDGPUMachineFunction *MFI, const ImplicitParameter Param) const {
-  uint64_t ArgOffset = MFI->getABIArgOffset();
+  uint64_t ArgOffset = alignTo(MFI->getABIArgOffset(), 4);
   switch (Param) {
   case GRID_DIM:
     return ArgOffset;
   case GRID_OFFSET:
     return ArgOffset + 4;
   }
   llvm_unreachable("unexpected implicit parameter type");
 }

llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll

define void @test_implicit(i32 addrspace(1)* %out) #1 {
   %implicitarg.ptr = call noalias i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
   %header.ptr = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)*
   %gep = getelementptr i32, i32 addrspace(2)* %header.ptr, i64 10
   %value = load i32, i32 addrspace(2)* %gep
   store i32 %value, i32 addrspace(1)* %out
   ret void
 }
 
+; ALL-LABEL: {{^}}test_implicit_alignment
+; MESA: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xc
+; HSA: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x3
+; ALL: v_mov_b32_e32 [[V_VAL:v[0-9]+]], [[VAL]]
+; MESA: buffer_store_dword [[V_VAL]]
+; HSA: flat_store_dword v[{{[0-9]+:[0-9]+}}], [[V_VAL]]
+define void @test_implicit_alignment(i32 addrspace(1)* %out, <2 x i8> %in) #1 {
+  %implicitarg.ptr = call noalias i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
+  %arg.ptr = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)*
+  %val = load i32, i32 addrspace(2)* %arg.ptr
+  store i32 %val, i32 addrspace(1)* %out
+  ret void
+}
+
 declare i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr() #0
 declare i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr() #0
 
 attributes #0 = { nounwind readnone }
 attributes #1 = { nounwind }