This is an archive of the discontinued LLVM Phabricator instance.

[NVPTX] Force minimum alignment of 4 for byval arguments of device-side functions.
ClosedPublic

Authored by tra on Jul 15 2016, 3:46 PM.

Details

Summary

Taking address of parameter is legal in PTX and we do generate code that does it
Alas such code currently runs into miscompilation by ptxas on sm_50+ (NVIDIA issue 1789042).
Work around the issue by enforcing minimum alignment on byval arguments of device functions.

The change is effectively a no-op on SASS level for sm_3x where ptxas already aligns local copy by at least 4.

Diff Detail

Event Timeline

tra updated this revision to Diff 64205.Jul 15 2016, 3:46 PM
tra retitled this revision from to [NVPTX] Force minimum alignment of 4 for byval arguments of device-side functions..
tra updated this object.
tra added reviewers: jlebar, jingyue, jholewinski.
tra added a subscriber: llvm-commits.
jlebar accepted this revision.Jul 16 2016, 2:07 PM
jlebar edited edge metadata.
jlebar added inline comments.
lib/Target/NVPTX/NVPTXAsmPrinter.cpp
1601

I think the condition is when we support cross-TU linking with nvcc, because this breaks ABI compatibility with nvcc? We should be able to do multi-TU compilations just fine, if all of the object files come from clang.

lib/Target/NVPTX/NVPTXISelLowering.cpp
1344

Maybe s/change/condition/?

This revision is now accepted and ready to land.Jul 16 2016, 2:07 PM
tra updated this revision to Diff 64342.Jul 18 2016, 10:23 AM
tra edited edge metadata.

updated comments.

lib/Target/NVPTX/NVPTXAsmPrinter.cpp
1601

That's correct. I've updated the comment.

lib/Target/NVPTX/NVPTXISelLowering.cpp
1344

'alignment adjustment' ?

This revision was automatically updated to reflect the committed changes.