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Differential D20393

Add cdp intrinsic tests
ClosedPublic

Authored by rs on May 18 2016, 3:43 PM.

Details

Reviewers
rengolin
Commits
rGdbbbef540187: [ARM] Add cdp intrinsic tests.
rL270057: [ARM] Add cdp intrinsic tests.
Summary

I've attached a patch which adds tests to make sure the cdp intrinsics fault when trying to pass a variable as an argument. I've also renamed the intrinsics.ll to intrinsics-coprocessor.ll as the only intrinsics that file tested were coprocessor intrinsics and made the checks for specific.

Diff Detail

Event Timeline

rs updated this revision to Diff 57690.May 18 2016, 3:43 PM
rs retitled this revision from to Add cdp intrinsic tests.
rs updated this object.
rs added a reviewer: rengolin.
rs added a subscriber: llvm-commits.
rs updated this revision to Diff 57694.May 18 2016, 3:47 PM
rengolin accepted this revision.May 18 2016, 5:16 PM
rengolin edited edge metadata.

LGTM. Thanks!

This revision is now accepted and ready to land.May 18 2016, 5:16 PM
Closed by commit rL270057: [ARM] Add cdp intrinsic tests. (authored by rsingh). · Explain WhyMay 19 2016, 6:05 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
test/
CodeGen/
ARM/
13 lines
13 lines
39 lines

Diff 57694

test/CodeGen/ARM/cdp.ll

  • This file was added.
; RUN: not llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
; RUN: not llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.cdp
define void @cdp(i32 %a) #0 {
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
%1 = load i32, i32* %a.addr, align 4
call void @llvm.arm.cdp(i32 %1, i32 2, i32 3, i32 4, i32 5, i32 6)
ret void
}
declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind

test/CodeGen/ARM/cdp2.ll

  • This file was added.
; RUN: not llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
; RUN: not llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.cdp2
define void @cdp2(i32 %a) #0 {
%a.addr = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
%1 = load i32, i32* %a.addr, align 4
call void @llvm.arm.cdp2(i32 %1, i32 2, i32 3, i32 4, i32 5, i32 6)
ret void
}
declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind

test/CodeGen/ARM/intrinsics-coprocessor.ll

  • This file was added.
; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
; RUN: llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 | FileCheck %s
define void @coproc() nounwind {
entry:
; CHECK: mrc p7, #1, r0, c1, c1, #4
%0 = tail call i32 @llvm.arm.mrc(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
; CHECK: mcr p7, #1, r0, c1, c1, #4
tail call void @llvm.arm.mcr(i32 7, i32 1, i32 %0, i32 1, i32 1, i32 4) nounwind
; CHECK: mrc2 p7, #1, r1, c1, c1, #4
%1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
; CHECK: mcr2 p7, #1, r1, c1, c1, #4
tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind
; CHECK: mcrr p7, #1, r0, r1, c1
tail call void @llvm.arm.mcrr(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
; CHECK: mcrr2 p7, #1, r0, r1, c1
tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
; CHECK: cdp p7, #3, c1, c1, c1, #5
tail call void @llvm.arm.cdp(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
; CHECK: cdp2 p7, #3, c1, c1, c1, #5
tail call void @llvm.arm.cdp2(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
ret void
}
declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
declare i32 @llvm.arm.mrc2(i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.mcr(i32, i32, i32, i32, i32, i32) nounwind
declare i32 @llvm.arm.mrc(i32, i32, i32, i32, i32) nounwind

test/CodeGen/ARM/intrinsics.ll

  • This file was deleted.
; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 | FileCheck %s
; RUN: llc < %s -march=thumb -mtriple=thumbv7-eabi -mcpu=cortex-a8 | FileCheck %s
define void @coproc() nounwind {
entry:
; CHECK: mrc
%0 = tail call i32 @llvm.arm.mrc(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
; CHECK: mcr
tail call void @llvm.arm.mcr(i32 7, i32 1, i32 %0, i32 1, i32 1, i32 4) nounwind
; CHECK: mrc2
%1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
; CHECK: mcr2
tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind
; CHECK: mcrr
tail call void @llvm.arm.mcrr(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
; CHECK: mcrr2
tail call void @llvm.arm.mcrr2(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
; CHECK: cdp
tail call void @llvm.arm.cdp(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
; CHECK: cdp2
tail call void @llvm.arm.cdp2(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
ret void
}
declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
declare i32 @llvm.arm.mrc2(i32, i32, i32, i32, i32) nounwind
declare void @llvm.arm.mcr(i32, i32, i32, i32, i32, i32) nounwind
declare i32 @llvm.arm.mrc(i32, i32, i32, i32, i32) nounwind
test/CodeGen/ARM/intrinsics-coprocessor.ll