DAGCombiner: Reduce truncated shl width

[arsenm]

ping

[escha]

LGTM. We actually do this out of tree in our backend for ADD, SUB, MUL, SHL (since we'd rather truncate inputs than do a larger op and truncate that), so it seems more than reasonable to me.

[arsenm]

In D19453#415651, @escha wrote:

LGTM. We actually do this out of tree in our backend for ADD, SUB, MUL, SHL (since we'd rather truncate inputs than do a larger op and truncate that), so it seems more than reasonable to me.

Can you post patches for these? I thought these were already generically done

[arsenm]

r268094

[escha]

Some might be, as this code is fairly old. Here’s an extremely blind copy paste of our code:

// Truncate from an add should just reduce the size of the add and
// truncate the sources.  This is always a good idea for us as truncates
// are free while large adds/subs/muls are not.
switch (Source->getOpcode()) {
  case ISD::ADD:
  case ISD::SUB:
  case ISD::MUL:
  case ISD::SHL: {
    if (!AllUsersAreTruncate(Source))
      break;
    auto VT = N->getValueType(0);
    SDValue Trunc0 = DCI.DAG.getNode(ISD::TRUNCATE, dl, VT,
                                     Source->getOperand(0));
    SDValue Trunc1 = DCI.DAG.getNode(ISD::TRUNCATE, dl, VT,
                                     Source->getOperand(1));
    DCI.AddToWorklist(Trunc0.getNode());
    DCI.AddToWorklist(Trunc1.getNode());
    return DCI.DAG.getNode(Source->getOpcode(), dl, VT,
                           Trunc0, Trunc1);
  }
}

—escha

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

if ((!LegalOperations || TLI.isOperationLegal(ISD::SELECT, SrcVT)) &&
       SDLoc SL(N0);
       SDValue Cond = N0.getOperand(0);
       SDValue TruncOp0 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(1));
       SDValue TruncOp1 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(2));
       return DAG.getNode(ISD::SELECT, SDLoc(N), VT, Cond, TruncOp0, TruncOp1);
     }
   }
 
+  // trunc (shl x, K) -> shl (trunc x), K => K < vt.size / 2
+  if (N0.getOpcode() == ISD::SHL && N0.hasOneUse() &&
+      (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::SHL, VT)) &&
+      TLI.isTypeDesirableForOp(ISD::SHL, VT)) {
+    if (const ConstantSDNode *CAmt = isConstOrConstSplat(N0.getOperand(1))) {
+      uint64_t Amt = CAmt->getZExtValue();
+      unsigned Size = VT.getSizeInBits();
+
+      if (Amt < Size / 2) {
+        SDLoc SL(N);
+        EVT AmtVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout());
+
+        SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(0));
+        return DAG.getNode(ISD::SHL, SL, VT, Trunc,
+                           DAG.getConstant(Amt, SL, AmtVT));
+      }
+    }
+  }
+
   // Fold a series of buildvector, bitcast, and truncate if possible.
   // For example fold
   //   (2xi32 trunc (bitcast ((4xi32)buildvector x, x, y, y) 2xi64)) to
   //   (2xi32 (buildvector x, y)).
   if (Level == AfterLegalizeVectorOps && VT.isVector() &&
       N0.getOpcode() == ISD::BITCAST && N0.hasOneUse() &&
       N0.getOperand(0).getOpcode() == ISD::BUILD_VECTOR &&
       N0.getOperand(0).hasOneUse()) {

test/CodeGen/AMDGPU/shift-i64-opts.ll

 
 ; GCN-LABEL: {{^}}ashr_i64_const_63:
 define void @ashr_i64_const_63(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
   %val = load i64, i64 addrspace(1)* %in
   %shl = ashr i64 %val, 63
   store i64 %shl, i64 addrspace(1)* %out
   ret void
 }
+
+; GCN-LABEL: {{^}}trunc_shl_31_i32_i64:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: v_lshlrev_b32_e32 [[SHL:v[0-9]+]], 31, [[VAL]]
+; GCN: buffer_store_dword [[SHL]]
+define void @trunc_shl_31_i32_i64(i32 addrspace(1)* %out, i64 addrspace(1)* %in) {
+  %val = load i64, i64 addrspace(1)* %in
+  %shl = shl i64 %val, 31
+  %trunc = trunc i64 %shl to i32
+  store i32 %trunc, i32 addrspace(1)* %out
+  ret void
+}
+
+; GCN-LABEL: {{^}}trunc_shl_15_i16_i64:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: v_lshlrev_b32_e32 [[SHL:v[0-9]+]], 15, [[VAL]]
+; GCN: buffer_store_short [[SHL]]
+define void @trunc_shl_15_i16_i64(i16 addrspace(1)* %out, i64 addrspace(1)* %in) {
+  %val = load i64, i64 addrspace(1)* %in
+  %shl = shl i64 %val, 15
+  %trunc = trunc i64 %shl to i16
+  store i16 %trunc, i16 addrspace(1)* %out
+  ret void
+}
+
+; GCN-LABEL: {{^}}trunc_shl_15_i16_i32:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: v_lshlrev_b32_e32 [[SHL:v[0-9]+]], 15, [[VAL]]
+; GCN: buffer_store_short [[SHL]]
+define void @trunc_shl_15_i16_i32(i16 addrspace(1)* %out, i32 addrspace(1)* %in) {
+  %val = load i32, i32 addrspace(1)* %in
+  %shl = shl i32 %val, 15
+  %trunc = trunc i32 %shl to i16
+  store i16 %trunc, i16 addrspace(1)* %out
+  ret void
+}
+
+; GCN-LABEL: {{^}}trunc_shl_7_i8_i64:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: v_lshlrev_b32_e32 [[SHL:v[0-9]+]], 7, [[VAL]]
+; GCN: buffer_store_byte [[SHL]]
+define void @trunc_shl_7_i8_i64(i8 addrspace(1)* %out, i64 addrspace(1)* %in) {
+  %val = load i64, i64 addrspace(1)* %in
+  %shl = shl i64 %val, 7
+  %trunc = trunc i64 %shl to i8
+  store i8 %trunc, i8 addrspace(1)* %out
+  ret void
+}
+
+; GCN-LABEL: {{^}}trunc_shl_1_i2_i64:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: v_lshlrev_b32_e32 [[SHL:v[0-9]+]], 1, [[VAL]]
+; GCN: v_and_b32_e32 [[AND:v[0-9]+]], 2, [[SHL]]
+; GCN: buffer_store_byte [[AND]]
+define void @trunc_shl_1_i2_i64(i2 addrspace(1)* %out, i64 addrspace(1)* %in) {
+  %val = load i64, i64 addrspace(1)* %in
+  %shl = shl i64 %val, 1
+  %trunc = trunc i64 %shl to i2
+  store i2 %trunc, i2 addrspace(1)* %out
+  ret void
+}
+
+; GCN-LABEL: {{^}}trunc_shl_1_i32_i64:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: v_lshlrev_b32_e32 [[SHL:v[0-9]+]], 1, [[VAL]]
+; GCN: buffer_store_dword [[SHL]]
+define void @trunc_shl_1_i32_i64(i32 addrspace(1)* %out, i64 addrspace(1)* %in) {
+  %val = load i64, i64 addrspace(1)* %in
+  %shl = shl i64 %val, 1
+  %trunc = trunc i64 %shl to i32
+  store i32 %trunc, i32 addrspace(1)* %out
+  ret void
+}
+
+; GCN-LABEL: {{^}}trunc_shl_16_i32_i64:
+; GCN: buffer_load_dword [[VAL:v[0-9]+]]
+; GCN: v_lshlrev_b32_e32 [[SHL:v[0-9]+]], 16, [[VAL]]
+; GCN: buffer_store_dword [[SHL]]
+define void @trunc_shl_16_i32_i64(i32 addrspace(1)* %out, i64 addrspace(1)* %in) {
+  %val = load i64, i64 addrspace(1)* %in
+  %shl = shl i64 %val, 16
+  %trunc = trunc i64 %shl to i32
+  store i32 %trunc, i32 addrspace(1)* %out
+  ret void
+}
+
+; GCN-LABEL: {{^}}trunc_shl_33_i32_i64:
+; GCN: v_mov_b32_e32 [[ZERO:v[0-9]+]], 0{{$}}
+; GCN: buffer_store_dword [[ZERO]]
+define void @trunc_shl_33_i32_i64(i32 addrspace(1)* %out, i64 addrspace(1)* %in) {
+  %val = load i64, i64 addrspace(1)* %in
+  %shl = shl i64 %val, 33
+  %trunc = trunc i64 %shl to i32
+  store i32 %trunc, i32 addrspace(1)* %out
+  ret void
+}
+
+; GCN-LABEL: {{^}}trunc_shl_16_v2i32_v2i64:
+; GCN: buffer_load_dwordx4 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}
+; GCN-DAG: v_lshlrev_b32_e32 v[[RESHI:[0-9]+]], 16, v{{[0-9]+}}
+; GCN-DAG: v_lshlrev_b32_e32 v[[RESLO:[0-9]+]], 16, v[[LO]]
+; GCN: buffer_store_dwordx2 v{{\[}}[[RESLO]]:[[RESHI]]{{\]}}
+define void @trunc_shl_16_v2i32_v2i64(<2 x i32> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) {
+  %val = load <2 x i64>, <2 x i64> addrspace(1)* %in
+  %shl = shl <2 x i64> %val, <i64 16, i64 16>
+  %trunc = trunc <2 x i64> %shl to <2 x i32>
+  store <2 x i32> %trunc, <2 x i32> addrspace(1)* %out
+  ret void
+}
+
+; GCN-LABEL: {{^}}trunc_shl_31_i32_i64_multi_use:
+; GCN: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
+; GCN: v_lshl_b64 v{{\[}}[[RESLO:[0-9]+]]:[[RESHI:[0-9]+]]{{\]}}, [[VAL]], 31
+; GCN: buffer_store_dword v[[RESLO]]
+; GCN: buffer_store_dwordx2 v{{\[}}[[RESLO]]:[[RESHI]]{{\]}}
+define void @trunc_shl_31_i32_i64_multi_use(i32 addrspace(1)* %out, i64 addrspace(1)* %in) {
+  %val = load i64, i64 addrspace(1)* %in
+  %shl = shl i64 %val, 31
+  %trunc = trunc i64 %shl to i32
+  store volatile i32 %trunc, i32 addrspace(1)* %out
+  store volatile i64 %shl, i64 addrspace(1)* %in
+  ret void
+}

test/CodeGen/SystemZ/atomicrmw-add-01.ll

 ; Test 8-bit atomic additions.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check addition of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used.  This shift is independent of the other loop prologue
 ;   instructions.
 define i8 @f1(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg %r1, %r2, 0, 189, 0{{$}}
+; CHECK: sll [[SHIFT:%r[0-9]+]], 3
+; CHECK: l [[OLD:%r[0-9]+]], 0(%r1)
 ; CHECK: [[LABEL:\.[^:]*]]:
 ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
 ; CHECK: ar [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0(%r1)
 ; CHECK: jl [[LABEL]]
 ; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
+; CHECK-SHIFT1: sll [[SHIFT:%r[1-9]+]], 3
 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: ar {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw add i8 *%src, i8 %b seq_cst
   ret i8 %res
 }
 
 ; Check the minimum signed value.  We add 0x80000000 to the rotated word.
 define i8 @f2(i8 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: afi [[ROT]], -2147483648
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
 ; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
+; CHECK-SHIFT1: sll [[SHIFT:%r[1-9]+]], 3
 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14

test/CodeGen/SystemZ/atomicrmw-add-02.ll

 ; Test 16-bit atomic additions.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check addition of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used.  This shift is independent of the other loop prologue
 ;   instructions.
 define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: ar [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
+; CHECK-SHIFT1: sll [[SHIFT:%r[1-9]+]], 3
 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: ar {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw add i16 *%src, i16 %b seq_cst
   ret i16 %res
 }
 
 ; Check the minimum signed value.  We add 0x80000000 to the rotated word.
 define i16 @f2(i16 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: afi [[ROT]], -2147483648
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
+; CHECK-SHIFT1: sll [[SHIFT:%r[1-9]+]], 3
 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14

test/CodeGen/SystemZ/atomicrmw-and-01.ll

 ; Test 8-bit atomic ANDs.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check AND of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used, and that the low bits are set to 1.  This sequence is
 ;   independent of the other loop prologue instructions.
 define i8 @f1(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: nr [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: oilf %r3, 16777215
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: nr {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw and i8 *%src, i8 %b seq_cst
   ret i8 %res
 }
 
 ; Check the minimum signed value.  We AND the rotated word with 0x80ffffff.
 define i8 @f2(i8 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: nilh [[ROT]], 33023
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw and i8 *%src, i8 -128 seq_cst

test/CodeGen/SystemZ/atomicrmw-and-02.ll

 ; Test 16-bit atomic ANDs.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check AND of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used, and that the low bits are set to 1.  This sequence is
 ;   independent of the other loop prologue instructions.
 define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: nr [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: oill %r3, 65535
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: nr {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw and i16 *%src, i16 %b seq_cst
   ret i16 %res
 }
 
 ; Check the minimum signed value.  We AND the rotated word with 0x8000ffff.
 define i16 @f2(i16 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: nilh [[ROT]], 32768
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw and i16 *%src, i16 -32768 seq_cst

test/CodeGen/SystemZ/atomicrmw-minmax-01.ll

 ; Test 8-bit atomic min/max operations.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check signed minimum.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used, and that the low bits are set to 1.  This sequence is
 ;   independent of the other loop prologue instructions.
 define i8 @f1(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LOOP:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: crjle [[ROT]], %r3, [[KEEP:\..*]]
 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
 ; CHECK: [[KEEP]]:
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LOOP]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: crjle {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw min i8 *%src, i8 %b seq_cst
   ret i8 %res
 }
 
 ; Check signed maximum.
 define i8 @f2(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LOOP:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: crjhe [[ROT]], %r3, [[KEEP:\..*]]
 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
 ; CHECK: [[KEEP]]:
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LOOP]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: crjhe {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw max i8 *%src, i8 %b seq_cst
   ret i8 %res
 }
 
 ; Check unsigned minimum.
 define i8 @f3(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f3:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LOOP:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: clrjle [[ROT]], %r3, [[KEEP:\..*]]
 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
 ; CHECK: [[KEEP]]:
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LOOP]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f3:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f3:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: clrjle {{%r[0-9]+}}, %r3,
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw umin i8 *%src, i8 %b seq_cst
   ret i8 %res
 }
 
 ; Check unsigned maximum.
 define i8 @f4(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f4:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LOOP:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: clrjhe [[ROT]], %r3, [[KEEP:\..*]]
 ; CHECK: risbg [[ROT]], %r3, 32, 39, 0
 ; CHECK: [[KEEP]]:
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LOOP]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f4:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f4:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: rll

test/CodeGen/SystemZ/atomicrmw-minmax-02.ll

 ; Test 8-bit atomic min/max operations.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check signed minimum.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used, and that the low bits are set to 1.  This sequence is
 ;   independent of the other loop prologue instructions.
 define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LOOP:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: crjle [[ROT]], %r3, [[KEEP:\..*]]
 ; CHECK: risbg [[ROT]], %r3, 32, 47, 0
 ; CHECK: [[KEEP]]:
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LOOP]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: crjle {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw min i16 *%src, i16 %b seq_cst
   ret i16 %res
 }
 
 ; Check signed maximum.
 define i16 @f2(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LOOP:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: crjhe [[ROT]], %r3, [[KEEP:\..*]]
 ; CHECK: risbg [[ROT]], %r3, 32, 47, 0
 ; CHECK: [[KEEP]]:
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LOOP]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: crjhe {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw max i16 *%src, i16 %b seq_cst
   ret i16 %res
 }
 
 ; Check unsigned minimum.
 define i16 @f3(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f3:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LOOP:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: clrjle [[ROT]], %r3, [[KEEP:\..*]]
 ; CHECK: risbg [[ROT]], %r3, 32, 47, 0
 ; CHECK: [[KEEP]]:
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LOOP]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f3:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f3:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: clrjle {{%r[0-9]+}}, %r3,
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw umin i16 *%src, i16 %b seq_cst
   ret i16 %res
 }
 
 ; Check unsigned maximum.
 define i16 @f4(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f4:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LOOP:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: clrjhe [[ROT]], %r3, [[KEEP:\..*]]
 ; CHECK: risbg [[ROT]], %r3, 32, 47, 0
 ; CHECK: [[KEEP]]:
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LOOP]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f4:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f4:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll

test/CodeGen/SystemZ/atomicrmw-nand-01.ll

 ; Test 8-bit atomic NANDs.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check NAND of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used, and that the low bits are set to 1.  This sequence is
 ;   independent of the other loop prologue instructions.
 define i8 @f1(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: nr [[ROT]], %r3
 ; CHECK: xilf [[ROT]], 4278190080
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: oilf %r3, 16777215
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: nr {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw nand i8 *%src, i8 %b seq_cst
   ret i8 %res
 }
 
 ; Check the minimum signed value.  We AND the rotated word with 0x80ffffff.
 define i8 @f2(i8 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: nilh [[ROT]], 33023
 ; CHECK: xilf [[ROT]], 4278190080
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw nand i8 *%src, i8 -128 seq_cst

test/CodeGen/SystemZ/atomicrmw-nand-02.ll

 ; Test 16-bit atomic NANDs.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check NAND of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used, and that the low bits are set to 1.  This sequence is
 ;   independent of the other loop prologue instructions.
 define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: nr [[ROT]], %r3
 ; CHECK: xilf [[ROT]], 4294901760
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: oill %r3, 65535
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: nr {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw nand i16 *%src, i16 %b seq_cst
   ret i16 %res
 }
 
 ; Check the minimum signed value.  We AND the rotated word with 0x8000ffff.
 define i16 @f2(i16 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: nilh [[ROT]], 32768
 ; CHECK: xilf [[ROT]], 4294901760
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw nand i16 *%src, i16 -32768 seq_cst

test/CodeGen/SystemZ/atomicrmw-or-01.ll

 ; Test 8-bit atomic ORs.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check OR of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used.  This shift is independent of the other loop prologue
 ;   instructions.
 define i8 @f1(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: or [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: or {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw or i8 *%src, i8 %b seq_cst
   ret i8 %res
 }
 
 ; Check the minimum signed value.  We OR the rotated word with 0x80000000.
 define i8 @f2(i8 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: oilh [[ROT]], 32768
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw or i8 *%src, i8 -128 seq_cst

test/CodeGen/SystemZ/atomicrmw-or-02.ll

 ; Test 16-bit atomic ORs.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check OR of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used.  This shift is independent of the other loop prologue
 ;   instructions.
 define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: or [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: or {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw or i16 *%src, i16 %b seq_cst
   ret i16 %res
 }
 
 ; Check the minimum signed value.  We OR the rotated word with 0x80000000.
 define i16 @f2(i16 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: oilh [[ROT]], 32768
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw or i16 *%src, i16 -32768 seq_cst

test/CodeGen/SystemZ/atomicrmw-sub-01.ll

 ; Test 8-bit atomic subtractions.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check subtraction of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used.  This shift is independent of the other loop prologue
 ;   instructions.
 define i8 @f1(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: sr [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: sr {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw sub i8 *%src, i8 %b seq_cst
   ret i8 %res
 }
 
 ; Check the minimum signed value.  We add 0x80000000 to the rotated word.
 define i8 @f2(i8 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: afi [[ROT]], -2147483648
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw sub i8 *%src, i8 -128 seq_cst

test/CodeGen/SystemZ/atomicrmw-sub-02.ll

 ; Test 16-bit atomic subtractions.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check subtraction of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used.  This shift is independent of the other loop prologue
 ;   instructions.
 define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: sr [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: sr {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw sub i16 *%src, i16 %b seq_cst
   ret i16 %res
 }
 
 ; Check the minimum signed value.  We add 0x80000000 to the rotated word.
 define i16 @f2(i16 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: afi [[ROT]], -2147483648
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw sub i16 *%src, i16 -32768 seq_cst

test/CodeGen/SystemZ/atomicrmw-xchg-01.ll

 ; Test 8-bit atomic exchange.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
 
 ; Check exchange with a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.  CHECK-SHIFT also checks that %r3 is not modified before
 ;   being used in the RISBG (in contrast to things like atomic addition,
 ;   which shift %r3 left so that %b is at the high end of the word).
 define i8 @f1(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: risbg [[ROT]], %r3, 32, 39, 24
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT-LABEL: f1:
 ; CHECK-SHIFT-NOT: %r3
-; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r2, 3
+; CHECK-SHIFT: sll %r2, 3
 ; CHECK-SHIFT-NOT: %r3
-; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT-NOT: %r3
 ; CHECK-SHIFT: rll
 ; CHECK-SHIFT-NOT: %r3
 ; CHECK-SHIFT: risbg {{%r[0-9]+}}, %r3, 32, 39, 24
 ; CHECK-SHIFT: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT: rll
 ; CHECK-SHIFT: br %r14
   %res = atomicrmw xchg i8 *%src, i8 %b seq_cst

test/CodeGen/SystemZ/atomicrmw-xchg-02.ll

 ; Test 16-bit atomic exchange.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
 
 ; Check exchange with a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.  CHECK-SHIFT also checks that %r3 is not modified before
 ;   being used in the RISBG (in contrast to things like atomic addition,
 ;   which shift %r3 left so that %b is at the high end of the word).
 define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: risbg [[ROT]], %r3, 32, 47, 16
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT-LABEL: f1:
 ; CHECK-SHIFT-NOT: %r3
-; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r2, 3
+; CHECK-SHIFT: sll %r2, 3
 ; CHECK-SHIFT-NOT: %r3
-; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT-NOT: %r3
 ; CHECK-SHIFT: rll
 ; CHECK-SHIFT-NOT: %r3
 ; CHECK-SHIFT: risbg {{%r[0-9]+}}, %r3, 32, 47, 16
 ; CHECK-SHIFT: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT: rll
 ; CHECK-SHIFT: br %r14
   %res = atomicrmw xchg i16 *%src, i16 %b seq_cst

test/CodeGen/SystemZ/atomicrmw-xor-01.ll

 ; Test 8-bit atomic XORs.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check XOR of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used.  This shift is independent of the other loop prologue
 ;   instructions.
 define i8 @f1(i8 *%src, i8 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: xr [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 24
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: xr {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw xor i8 *%src, i8 %b seq_cst
   ret i8 %res
 }
 
 ; Check the minimum signed value.  We XOR the rotated word with 0x80000000.
 define i8 @f2(i8 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: xilf [[ROT]], 2147483648
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 8(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw xor i8 *%src, i8 -128 seq_cst

test/CodeGen/SystemZ/atomicrmw-xor-02.ll

 ; Test 16-bit atomic XORs.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
 
 ; Check XOR of a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.
 ; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
 ;   before being used.  This shift is independent of the other loop prologue
 ;   instructions.
 define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK-LABEL: f1:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: xr [[ROT]], %r3
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}})
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f1:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: xr {{%r[0-9]+}}, %r3
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw xor i16 *%src, i16 %b seq_cst
   ret i16 %res
 }
 
 ; Check the minimum signed value.  We XOR the rotated word with 0x80000000.
 define i16 @f2(i16 *%src) {
 ; CHECK-LABEL: f2:
-; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK: nill %r2, 65532
-; CHECK: l [[OLD:%r[0-9]+]], 0(%r2)
+; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
+; CHECK: sll %r2, 3
+; CHECK: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK: [[LABEL:\.[^:]*]]:
-; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]])
+; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0(%r2)
 ; CHECK: xilf [[ROT]], 2147483648
 ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0([[NEGSHIFT:%r[1-9]+]])
-; CHECK: cs [[OLD]], [[NEW]], 0(%r2)
+; CHECK: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK: jl [[LABEL]]
-; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK: rll %r2, [[OLD]], 16(%r2)
 ; CHECK: br %r14
 ;
 ; CHECK-SHIFT1-LABEL: f2:
-; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
-; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT1: sll %r2, 3
+; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], %r2
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
 ; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw xor i16 *%src, i16 -32768 seq_cst

test/CodeGen/SystemZ/cmpxchg-01.ll

 ; Test 8-bit compare and swap.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-MAIN
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
 
 ; Check compare and swap with a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.  CHECK-SHIFT also checks that %r3 is not modified before
 ;   being used in the RISBG (in contrast to things like atomic addition,
 ;   which shift %r3 left so that %b is at the high end of the word).
 define i8 @f1(i8 %dummy, i8 *%src, i8 %cmp, i8 %swap) {
 ; CHECK-MAIN-LABEL: f1:
-; CHECK-MAIN: sllg [[SHIFT:%r[1-9]+]], %r3, 3
-; CHECK-MAIN: nill %r3, 65532
-; CHECK-MAIN: l [[OLD:%r[0-9]+]], 0(%r3)
+; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}}
+; CHECK-MAIN: sll %r3, 3
+; CHECK-MAIN: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
-; CHECK-MAIN: rll %r2, [[OLD]], 8([[SHIFT]])
+; CHECK-MAIN: rll %r2, [[OLD]], 8(%r3)
 ; CHECK-MAIN: risbg %r4, %r2, 32, 55, 0
 ; CHECK-MAIN: crjlh %r2, %r4, [[EXIT:\.[^ ]*]]
 ; CHECK-MAIN: risbg %r5, %r2, 32, 55, 0
 ; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r5, -8({{%r[1-9]+}})
-; CHECK-MAIN: cs [[OLD]], [[NEW]], 0(%r3)
+; CHECK-MAIN: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK-MAIN: jl [[LOOP]]
 ; CHECK-MAIN: [[EXIT]]:
 ; CHECK-MAIN-NOT: %r2
 ; CHECK-MAIN: br %r14
 ;
 ; CHECK-SHIFT-LABEL: f1:
-; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r3, 3
+; CHECK-SHIFT: sll [[SHIFT:%r[1-9]+]], 3
 ; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
 ; CHECK-SHIFT: rll
 ; CHECK-SHIFT: rll {{%r[0-9]+}}, %r5, -8([[NEGSHIFT]])
   %pair = cmpxchg i8 *%src, i8 %cmp, i8 %swap seq_cst seq_cst
   %res = extractvalue { i8, i1 } %pair, 0
   ret i8 %res
 }
 

test/CodeGen/SystemZ/cmpxchg-02.ll

 ; Test 16-bit compare and swap.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-MAIN
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
 
 ; Check compare and swap with a variable.
 ; - CHECK is for the main loop.
 ; - CHECK-SHIFT makes sure that the negated shift count used by the second
 ;   RLL is set up correctly.  The negation is independent of the NILL and L
 ;   tested in CHECK.  CHECK-SHIFT also checks that %r3 is not modified before
 ;   being used in the RISBG (in contrast to things like atomic addition,
 ;   which shift %r3 left so that %b is at the high end of the word).
 define i16 @f1(i16 %dummy, i16 *%src, i16 %cmp, i16 %swap) {
 ; CHECK-MAIN-LABEL: f1:
-; CHECK-MAIN: sllg [[SHIFT:%r[1-9]+]], %r3, 3
-; CHECK-MAIN: nill %r3, 65532
-; CHECK-MAIN: l [[OLD:%r[0-9]+]], 0(%r3)
+; CHECK-MAIN: risbg [[RISBG:%r[1-9]+]], %r3, 0, 189, 0{{$}}
+; CHECK-MAIN: sll %r3, 3
+; CHECK-MAIN: l [[OLD:%r[0-9]+]], 0([[RISBG]])
 ; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
-; CHECK-MAIN: rll %r2, [[OLD]], 16([[SHIFT]])
+; CHECK-MAIN: rll %r2, [[OLD]], 16(%r3)
 ; CHECK-MAIN: risbg %r4, %r2, 32, 47, 0
 ; CHECK-MAIN: crjlh %r2, %r4, [[EXIT:\.[^ ]*]]
 ; CHECK-MAIN: risbg %r5, %r2, 32, 47, 0
 ; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r5, -16({{%r[1-9]+}})
-; CHECK-MAIN: cs [[OLD]], [[NEW]], 0(%r3)
+; CHECK-MAIN: cs [[OLD]], [[NEW]], 0([[RISBG]])
 ; CHECK-MAIN: jl [[LOOP]]
 ; CHECK-MAIN: [[EXIT]]:
 ; CHECK-MAIN-NOT: %r2
 ; CHECK-MAIN: br %r14
 ;
 ; CHECK-SHIFT-LABEL: f1:
-; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r3, 3
-; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
+; CHECK-SHIFT: sll %r3, 3
+; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], %r3
 ; CHECK-SHIFT: rll
 ; CHECK-SHIFT: rll {{%r[0-9]+}}, %r5, -16([[NEGSHIFT]])
   %pair = cmpxchg i16 *%src, i16 %cmp, i16 %swap seq_cst seq_cst
   %res = extractvalue { i16, i1 } %pair, 0
   ret i16 %res
 }
 
 ; Check compare and swap with constants.  We should force the constants into

test/CodeGen/X86/reduce-trunc-shl.ll

+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s
+
+; CHECK-LABEL: {{^}}trunc_shl_7_v4i32_v4i64:
+; CHECK: vpshufd $136, (%rsi), %ymm0
+; CHECK: vpermq $236, %ymm0, %ymm0
+; CHECK: vpslld $7, %xmm0, %xmm0
+; CHECK: vmovdqa %xmm0, (%rdi)
+define void @trunc_shl_7_v4i32_v4i64(<4 x i32> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) {
+  %val = load <4 x i64>, <4 x i64> addrspace(1)* %in
+  %shl = shl <4 x i64> %val, <i64 7, i64 7, i64 7, i64 7>
+  %trunc = trunc <4 x i64> %shl to <4 x i32>
+  store <4 x i32> %trunc, <4 x i32> addrspace(1)* %out
+  ret void
+}