[X86] More test updates to support fixup-byte-word-insts optimization either on or off.

[kbsmith1]

Summary

This updates several test cases to check for correct behavior with the -fixup-byte-word-insts optimization either on or off.

[spatel]

LGTM. This is a continuation of: http://reviews.llvm.org/D17415

2008-06-13-NotVolatileLoadStore.ll

-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -march=x86 -fixup-byte-word-insts=0 | FileCheck %s -check-prefix=CHECK -check-prefix=BWOFF
+; RUN: llc < %s -march=x86 -fixup-byte-word-insts=1 | FileCheck %s -check-prefix=CHECK -check-prefix=BWON
 ; These transforms are turned off for load volatiles and stores.
 ; Check that they weren't turned off for all loads and stores!
 ; CHECK-LABEL: f:
 ; CHECK-NOT: movsd
-; CHECK: movw
+; BWOFF: movw
+; BWON:  movzwl
 ; CHECK: addw
 
 @atomic = global double 0.000000e+00    ; <double*> [#uses=1]
 @atomic2 = global double 0.000000e+00   ; <double*> [#uses=1]
 @ioport = global i32 0    ; <i32*> [#uses=1]
 @ioport2 = global i32 0   ; <i32*> [#uses=1]
 
 define i16 @f(i64 %x) {

MergeConsecutiveStores.ll

-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWON %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -addr-sink-using-gep=1 < %s | FileCheck %s
 
 %struct.A = type { i8, i8, i8, i8, i8, i8, i8, i8 }
 %struct.B = type { i32, i32, i32, i32, i32, i32, i32, i32 }
 
 ; CHECK-LABEL: merge_const_store:
 ; save 1,2,3 ... as one big integer.
 ; CHECK: movabsq $578437695752307201
.lr.ph:
   br i1 %exitcond, label %._crit_edge, label %.lr.ph
 ._crit_edge:
   ret void
 }
 
 
 ; CHECK-LABEL: merge_loads_i16:
 ;  load:
-; CHECK: movw
+; BWON:  movzwl
+; BWOFF: movw
 ;  store:
 ; CHECK: movw
 ; CHECK: ret
 define void @merge_loads_i16(i32 %count, %struct.A* noalias nocapture %q, %struct.A* noalias nocapture %p) nounwind uwtable noinline ssp {
   %1 = icmp sgt i32 %count, 0
   br i1 %1, label %.lr.ph, label %._crit_edge
 
 .lr.ph:                                           ; preds = %0
; <label>:4                                       ; preds = %4, %.lr.ph
   br i1 %exitcond, label %._crit_edge, label %4
 
 ._crit_edge:                                      ; preds = %4, %0
   ret void
 }
 
 ; The loads and the stores are interleaved. Can't merge them.
 ; CHECK-LABEL: no_merge_loads:
-; CHECK: movb
+; BWON:  movzbl
+; BWOFF: movb
 ; CHECK: movb
 ; CHECK: movb
 ; CHECK: movb
 ; CHECK: ret
 define void @no_merge_loads(i32 %count, %struct.A* noalias nocapture %q, %struct.A* noalias nocapture %p) nounwind uwtable noinline ssp {
   %1 = icmp sgt i32 %count, 0
   br i1 %1, label %.lr.ph, label %._crit_edge
 

half.ll

-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c -asm-verbose=false \
-; RUN:   | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c -asm-verbose=false \
-; RUN:    | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-F16C
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr +sse2 -asm-verbose=false \
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c -asm-verbose=false -fixup-byte-word-insts=1 \
+; RUN:   | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL -check-prefix=BWON
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c -asm-verbose=false -fixup-byte-word-insts=0 \
+; RUN:   | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL -check-prefix=BWOFF
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c -asm-verbose=false -fixup-byte-word-insts=1 \ 
+; RUN:    | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-F16C -check-prefix=BWON
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr +sse2 -asm-verbose=false -fixup-byte-word-insts=0  \
 ; RUN:    | FileCheck %s -check-prefix=CHECK-I686
 
 define void @test_load_store(half* %in, half* %out) {
 ; CHECK-LABEL: test_load_store:
-; CHECK: movw (%rdi), [[TMP:%[a-z0-9]+]]
-; CHECK: movw [[TMP]], (%rsi)
+; BWON:  movzwl (%rdi), %eax
+; BWOFF: movw (%rdi), %ax
+; CHECK: movw %ax, (%rsi)
   %val = load half, half* %in
   store half %val, half* %out
   ret void
 }
 
 define i16 @test_bitcast_from_half(half* %addr) {
 ; CHECK-LABEL: test_bitcast_from_half:
 ; CHECK: movzwl (%rdi), %eax

return-ext.ll

-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=0 | \
+; RUN:   FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \
+; RUN:   FileCheck -check-prefix=CHECK -check-prefix=BWON %s
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -fixup-byte-word-insts=0 | \
+; RUN:   FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \
+; RUN:   FileCheck -check-prefix=CHECK -check-prefix=BWON %s
 
 
 @x = common global i32 0, align 4
 
 define zeroext i1 @unsigned_i1() {
 entry:
   %0 = load i32, i32* @x
   %cmp = icmp eq i32 %0, 42

 entry:
   %0 = load i16, i16* @a
   %1 = load i16, i16* @b
   %add = add i16 %1, %0
   ret i16 %add
 
 ; i16 return values are not extended.
 ; CHECK-LABEL: unsigned_i16:
-; CHECK:       movw
+; BWOFF:       movw
+; BWON:        movzwl
 ; CHECK-NEXT:  addw
 ; CHECK-NEXT:  ret
 }
 
 
 define i32 @use_i1() {
 entry:
   %0 = call i1 @unsigned_i1();

store-narrow.ll

 ; rdar://7860110
 ; RUN: llc -asm-verbose=false < %s | FileCheck %s -check-prefix=X64
-; RUN: llc -march=x86 -asm-verbose=false < %s | FileCheck %s -check-prefix=X32
+; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON
+; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin10.2"
 
 define void @test1(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp {
 entry:
   %A = load i32, i32* %a0, align 4
   %B = and i32 %A, -256     ; 0xFFFFFF00
   %C = zext i8 %a1 to i32
entry:
   %C = zext i16 %a1 to i32
   %D = or i32 %B, %C
   store i32 %D, i32* %a0, align 4
   ret void
 ; X64-LABEL: test3:
 ; X64: movw %si, (%rdi)
 
 ; X32-LABEL: test3:
-; X32: movw 8(%esp), %ax
+; X32-BWON:  movzwl 8(%esp), %eax
+; X32-BWOFF: movw 8(%esp), %ax
 ; X32: movw %ax, (%{{.*}})
 }
 
 define void @test4(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp {
 entry:
   %A = load i32, i32* %a0, align 4
   %B = and i32 %A, 65535    ; 0x0000FFFF
   %C = zext i16 %a1 to i32
   %CS = shl i32 %C, 16
   %D = or i32 %B, %CS
   store i32 %D, i32* %a0, align 4
   ret void
 ; X64-LABEL: test4:
 ; X64: movw %si, 2(%rdi)
 
 ; X32-LABEL: test4:
-; X32: movw 8(%esp), %[[REG:[abcd]]]x
+; X32-BWON:  movzwl 8(%esp), %e[[REG:[abcd]]]x
+; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x
 ; X32: movw %[[REG]]x, 2(%{{.*}})
 }
 
 define void @test5(i64* nocapture %a0, i16 zeroext %a1) nounwind ssp {
 entry:
   %A = load i64, i64* %a0, align 4
   %B = and i64 %A, -4294901761    ; 0xFFFFFFFF0000FFFF
   %C = zext i16 %a1 to i64
   %CS = shl i64 %C, 16
   %D = or i64 %B, %CS
   store i64 %D, i64* %a0, align 4
   ret void
 ; X64-LABEL: test5:
 ; X64: movw %si, 2(%rdi)
 
 ; X32-LABEL: test5:
-; X32: movw 8(%esp), %[[REG:[abcd]]]x
+; X32-BWON:  movzwl 8(%esp), %e[[REG:[abcd]]]x
+; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x
 ; X32: movw %[[REG]]x, 2(%{{.*}})
 }
 
 define void @test6(i64* nocapture %a0, i8 zeroext %a1) nounwind ssp {
 entry:
   %A = load i64, i64* %a0, align 4
   %B = and i64 %A, -280375465082881    ; 0xFFFF00FFFFFFFFFF
   %C = zext i8 %a1 to i64