[LoongArch] Improve codegen for atomic ops

[SixWeining]

Summary

This PR improves memory barriers generated by atomic operations.

Memory barrier semantics of LL/SC:
LL: <memory-barrier> + <load-exclusive>
SC: <store-conditional> + <memory-barrier>

Changes:

1. Remove unnecessary memory barriers before LL and between LL/SC.
2. Fix acquire semantics. (If the SC instruction is not executed, then acquire semantics cannot be guaranteed. So, acquire barrier need to be generated when memory ordering has acquire.)

[hev]

llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp

583

Request to update in D151655

[xry111]

I'll see if a similar change is desired for GCC too.

[SixWeining]

Landed as https://github.com/llvm/llvm-project/commit/203ba238e33c570dba6cbcf247f1668bb2a13c26.