It appears clang likes to test the placement of bitfield access units by inspecting the llvmIR, rather than directly checking a record layout dump. That's a little indirect.
This augments 4 existing tests to do the latter as well. It appears the record dump can get intermixed with the IR on stdout, due to buffering, so this does the two checks in two separate checks. The new test Layout/aapcs-bitfield-placement.c, is the same test as CodeGen/aapcs-bitfield.c, but just checks the bitfield access units. (as the latter is using update_cc_test_checks.py I cloned the source)
The motivation behind this is (a) D157914, which refactors the existing algorithm, but also (b) the thread at https://discourse.llvm.org/t/targetinfo-for-unaligned-load-capability/72832, where any change needs to be clear as to what it is changing.