Details
Diff Detail
Event Timeline
lib/Target/AMDGPU/CIInstructions.td | ||
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129 | missing spaces after , | |
lib/Target/AMDGPU/SIInstrInfo.td | ||
2598 | Why do these have different names? For TFE at least I'm pretty sure we will need separate opcodes for them, but I guess it can stay for now. | |
test/MC/AMDGPU/flat.s | ||
4–8 | I noticed this before. Can you file a bug for this |
lib/Target/AMDGPU/SIInstrInfo.td | ||
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2598 | The assembler needs to know the full list of optional operands when parsing, so glc_flat, slc_flat, tfe_flat all map to the same list of optional operands. The optional operands are different for flat than mubuf, which is why they need a different operand type. | |
test/MC/AMDGPU/flat.s | ||
4–10 | This is a bug in the AMDGPU backend and how we implement optional operands. I have an idea for generic optional operand handling which should fix this an simplify a number of things in the assembler. |
LGTM
lib/Target/AMDGPU/SIInstrInfo.td | ||
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2598 | I don't get why this would matter. We already have some instructions that may or may not have clamp etc. |
lib/Target/AMDGPU/SIInstrInfo.td | ||
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2598 | The difference is, for flat there are 3 possible optional args: glc,slc,tfe, but for flat atomic there are only two optional args: slc, tfe. so the operand sets need to have different names. |
missing spaces after ,