[ELF] - improved relocation-copy.s test (added R_X86_64_32 relocations)

[grimar]

Summary

• Added instructions to generate R_X86_64_32 relocations. Without that next part of code was uncovered by test, code worked without it:

bool X86_64TargetInfo::relocNeedsPlt(uint32_t Type, const SymbolBody &S) const {
  if (needsCopyRel(Type, S))
    return false;

• Removed -e main, added _start

[ruiu]

LGTM

test/ELF/relocation-copy.s

 // REQUIRES: x86
 // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t.o
 // RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %p/Inputs/relocation-copy.s -o %t2.o
 // RUN: ld.lld -shared %t2.o -o %t.so
-// RUN: ld.lld -e main %t.o %t.so -o %t3
+// RUN: ld.lld %t.o %t.so -o %t3
 // RUN: llvm-readobj -s -r --expand-relocs %t3 | FileCheck %s
 // RUN: llvm-objdump -d %t3 | FileCheck -check-prefix=CODE %s
 
 .text
-.globl main
-.align 16, 0x90
-.type main,@function
-main:
+.global _start
+_start:
 movl $5, x
 movl $7, y
 movl $9, z
+movl $x, %edx
+movl $y, %edx
+movl $z, %edx
 
 // CHECK:      Name: .bss
 // CHECK-NEXT:  Type: SHT_NOBITS (0x8)
 // CHECK-NEXT:  Flags [ (0x3)
 // CHECK-NEXT:   SHF_ALLOC (0x2)
 // CHECK-NEXT:   SHF_WRITE (0x1)
 // CHECK-NEXT:  ]
 // CHECK-NEXT:  Address: 0x120A0

 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // 73888 = 0x120A0
 // 16 is alignment here
 // 73904 = 0x120A0 + 16
 // 73908 = 0x120A0 + 16 + 4
 // CODE: Disassembly of section .text:
-// CODE-NEXT: main:
+// CODE-NEXT: _start:
 // CODE-NEXT: 11000: c7 04 25 a0 20 01 00 05 00 00 00 movl $5, 73888
 // CODE-NEXT: 1100b: c7 04 25 b0 20 01 00 07 00 00 00 movl $7, 73904
 // CODE-NEXT: 11016: c7 04 25 b4 20 01 00 09 00 00 00 movl $9, 73908
+// CODE-NEXT: 11021: ba a0 20 01 00                   movl $73888, %edx
+// CODE-NEXT: 11026: ba b0 20 01 00                   movl $73904, %edx
+// CODE-NEXT: 1102b: ba b4 20 01 00                   movl $73908, %edx