This is an archive of the discontinued LLVM Phabricator instance.

Differential D153325

[CodeGen][test] Add missing `REQUIRES`.
ClosedPublic

Authored by fpetrogalli on Jun 20 2023, 2:57 AM.

Details

Reviewers
zjaffal
Commits
rGc7430ff9bfd3: [CodeGen][test] Add missing `REQUIRES`.

Diff Detail

Event Timeline

fpetrogalli created this revision.Jun 20 2023, 2:57 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 20 2023, 2:57 AM
fpetrogalli requested review of this revision.Jun 20 2023, 2:57 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 20 2023, 2:57 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
zjaffal accepted this revision.Jun 20 2023, 2:59 AM
zjaffal added a subscriber: zjaffal.

LGTM!

This revision is now accepted and ready to land.Jun 20 2023, 2:59 AM
This revision was landed with ongoing or failed builds.Jun 20 2023, 3:00 AM
Closed by commit rGc7430ff9bfd3: [CodeGen][test] Add missing `REQUIRES`. (authored by fpetrogalli). · Explain Why
This revision was automatically updated to reflect the committed changes.
fpetrogalli added a commit: rGc7430ff9bfd3: [CodeGen][test] Add missing `REQUIRES`..
Harbormaster completed remote builds in B239953: Diff 532843.Jun 20 2023, 6:28 AM

Revision Contents

PathSize
llvm/
test/
CodeGen/
AArch64/
2 lines

Diff 532844

llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir

# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon %s -o - 2>&1 \ # RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon %s -o - 2>&1 \
# RUN: -misched-dump-reserved-cycles=true \ # RUN: -misched-dump-reserved-cycles=true \
# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler \ # RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler \
# RUN: -misched-bottomup=true -sched-print-cycles=true \ # RUN: -misched-bottomup=true -sched-print-cycles=true \
# RUN: -misched-detail-resource-booking=true \ # RUN: -misched-detail-resource-booking=true \
# RUN: -misched-dump-schedule-trace=true -misched-dump-schedule-trace-col-header-width=21 \ # RUN: -misched-dump-schedule-trace=true -misched-dump-schedule-trace-col-header-width=21 \
# RUN: | FileCheck %s # RUN: | FileCheck %s
# REQUIRES: asserts, aarch64-registered-target
--- | --- |
; ModuleID = '../llvm-project/llvm/test/CodeGen/AArch64/aarch64-smull.failing.ll' ; ModuleID = '../llvm-project/llvm/test/CodeGen/AArch64/aarch64-smull.failing.ll'
source_filename = "../llvm-project/llvm/test/CodeGen/AArch64/aarch64-smull.failing.ll" source_filename = "../llvm-project/llvm/test/CodeGen/AArch64/aarch64-smull.failing.ll"
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-none-linux-gnu" target triple = "aarch64-none-linux-gnu"
define <8 x i32> @umull_and_v8i32(<8 x i16> %src1, <8 x i32> %src2) #0 { define <8 x i32> @umull_and_v8i32(<8 x i16> %src1, <8 x i32> %src2) #0 {
entry: entry:
▲ Show 20 Lines • Show All 1,602 Lines • Show Last 20 Lines