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Differential D151245

[InstCombine] Add regression test cases for bitreverse optimization; NFC
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Authored by austin880625 on May 23 2023, 12:58 PM.

Details

Reviewers
goldstein.w.n
RKSimon
Commits
rG1d1f7eeee6bf: [InstCombine] Add regression test cases for bitreverse optimization; NFC
Summary

Fold the following case on IR InstCombine pass. This patch includes the new test cases for this optimization

bitreverse(logic_op(x, bitreverse(y))) -> logic_op(bitreverse(x), y)
bitreverse(logic_op(bitreverse(x), y)) -> logic_op(x, bitreverse(y))
bitreverse(logic_op(bitreverse(x), bitreverse(y))) -> logic_op(x, y) with multi-use

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austin880625 created this revision.May 23 2023, 12:58 PM
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austin880625 requested review of this revision.May 23 2023, 12:58 PM
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austin880625 added a child revision: D151246: [InstCombine] Improve bitreverse optimization.May 23 2023, 1:01 PM
Harbormaster completed remote builds in B233959: Diff 524851.May 23 2023, 2:26 PM
goldstein.w.n accepted this revision.May 25 2023, 10:03 AM

LGTM.

This revision is now accepted and ready to land.May 25 2023, 10:03 AM
This revision was landed with ongoing or failed builds.May 25 2023, 11:41 AM
Closed by commit rG1d1f7eeee6bf: [InstCombine] Add regression test cases for bitreverse optimization; NFC (authored by austin880625, committed by goldstein.w.n). · Explain Why
This revision was automatically updated to reflect the committed changes.
goldstein.w.n added a commit: rG1d1f7eeee6bf: [InstCombine] Add regression test cases for bitreverse optimization; NFC.

Revision Contents

PathSize
llvm/
test/
Transforms/
InstCombine/
150 lines

Diff 525724

llvm/test/Transforms/InstCombine/bitreverse.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=instcombine -S | FileCheck %s ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
declare i16 @llvm.bitreverse.i16(i16)
declare i32 @llvm.bitreverse.i32(i32) declare i32 @llvm.bitreverse.i32(i32)
declare i64 @llvm.bitreverse.i64(i64)
declare <2 x i8> @llvm.bitreverse.v2i8(<2 x i8>) declare <2 x i8> @llvm.bitreverse.v2i8(<2 x i8>)
declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>)
declare void @use_i32(i32) declare void @use_i32(i32)
declare void @use_i64(i64)
;pairwise reverse ;pairwise reverse
;template <typename T> ;template <typename T>
;T reverse(T v) { ;T reverse(T v) {
; T s = sizeof(v) * 8; ; T s = sizeof(v) * 8;
; T mask = ~(T)0; ; T mask = ~(T)0;
; while ((s >>= 1) > 0) { ; while ((s >>= 1) > 0) {
; mask ^= (mask << s); ; mask ^= (mask << s);
▲ Show 20 Lines • Show All 346 Lines • ▼ Show 20 Lines
; ;
%X1_3 = zext i1 %X1_2 to i32 %X1_3 = zext i1 %X1_2 to i32
%X8_3x2x2x0 = call i32 @llvm.bitreverse.i32(i32 %X1_3) %X8_3x2x2x0 = call i32 @llvm.bitreverse.i32(i32 %X1_3)
%X8_4x2x3x0 = xor i32 %X8_3x2x2x0, -1 %X8_4x2x3x0 = xor i32 %X8_3x2x2x0, -1
%X0_3x2x4x0 = lshr i32 %X8_4x2x3x0, 31 %X0_3x2x4x0 = lshr i32 %X8_4x2x3x0, 31
%X0_3x2x5x0 = zext i32 %X0_3x2x4x0 to i64 %X0_3x2x5x0 = zext i32 %X0_3x2x4x0 to i64
ret i64 %X0_3x2x5x0 ret i64 %X0_3x2x5x0
} }
; Issue#62236
; Fold: BITREVERSE( OP( BITREVERSE(x), y ) ) -> OP( x, BITREVERSE(y) )
define i16 @rev_xor_lhs_rev16(i16 %a, i16 %b) #0 {
; CHECK-LABEL: @rev_xor_lhs_rev16(
; CHECK-NEXT: [[TMP1:%.*]] = tail call i16 @llvm.bitreverse.i16(i16 [[A:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = xor i16 [[TMP1]], [[B:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = tail call i16 @llvm.bitreverse.i16(i16 [[TMP2]])
; CHECK-NEXT: ret i16 [[TMP3]]
;
%1 = tail call i16 @llvm.bitreverse.i16(i16 %a)
%2 = xor i16 %1, %b
%3 = tail call i16 @llvm.bitreverse.i16(i16 %2)
ret i16 %3
}
define i32 @rev_and_rhs_rev32(i32 %a, i32 %b) #0 {
; CHECK-LABEL: @rev_and_rhs_rev32(
; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.bitreverse.i32(i32 [[B:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[A:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.bitreverse.i32(i32 [[TMP2]])
; CHECK-NEXT: ret i32 [[TMP3]]
;
%1 = tail call i32 @llvm.bitreverse.i32(i32 %b)
%2 = and i32 %a, %1
%3 = tail call i32 @llvm.bitreverse.i32(i32 %2)
ret i32 %3
}
define i32 @rev_or_rhs_rev32(i32 %a, i32 %b) #0 {
; CHECK-LABEL: @rev_or_rhs_rev32(
; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.bitreverse.i32(i32 [[B:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[A:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.bitreverse.i32(i32 [[TMP2]])
; CHECK-NEXT: ret i32 [[TMP3]]
;
%1 = tail call i32 @llvm.bitreverse.i32(i32 %b)
%2 = or i32 %a, %1
%3 = tail call i32 @llvm.bitreverse.i32(i32 %2)
ret i32 %3
}
define i64 @rev_or_rhs_rev64(i64 %a, i64 %b) #0 {
; CHECK-LABEL: @rev_or_rhs_rev64(
; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[B:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], [[A:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[TMP2]])
; CHECK-NEXT: ret i64 [[TMP3]]
;
%1 = tail call i64 @llvm.bitreverse.i64(i64 %b)
%2 = or i64 %a, %1
%3 = tail call i64 @llvm.bitreverse.i64(i64 %2)
ret i64 %3
}
define i64 @rev_xor_rhs_rev64(i64 %a, i64 %b) #0 {
; CHECK-LABEL: @rev_xor_rhs_rev64(
; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[B:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], [[A:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[TMP2]])
; CHECK-NEXT: ret i64 [[TMP3]]
;
%1 = tail call i64 @llvm.bitreverse.i64(i64 %b)
%2 = xor i64 %a, %1
%3 = tail call i64 @llvm.bitreverse.i64(i64 %2)
ret i64 %3
}
define <2 x i32> @rev_xor_rhs_i32vec(<2 x i32> %a, <2 x i32> %b) #0 {
; CHECK-LABEL: @rev_xor_rhs_i32vec(
; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> [[B:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = xor <2 x i32> [[TMP1]], [[A:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = tail call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> [[TMP2]])
; CHECK-NEXT: ret <2 x i32> [[TMP3]]
;
%1 = tail call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %b)
%2 = xor <2 x i32> %a, %1
%3 = tail call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %2)
ret <2 x i32> %3
}
define i64 @rev_and_rhs_rev64_multiuse1(i64 %a, i64 %b) #0 {
; CHECK-LABEL: @rev_and_rhs_rev64_multiuse1(
; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[B:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], [[A:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[TMP2]])
; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP2]], [[TMP3]]
; CHECK-NEXT: ret i64 [[TMP4]]
;
%1 = tail call i64 @llvm.bitreverse.i64(i64 %b)
%2 = and i64 %a, %1
%3 = tail call i64 @llvm.bitreverse.i64(i64 %2)
%4 = mul i64 %2, %3 ;increase use of logical op
ret i64 %4
}
define i64 @rev_and_rhs_rev64_multiuse2(i64 %a, i64 %b) #0 {
; CHECK-LABEL: @rev_and_rhs_rev64_multiuse2(
; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[B:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], [[A:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[TMP2]])
; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP1]], [[TMP3]]
; CHECK-NEXT: ret i64 [[TMP4]]
;
%1 = tail call i64 @llvm.bitreverse.i64(i64 %b)
%2 = and i64 %a, %1
%3 = tail call i64 @llvm.bitreverse.i64(i64 %2)
%4 = mul i64 %1, %3 ;increase use of inner bitreverse
ret i64 %4
}
define i64 @rev_all_operand64(i64 %a, i64 %b) #0 {
; CHECK-LABEL: @rev_all_operand64(
; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[A:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[B:%.*]])
; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[TMP4:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[TMP3]])
; CHECK-NEXT: ret i64 [[TMP4]]
;
%1 = tail call i64 @llvm.bitreverse.i64(i64 %a)
%2 = tail call i64 @llvm.bitreverse.i64(i64 %b)
%3 = and i64 %1, %2
%4 = tail call i64 @llvm.bitreverse.i64(i64 %3)
ret i64 %4
}
define i64 @rev_all_operand64_multiuse_both(i64 %a, i64 %b) #0 {
; CHECK-LABEL: @rev_all_operand64_multiuse_both(
; CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[A:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[B:%.*]])
; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[TMP4:%.*]] = tail call i64 @llvm.bitreverse.i64(i64 [[TMP3]])
; CHECK-NEXT: call void @use_i64(i64 [[TMP1]])
; CHECK-NEXT: call void @use_i64(i64 [[TMP2]])
; CHECK-NEXT: ret i64 [[TMP4]]
;
%1 = tail call i64 @llvm.bitreverse.i64(i64 %a)
%2 = tail call i64 @llvm.bitreverse.i64(i64 %b)
%3 = and i64 %1, %2
%4 = tail call i64 @llvm.bitreverse.i64(i64 %3)
call void @use_i64(i64 %1)
call void @use_i64(i64 %2)
ret i64 %4
}