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Differential D15104

Add support for fcomip, fucomip for Intel syntax
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Authored by myatsina on Dec 1 2015, 1:56 AM.

Details

Reviewers
rnk
mcrosier
Commits
rG90d9ffa7d6c0: [X86] Add support for fcomip, fucomip for Intel syntax
rL254595: [X86] Add support for fcomip, fucomip for Intel syntax
Summary

According to x86 spec, fcomip and fucomip should be supported for Intel syntax.

Diff Detail

Repository
rL LLVM

Event Timeline

myatsina updated this revision to Diff 41473.Dec 1 2015, 1:56 AM
myatsina retitled this revision from to Add support for fcomip, fucomip for Intel syntax.
myatsina updated this object.
myatsina added reviewers: rnk, mcrosier.
myatsina set the repository for this revision to rL LLVM.
myatsina added a subscriber: llvm-commits.
mcrosier added inline comments.Dec 1 2015, 6:08 AM
test/MC/X86/intel-syntax.s
740

Why is the mnemonic used in the inline asm different than the mnemonic emitted by llvm-mc (i.e., *ip vs *pi)?

myatsina added inline comments.Dec 1 2015, 8:05 AM
test/MC/X86/intel-syntax.s
740

Notice this test's output is in att syntax.
Also, the canonical form of the instruction was changed a while ago from "ip" to "pi" because of some bug in gas:
http://llvm.org/viewvc/llvm-project?view=revision&revision=118356

mcrosier edited edge metadata.Dec 1 2015, 8:53 AM

Got it, thanks. LGTM.

mcrosier accepted this revision.Dec 1 2015, 8:53 AM
mcrosier edited edge metadata.
This revision is now accepted and ready to land.Dec 1 2015, 8:53 AM
rnk accepted this revision.Dec 1 2015, 9:02 AM
rnk edited edge metadata.

Yup, lgtm

Closed by commit rL254595: [X86] Add support for fcomip, fucomip for Intel syntax (authored by myatsina). · Explain WhyDec 3 2015, 12:58 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
X86/
4 lines
test/
MC/
X86/
5 lines

Diff 41473

lib/Target/X86/X86InstrInfo.td

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// Floating point stack aliases. // Floating point stack aliases.
def : MnemonicAlias<"fcmovz", "fcmove", "att">; def : MnemonicAlias<"fcmovz", "fcmove", "att">;
def : MnemonicAlias<"fcmova", "fcmovnbe", "att">; def : MnemonicAlias<"fcmova", "fcmovnbe", "att">;
def : MnemonicAlias<"fcmovnae", "fcmovb", "att">; def : MnemonicAlias<"fcmovnae", "fcmovb", "att">;
def : MnemonicAlias<"fcmovna", "fcmovbe", "att">; def : MnemonicAlias<"fcmovna", "fcmovbe", "att">;
def : MnemonicAlias<"fcmovae", "fcmovnb", "att">; def : MnemonicAlias<"fcmovae", "fcmovnb", "att">;
def : MnemonicAlias<"fcomip", "fcompi", "att">; def : MnemonicAlias<"fcomip", "fcompi">;
def : MnemonicAlias<"fildq", "fildll", "att">; def : MnemonicAlias<"fildq", "fildll", "att">;
def : MnemonicAlias<"fistpq", "fistpll", "att">; def : MnemonicAlias<"fistpq", "fistpll", "att">;
def : MnemonicAlias<"fisttpq", "fisttpll", "att">; def : MnemonicAlias<"fisttpq", "fisttpll", "att">;
def : MnemonicAlias<"fldcww", "fldcw", "att">; def : MnemonicAlias<"fldcww", "fldcw", "att">;
def : MnemonicAlias<"fnstcww", "fnstcw", "att">; def : MnemonicAlias<"fnstcww", "fnstcw", "att">;
def : MnemonicAlias<"fnstsww", "fnstsw", "att">; def : MnemonicAlias<"fnstsww", "fnstsw", "att">;
def : MnemonicAlias<"fucomip", "fucompi", "att">; def : MnemonicAlias<"fucomip", "fucompi">;
def : MnemonicAlias<"fwait", "wait">; def : MnemonicAlias<"fwait", "wait">;
def : MnemonicAlias<"fxsaveq", "fxsave64", "att">; def : MnemonicAlias<"fxsaveq", "fxsave64", "att">;
def : MnemonicAlias<"fxrstorq", "fxrstor64", "att">; def : MnemonicAlias<"fxrstorq", "fxrstor64", "att">;
def : MnemonicAlias<"xsaveq", "xsave64", "att">; def : MnemonicAlias<"xsaveq", "xsave64", "att">;
def : MnemonicAlias<"xrstorq", "xrstor64", "att">; def : MnemonicAlias<"xrstorq", "xrstor64", "att">;
def : MnemonicAlias<"xsaveoptq", "xsaveopt64", "att">; def : MnemonicAlias<"xsaveoptq", "xsaveopt64", "att">;
def : MnemonicAlias<"xrstorsq", "xrstors64", "att">; def : MnemonicAlias<"xrstorsq", "xrstors64", "att">;
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test/MC/X86/intel-syntax.s

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// CHECK: comiss (%eax), %xmm0 // CHECK: comiss (%eax), %xmm0
// CHECK: vcomisd (%eax), %xmm0 // CHECK: vcomisd (%eax), %xmm0
// CHECK: vcomiss (%eax), %xmm0 // CHECK: vcomiss (%eax), %xmm0
fbld tbyte ptr [eax] fbld tbyte ptr [eax]
fbstp tbyte ptr [eax] fbstp tbyte ptr [eax]
// CHECK: fbld (%eax) // CHECK: fbld (%eax)
// CHECK: fbstp (%eax) // CHECK: fbstp (%eax)
fcomip st, st(2)
mcrosierUnsubmitted
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Why is the mnemonic used in the inline asm different than the mnemonic emitted by llvm-mc (i.e., *ip vs *pi)?

mcrosier: Why is the mnemonic used in the inline asm different than the mnemonic emitted by llvm-mc (i.e.
myatsinaAuthorUnsubmitted
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Notice this test's output is in att syntax.
Also, the canonical form of the instruction was changed a while ago from "ip" to "pi" because of some bug in gas:
http://llvm.org/viewvc/llvm-project?view=revision&revision=118356

myatsina: Notice this test's output is in att syntax. Also, the canonical form of the instruction was…
fucomip st, st(2)
// CHECK: fcompi %st(2)
// CHECK: fucompi %st(2)