[BPF] Make sure ALU32 feature is set in MCSubtargetInfo for mcpu=v3

[eddyz87]

Summary

BPF.td is used to generate (among other things) MCSubtargetInfo
setup function for BPF target.
Specifically, the BPFGenSubtargetInfo.inc file:

enum {
  ALU32 = 0,
  ...
};
...
extern const llvm::SubtargetSubTypeKV BPFSubTypeKV[] = {
  { "generic", { { { 0x0ULL, ... } } }, ... },
  { "probe",   { { { 0x0ULL, ... } } }, ... },
  { "v1",      { { { 0x0ULL, ... } } }, ... },
  { "v2",      { { { 0x0ULL, ... } } }, ... },
  { "v3",      { { { 0x1ULL, ... } } }, ... },
};
...
static inline MCSubtargetInfo *createBPFMCSubtargetInfoImpl(...) {
  return new BPFGenMCSubtargetInfo(..., BPFSubTypeKV, ...);
}

The SubtargetSubTypeKV is defined in MCSubtargetInfo.h as:

/// Used to provide key value pairs for feature and CPU bit flags.
struct SubtargetSubTypeKV {
  const char *Key;                      ///< K-V key string
  FeatureBitArray Implies;              ///< K-V bit mask
  FeatureBitArray TuneImplies;          ///< K-V bit mask
  const MCSchedModel *SchedModel;
  ...
}

The first bit array specifies features enabled by default for a
specific CPU. This commit makes sure that this information is
communicated to tablegen and correct BPFSubTypeKV table is
generated. This allows tools like objdump to detect available
features when --mcpu flag is specified.

[eddyz87]

Hi Yonghong,

could you please take a look?

[yonghong-song]

LGTM. Thanks!

llvm/lib/Target/BPF/BPF.td

 include "BPFCallingConv.td"
 include "BPFInstrInfo.td"
 
 def BPFInstrInfo : InstrInfo;
 
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, NoItineraries, Features>;
 
-def : Proc<"generic", []>;
-def : Proc<"v1", []>;
-def : Proc<"v2", []>;
-def : Proc<"v3", []>;
-def : Proc<"probe", []>;
-
 def DummyFeature : SubtargetFeature<"dummy", "isDummyMode",
                                     "true", "unused feature">;
 
 def ALU32 : SubtargetFeature<"alu32", "HasAlu32", "true",
                              "Enable ALU32 instructions">;
 
 def DwarfRIS: SubtargetFeature<"dwarfris", "UseDwarfRIS", "true",
                                "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections">;
 
+def : Proc<"generic", []>;
+def : Proc<"v1", []>;
+def : Proc<"v2", []>;
+def : Proc<"v3", [ALU32]>;
+def : Proc<"probe", []>;
+
 def BPFInstPrinter : AsmWriter {
   string AsmWriterClassName  = "InstPrinter";
   bit isMCAsmWriter = 1;
 }
 
 def BPFAsmParser : AsmParser {
   bit HasMnemonicFirst = 0;
 }

llvm/test/CodeGen/BPF/disassemble-mcpu-v3.s

+// Make sure that llvm-objdump --mcpu=v3 enables ALU32 feature.
+//
+// Only test a few instructions here, assembler-disassembler.s is more
+// comprehensive but uses --mattr=+alu32 option.
+//
+// RUN: llvm-mc -triple bpfel --mcpu=v3 --assemble --filetype=obj %s -o %t
+// RUN: llvm-objdump -d --mcpu=v2 %t | FileCheck %s --check-prefix=V2
+// RUN: llvm-objdump -d --mcpu=v3 %t | FileCheck %s --check-prefix=V3
+
+w0 = *(u32 *)(r1 + 0)
+lock *(u32 *)(r1 + 0x1) &= w2
+
+
+// V2: 61 10 00 00 00 00 00 00  r0 = *(u32 *)(r1 + 0x0)
+// V2: c3 21 01 00 50 00 00 00  <unknown>
+
+// V3: 61 10 00 00 00 00 00 00  w0 = *(u32 *)(r1 + 0x0)
+// V3: c3 21 01 00 50 00 00 00  lock *(u32 *)(r1 + 0x1) &= w2