Fix format for `case` in .proto files

[fowles]

Summary

Fix format for case in .proto files

[echristo]

LGTM, thanks!

[krasimir]

clang/test/Format/case.proto

15 ↗

(On Diff #488390)

could you please turn this into an unit test here instead > https://github.com/llvm/llvm-project/blob/main/clang/unittests/Format/FormatTestProto.cpp.

[fowles]

Move from lit test to unit test

[krasimir]

Thank you!

clang/lib/Format/UnwrappedLineParser.cpp

case tok::kw_default: {
         // an identifier.
         parseStructuralElement();
         break;
       }
       // Else, if it is 'default:', fall through to the case handling.
       [[fallthrough]];
     }
     case tok::kw_case:
-      if (Style.isVerilog() ||
+      if (Style.isProto() || Style.isVerilog() ||
           (Style.isJavaScript() && Line->MustBeDeclaration)) {
+        // Proto: there are no switch/case statements
         // Verilog: Case labels don't have this word. We handle case
         // labels including default in TokenAnnotator.
         // JavaScript: A 'case: string' style field declaration.
         ParseDefault();
         break;
       }
       if (!SwitchLabelEncountered &&
           (Style.IndentCaseLabels ||
case tok::kw_default:
     nextToken();
     if (FormatTok->is(tok::colon)) {
       parseLabel();
       return;
     }
     // e.g. "default void f() {}" in a Java interface.
     break;
   case tok::kw_case:
-    // In Verilog switch is called case.
+    // Proto: there are no switch/case statements.
+    if (Style.isProto()) {
+      nextToken();
+      return;
+    }
     if (Style.isVerilog()) {
       parseBlock();
       addUnwrappedLine();
       return;
     }
     if (Style.isJavaScript() && Line->MustBeDeclaration) {
       // 'case: string' field declaration.
       nextToken();
case tok::equal:
       break;
     case tok::l_square:
       parseSquare();
       break;
     case tok::kw_new:
       parseNew();
       break;
     case tok::kw_case:
+      // Proto: there are no switch/case statements.
+      if (Style.isProto()) {
+        nextToken();
+        return;
+      }
       // In Verilog switch is called case.
       if (Style.isVerilog()) {
         parseBlock();
         addUnwrappedLine();
         return;
       }
       if (Style.isJavaScript() && Line->MustBeDeclaration) {
         // 'case: string' field declaration.

clang/unittests/Format/FormatTestProto.cpp

 }
 
 TEST_F(FormatTestProto, EnumAsFieldName) {
   verifyFormat("message SomeMessage {\n"
                "  required int32 enum = 1;\n"
                "}");
 }
 
+TEST_F(FormatTestProto, CaseAsFieldName) {
+  verifyFormat("message SomeMessage {\n"
+               "  required string case = 1;\n"
+               "  repeated int32 fizz = 2;\n"
+               "}");
+}
+
 TEST_F(FormatTestProto, UnderstandsReturns) {
   verifyFormat("rpc Search(SearchRequest) returns (SearchResponse);");
 }
 
 TEST_F(FormatTestProto, MessageFieldAttributes) {
   verifyFormat("optional string test = 1 [default = \"test\"];");
   verifyFormat("optional bool a = 1 [default = true, deprecated = true];");
   verifyFormat("optional LongMessageType long_proto_field = 1 [\n"