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Differential D138896

[AArch64] Unit tests for multiple back-to-back zext lowering to tbl for vectors
AbandonedPublic

Authored by nilanjana_basu on Nov 28 2022, 10:39 PM.

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Diff Detail

Unit TestsFailed

TimeTest
270 msx64 debian > LLVM.Examples/OrcV2Examples::lljit-with-thinlto-summaries.test
60,050 msx64 debian > libFuzzer.libFuzzer::fuzzer-leak.test
60,040 msx64 debian > libFuzzer.libFuzzer::minimize_crash.test
60,030 msx64 debian > libFuzzer.libFuzzer::value-profile-load.test

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nilanjana_basu created this revision.Nov 28 2022, 10:39 PM
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nilanjana_basu requested review of this revision.Nov 28 2022, 10:39 PM
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Harbormaster completed remote builds in B199934: Diff 478459.Nov 28 2022, 10:40 PM
nilanjana_basu updated this revision to Diff 478460.Nov 28 2022, 10:42 PM

Trying to fix patching error due to local parent commits

Herald added a subscriber: hiraditya. · View Herald TranscriptNov 28 2022, 10:42 PM
Harbormaster completed remote builds in B199935: Diff 478460.Nov 28 2022, 11:33 PM
nilanjana_basu added a parent revision: D136722: [AArch64] Extending lowering of 'zext <Y x i8> %x to <Y x i8X>' to use tbl instructions.Nov 29 2022, 1:57 AM
nilanjana_basu updated this revision to Diff 478488.Nov 29 2022, 2:17 AM

Trying to patch due to review dependency

nilanjana_basu updated this revision to Diff 478497.Nov 29 2022, 2:47 AM

Updating labels after rebasing

Harbormaster completed remote builds in B199965: Diff 478497.Nov 29 2022, 3:38 AM
nilanjana_basu removed a parent revision: D136722: [AArch64] Extending lowering of 'zext <Y x i8> %x to <Y x i8X>' to use tbl instructions.Nov 29 2022, 7:40 AM
nilanjana_basu abandoned this revision.Nov 29 2022, 11:14 AM

Revision Contents

PathSize
llvm/
test/
CodeGen/
AArch64/
786 lines

Diff 478497

llvm/test/CodeGen/AArch64/zext-to-tbl.ll

Show First 20 Lines • Show All 2,541 Lines • ▼ Show 20 Linesloop:
%iv.next = add nuw i64 %iv, 16 %iv.next = add nuw i64 %iv, 16
%ec = icmp eq i64 %iv.next, 128 %ec = icmp eq i64 %iv.next, 128
br i1 %ec, label %exit, label %loop br i1 %ec, label %exit, label %loop
exit: exit:
ret void ret void
} }
; CHECK-LABEL: lCPI17_0:
; CHECK-NEXT: .byte 4 ; 0x4
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 5 ; 0x5
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI17_1:
; CHECK-NEXT: .byte 6 ; 0x6
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 7 ; 0x7
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI17_2:
; CHECK-NEXT: .byte 0 ; 0x0
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 1 ; 0x1
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI17_3:
; CHECK-NEXT: .byte 2 ; 0x2
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 3 ; 0x3
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-BE-LABEL: .LCPI17_0:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 2 // 0x2
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 3 // 0x3
; CHECK-BE-NEXT: .LCPI17_1:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 0 // 0x0
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 1 // 0x1
; CHECK-BE-NEXT: .LCPI17_2:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 6 // 0x6
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 7 // 0x7
; CHECK-BE-NEXT: .LCPI17_3:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 4 // 0x4
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 5
define void @zext_v8i8_to_v8i64_with_add_in_sequence_in_loop(i8* %src, i64* %dst) {
; CHECK-LABEL: _zext_v8i8_to_v8i64_with_add_in_sequence_in_loop:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: Lloh60:
; CHECK-NEXT: adrp x9, lCPI17_0@PAGE
; CHECK-NEXT: Lloh61:
; CHECK-NEXT: adrp x10, lCPI17_1@PAGE
; CHECK-NEXT: Lloh62:
; CHECK-NEXT: adrp x11, lCPI17_2@PAGE
; CHECK-NEXT: Lloh63:
; CHECK-NEXT: adrp x12, lCPI17_3@PAGE
; CHECK-NEXT: mov x8, xzr
; CHECK-NEXT: Lloh64:
; CHECK-NEXT: ldr q0, [x9, lCPI17_0@PAGEOFF]
; CHECK-NEXT: add x9, x0, #8
; CHECK-NEXT: Lloh65:
; CHECK-NEXT: ldr q1, [x10, lCPI17_1@PAGEOFF]
; CHECK-NEXT: Lloh66:
; CHECK-NEXT: ldr q2, [x11, lCPI17_2@PAGEOFF]
; CHECK-NEXT: Lloh67:
; CHECK-NEXT: ldr q3, [x12, lCPI17_3@PAGEOFF]
; CHECK-NEXT: LBB17_1: ; %loop
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
; CHECK-NEXT: add x10, x1, x8
; CHECK-NEXT: add x8, x8, #128
; CHECK-NEXT: ldp d4, d5, [x9, #-8]
; CHECK-NEXT: add x9, x9, #16
; CHECK-NEXT: cmp x8, #1024
; CHECK-NEXT: ldp q7, q17, [x10, #32]
; CHECK-NEXT: tbl.16b v6, { v4 }, v0
; CHECK-NEXT: tbl.16b v16, { v4 }, v1
; CHECK-NEXT: tbl.16b v18, { v4 }, v2
; CHECK-NEXT: tbl.16b v4, { v4 }, v3
; CHECK-NEXT: ldp q19, q20, [x10]
; CHECK-NEXT: tbl.16b v21, { v5 }, v0
; CHECK-NEXT: tbl.16b v23, { v5 }, v1
; CHECK-NEXT: tbl.16b v25, { v5 }, v2
; CHECK-NEXT: tbl.16b v5, { v5 }, v3
; CHECK-NEXT: add.2d v6, v7, v6
; CHECK-NEXT: ldp q22, q24, [x10, #96]
; CHECK-NEXT: add.2d v7, v17, v16
; CHECK-NEXT: add.2d v16, v19, v18
; CHECK-NEXT: add.2d v4, v20, v4
; CHECK-NEXT: stp q6, q7, [x10, #32]
; CHECK-NEXT: add.2d v6, v22, v21
; CHECK-NEXT: stp q16, q4, [x10]
; CHECK-NEXT: ldp q26, q27, [x10, #64]
; CHECK-NEXT: add.2d v7, v24, v23
; CHECK-NEXT: stp q6, q7, [x10, #96]
; CHECK-NEXT: add.2d v4, v27, v5
; CHECK-NEXT: add.2d v5, v26, v25
; CHECK-NEXT: stp q5, q4, [x10, #64]
; CHECK-NEXT: b.ne LBB17_1
; CHECK-NEXT: ; %bb.2: ; %exit
; CHECK-NEXT: ret
; CHECK-NEXT: .loh AdrpLdr Lloh63, Lloh67
; CHECK-NEXT: .loh AdrpLdr Lloh62, Lloh66
; CHECK-NEXT: .loh AdrpLdr Lloh61, Lloh65
; CHECK-NEXT: .loh AdrpLdr Lloh60, Lloh64
; CHECK-BE-LABEL: zext_v8i8_to_v8i64_with_add_in_sequence_in_loop:
; CHECK-BE: // %bb.0: // %entry
; CHECK-BE-NEXT: adrp x9, .LCPI17_0
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI17_0
; CHECK-BE-NEXT: mov x8, xzr
; CHECK-BE-NEXT: ld1 { v0.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI17_1
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI17_1
; CHECK-BE-NEXT: ld1 { v1.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI17_2
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI17_2
; CHECK-BE-NEXT: ld1 { v2.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI17_3
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI17_3
; CHECK-BE-NEXT: ld1 { v3.16b }, [x9]
; CHECK-BE-NEXT: add x9, x0, #8
; CHECK-BE-NEXT: .LBB17_1: // %loop
; CHECK-BE-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-BE-NEXT: sub x12, x9, #8
; CHECK-BE-NEXT: add x10, x1, x8
; CHECK-BE-NEXT: add x11, x10, #32
; CHECK-BE-NEXT: ld1 { v4.8b }, [x9]
; CHECK-BE-NEXT: add x13, x10, #48
; CHECK-BE-NEXT: add x14, x10, #16
; CHECK-BE-NEXT: ld1 { v6.8b }, [x12]
; CHECK-BE-NEXT: add x15, x10, #96
; CHECK-BE-NEXT: ld1 { v5.2d }, [x11]
; CHECK-BE-NEXT: add x12, x10, #112
; CHECK-BE-NEXT: tbl v16.16b, { v4.16b }, v2.16b
; CHECK-BE-NEXT: add x16, x10, #64
; CHECK-BE-NEXT: tbl v17.16b, { v4.16b }, v3.16b
; CHECK-BE-NEXT: add x17, x10, #80
; CHECK-BE-NEXT: tbl v19.16b, { v6.16b }, v3.16b
; CHECK-BE-NEXT: ld1 { v7.2d }, [x13]
; CHECK-BE-NEXT: tbl v20.16b, { v6.16b }, v2.16b
; CHECK-BE-NEXT: add x8, x8, #128
; CHECK-BE-NEXT: tbl v22.16b, { v6.16b }, v1.16b
; CHECK-BE-NEXT: ld1 { v21.2d }, [x14]
; CHECK-BE-NEXT: tbl v6.16b, { v6.16b }, v0.16b
; CHECK-BE-NEXT: add x9, x9, #16
; CHECK-BE-NEXT: rev64 v19.16b, v19.16b
; CHECK-BE-NEXT: ld1 { v18.2d }, [x10]
; CHECK-BE-NEXT: tbl v24.16b, { v4.16b }, v1.16b
; CHECK-BE-NEXT: cmp x8, #1024
; CHECK-BE-NEXT: tbl v4.16b, { v4.16b }, v0.16b
; CHECK-BE-NEXT: ld1 { v23.2d }, [x15]
; CHECK-BE-NEXT: rev64 v20.16b, v20.16b
; CHECK-BE-NEXT: rev64 v6.16b, v6.16b
; CHECK-BE-NEXT: ld1 { v25.2d }, [x12]
; CHECK-BE-NEXT: rev64 v22.16b, v22.16b
; CHECK-BE-NEXT: ld1 { v26.2d }, [x16]
; CHECK-BE-NEXT: rev64 v17.16b, v17.16b
; CHECK-BE-NEXT: ld1 { v27.2d }, [x17]
; CHECK-BE-NEXT: rev64 v16.16b, v16.16b
; CHECK-BE-NEXT: rev64 v24.16b, v24.16b
; CHECK-BE-NEXT: rev64 v4.16b, v4.16b
; CHECK-BE-NEXT: add v5.2d, v5.2d, v19.2d
; CHECK-BE-NEXT: add v7.2d, v7.2d, v20.2d
; CHECK-BE-NEXT: st1 { v5.2d }, [x11]
; CHECK-BE-NEXT: add v5.2d, v21.2d, v6.2d
; CHECK-BE-NEXT: st1 { v7.2d }, [x13]
; CHECK-BE-NEXT: add v18.2d, v18.2d, v22.2d
; CHECK-BE-NEXT: add v6.2d, v23.2d, v17.2d
; CHECK-BE-NEXT: st1 { v5.2d }, [x14]
; CHECK-BE-NEXT: add v7.2d, v25.2d, v16.2d
; CHECK-BE-NEXT: st1 { v18.2d }, [x10]
; CHECK-BE-NEXT: add v4.2d, v27.2d, v4.2d
; CHECK-BE-NEXT: st1 { v6.2d }, [x15]
; CHECK-BE-NEXT: add v5.2d, v26.2d, v24.2d
; CHECK-BE-NEXT: st1 { v7.2d }, [x12]
; CHECK-BE-NEXT: st1 { v4.2d }, [x17]
; CHECK-BE-NEXT: st1 { v5.2d }, [x16]
; CHECK-BE-NEXT: b.ne .LBB17_1
; CHECK-BE-NEXT: // %bb.2: // %exit
; CHECK-BE-NEXT: ret
entry:
br label %loop
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
%src.gep = getelementptr i8, i8* %src, i64 %iv
%src.gep.cast = bitcast i8* %src.gep to <8 x i8>*
%load = load <8 x i8>, <8 x i8>* %src.gep.cast
%src.gep.2 = getelementptr i8, i8* %src.gep, i64 8
%src.gep.cast.2 = bitcast i8* %src.gep.2 to <8 x i8>*
%load.2 = load <8 x i8>, <8 x i8>* %src.gep.cast.2
%ext = zext <8 x i8> %load to <8 x i64>
%ext.2 = zext <8 x i8> %load.2 to <8 x i64>
%dst.gep = getelementptr i64, i64* %dst, i64 %iv
%dst.gep.cast = bitcast i64* %dst.gep to <8 x i64>*
%load.dst = load <8 x i64>, <8 x i64>* %dst.gep.cast
%dst.gep.2 = getelementptr i64, i64* %dst.gep, i64 8
%dst.gep.cast.2 = bitcast i64* %dst.gep.2 to <8 x i64>*
%load.dst.2 = load <8 x i64>, <8 x i64>* %dst.gep.cast.2
%sum = add <8 x i64> %load.dst, %ext
%sum.2 = add <8 x i64> %load.dst.2, %ext.2
%dst.gep.cast.3 = bitcast i64* %dst.gep to <8 x i64>*
store <8 x i64> %sum, <8 x i64>* %dst.gep.cast.3
%dst.gep.cast.4 = bitcast i64* %dst.gep.2 to <8 x i64>*
store <8 x i64> %sum.2, <8 x i64>* %dst.gep.cast.4
%iv.next = add nuw i64 %iv, 16
%ec = icmp eq i64 %iv.next, 128
br i1 %ec, label %exit, label %loop
exit:
ret void
}
; CHECK-LABEL: lCPI18_0:
; CHECK-NEXT: .byte 0 ; 0x0
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 1 ; 0x1
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI18_1:
; CHECK-NEXT: .byte 2 ; 0x2
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 3 ; 0x3
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI18_2:
; CHECK-NEXT: .byte 4 ; 0x4
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 5 ; 0x5
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI18_3:
; CHECK-NEXT: .byte 6 ; 0x6
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 7 ; 0x7
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI18_4:
; CHECK-NEXT: .byte 8 ; 0x8
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 9 ; 0x9
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI18_5:
; CHECK-NEXT: .byte 10 ; 0xa
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 11 ; 0xb
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI18_6:
; CHECK-NEXT: .byte 12 ; 0xc
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 13 ; 0xd
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: lCPI18_7:
; CHECK-NEXT: .byte 14 ; 0xe
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 15 ; 0xf
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-NEXT: .byte 255 ; 0xff
; CHECK-BE-LABEL: .LCPI18_0:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 0 // 0x0
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 1 // 0x1
; CHECK-BE-NEXT: .LCPI18_1:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 2 // 0x2
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 3 // 0x3
; CHECK-BE-NEXT: .LCPI18_2:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 4 // 0x4
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 5 // 0x5
; CHECK-BE-NEXT: .LCPI18_3:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 6 // 0x6
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 7 // 0x7
; CHECK-BE-NEXT: .LCPI18_4:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 8 // 0x8
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 9 // 0x9
; CHECK-BE-NEXT: .LCPI18_5:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 10 // 0xa
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 11 // 0xb
; CHECK-BE-NEXT: .LCPI18_6:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 12 // 0xc
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 13 // 0xd
; CHECK-BE-NEXT: .LCPI18_7:
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 14 // 0xe
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 255 // 0xff
; CHECK-BE-NEXT: .byte 15 // 0xf
define void @zext_v16i8_to_v16i64_in_sequence_in_loop(i8* %src, i64* %dst) {
; CHECK-LABEL: _zext_v16i8_to_v16i64_in_sequence_in_loop:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: Lloh68:
; CHECK-NEXT: adrp x9, lCPI18_0@PAGE
; CHECK-NEXT: Lloh69:
; CHECK-NEXT: adrp x10, lCPI18_1@PAGE
; CHECK-NEXT: Lloh70:
; CHECK-NEXT: adrp x11, lCPI18_2@PAGE
; CHECK-NEXT: mov x8, xzr
; CHECK-NEXT: Lloh71:
; CHECK-NEXT: ldr q0, [x9, lCPI18_0@PAGEOFF]
; CHECK-NEXT: Lloh72:
; CHECK-NEXT: adrp x9, lCPI18_3@PAGE
; CHECK-NEXT: Lloh73:
; CHECK-NEXT: ldr q1, [x10, lCPI18_1@PAGEOFF]
; CHECK-NEXT: Lloh74:
; CHECK-NEXT: adrp x10, lCPI18_4@PAGE
; CHECK-NEXT: Lloh75:
; CHECK-NEXT: ldr q2, [x11, lCPI18_2@PAGEOFF]
; CHECK-NEXT: Lloh76:
; CHECK-NEXT: adrp x11, lCPI18_5@PAGE
; CHECK-NEXT: Lloh77:
; CHECK-NEXT: ldr q3, [x9, lCPI18_3@PAGEOFF]
; CHECK-NEXT: Lloh78:
; CHECK-NEXT: adrp x9, lCPI18_6@PAGE
; CHECK-NEXT: Lloh79:
; CHECK-NEXT: ldr q4, [x10, lCPI18_4@PAGEOFF]
; CHECK-NEXT: Lloh80:
; CHECK-NEXT: adrp x10, lCPI18_7@PAGE
; CHECK-NEXT: Lloh81:
; CHECK-NEXT: ldr q5, [x11, lCPI18_5@PAGEOFF]
; CHECK-NEXT: Lloh82:
; CHECK-NEXT: ldr q6, [x9, lCPI18_6@PAGEOFF]
; CHECK-NEXT: add x9, x1, #128
; CHECK-NEXT: Lloh83:
; CHECK-NEXT: ldr q7, [x10, lCPI18_7@PAGEOFF]
; CHECK-NEXT: LBB18_1: ; %loop
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
; CHECK-NEXT: add x10, x0, x8
; CHECK-NEXT: add x8, x8, #16
; CHECK-NEXT: cmp x8, #128
; CHECK-NEXT: ldp q16, q17, [x10]
; CHECK-NEXT: tbl.16b v18, { v16 }, v7
; CHECK-NEXT: tbl.16b v19, { v16 }, v6
; CHECK-NEXT: tbl.16b v20, { v16 }, v5
; CHECK-NEXT: tbl.16b v21, { v16 }, v4
; CHECK-NEXT: tbl.16b v22, { v16 }, v3
; CHECK-NEXT: stp q19, q18, [x9, #-32]
; CHECK-NEXT: tbl.16b v18, { v16 }, v2
; CHECK-NEXT: tbl.16b v19, { v16 }, v1
; CHECK-NEXT: stp q21, q20, [x9, #-64]
; CHECK-NEXT: tbl.16b v16, { v16 }, v0
; CHECK-NEXT: tbl.16b v20, { v17 }, v7
; CHECK-NEXT: tbl.16b v21, { v17 }, v6
; CHECK-NEXT: stp q18, q22, [x9, #-96]
; CHECK-NEXT: tbl.16b v18, { v17 }, v5
; CHECK-NEXT: stp q16, q19, [x9, #-128]
; CHECK-NEXT: tbl.16b v19, { v17 }, v4
; CHECK-NEXT: tbl.16b v16, { v17 }, v3
; CHECK-NEXT: stp q21, q20, [x9, #96]
; CHECK-NEXT: tbl.16b v20, { v17 }, v2
; CHECK-NEXT: tbl.16b v21, { v17 }, v1
; CHECK-NEXT: tbl.16b v17, { v17 }, v0
; CHECK-NEXT: stp q19, q18, [x9, #64]
; CHECK-NEXT: stp q20, q16, [x9, #32]
; CHECK-NEXT: stp q17, q21, [x9], #128
; CHECK-NEXT: b.ne LBB18_1
; CHECK-NEXT: ; %bb.2: ; %exit
; CHECK-NEXT: ret
; CHECK-NEXT: .loh AdrpLdr Lloh80, Lloh83
; CHECK-NEXT: .loh AdrpLdr Lloh78, Lloh82
; CHECK-NEXT: .loh AdrpLdr Lloh76, Lloh81
; CHECK-NEXT: .loh AdrpAdrp Lloh74, Lloh80
; CHECK-NEXT: .loh AdrpLdr Lloh74, Lloh79
; CHECK-NEXT: .loh AdrpAdrp Lloh72, Lloh78
; CHECK-NEXT: .loh AdrpLdr Lloh72, Lloh77
; CHECK-NEXT: .loh AdrpAdrp Lloh70, Lloh76
; CHECK-NEXT: .loh AdrpLdr Lloh70, Lloh75
; CHECK-NEXT: .loh AdrpAdrp Lloh69, Lloh74
; CHECK-NEXT: .loh AdrpLdr Lloh69, Lloh73
; CHECK-NEXT: .loh AdrpAdrp Lloh68, Lloh72
; CHECK-NEXT: .loh AdrpLdr Lloh68, Lloh71
; CHECK-BE-LABEL: zext_v16i8_to_v16i64_in_sequence_in_loop:
; CHECK-BE: // %bb.0: // %entry
; CHECK-BE-NEXT: adrp x9, .LCPI18_0
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI18_0
; CHECK-BE-NEXT: mov x8, xzr
; CHECK-BE-NEXT: ld1 { v0.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI18_1
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI18_1
; CHECK-BE-NEXT: ld1 { v1.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI18_2
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI18_2
; CHECK-BE-NEXT: ld1 { v2.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI18_3
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI18_3
; CHECK-BE-NEXT: ld1 { v3.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI18_4
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI18_4
; CHECK-BE-NEXT: ld1 { v4.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI18_5
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI18_5
; CHECK-BE-NEXT: ld1 { v5.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI18_6
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI18_6
; CHECK-BE-NEXT: ld1 { v6.16b }, [x9]
; CHECK-BE-NEXT: adrp x9, .LCPI18_7
; CHECK-BE-NEXT: add x9, x9, :lo12:.LCPI18_7
; CHECK-BE-NEXT: ld1 { v7.16b }, [x9]
; CHECK-BE-NEXT: add x9, x1, #128
; CHECK-BE-NEXT: .LBB18_1: // %loop
; CHECK-BE-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-BE-NEXT: add x10, x0, x8
; CHECK-BE-NEXT: sub x11, x9, #16
; CHECK-BE-NEXT: sub x12, x9, #32
; CHECK-BE-NEXT: add x8, x8, #16
; CHECK-BE-NEXT: cmp x8, #128
; CHECK-BE-NEXT: ld1 { v16.16b }, [x10]
; CHECK-BE-NEXT: add x10, x10, #16
; CHECK-BE-NEXT: ld1 { v17.16b }, [x10]
; CHECK-BE-NEXT: sub x10, x9, #48
; CHECK-BE-NEXT: tbl v18.16b, { v16.16b }, v7.16b
; CHECK-BE-NEXT: tbl v19.16b, { v16.16b }, v6.16b
; CHECK-BE-NEXT: tbl v20.16b, { v16.16b }, v5.16b
; CHECK-BE-NEXT: tbl v21.16b, { v16.16b }, v4.16b
; CHECK-BE-NEXT: st1 { v18.16b }, [x11]
; CHECK-BE-NEXT: sub x11, x9, #64
; CHECK-BE-NEXT: st1 { v19.16b }, [x12]
; CHECK-BE-NEXT: st1 { v20.16b }, [x10]
; CHECK-BE-NEXT: sub x10, x9, #80
; CHECK-BE-NEXT: tbl v18.16b, { v16.16b }, v0.16b
; CHECK-BE-NEXT: st1 { v21.16b }, [x11]
; CHECK-BE-NEXT: tbl v19.16b, { v16.16b }, v1.16b
; CHECK-BE-NEXT: sub x11, x9, #96
; CHECK-BE-NEXT: tbl v20.16b, { v16.16b }, v2.16b
; CHECK-BE-NEXT: tbl v16.16b, { v16.16b }, v3.16b
; CHECK-BE-NEXT: tbl v23.16b, { v17.16b }, v5.16b
; CHECK-BE-NEXT: tbl v21.16b, { v17.16b }, v0.16b
; CHECK-BE-NEXT: st1 { v20.16b }, [x11]
; CHECK-BE-NEXT: sub x11, x9, #128
; CHECK-BE-NEXT: st1 { v16.16b }, [x10]
; CHECK-BE-NEXT: sub x10, x9, #112
; CHECK-BE-NEXT: tbl v16.16b, { v17.16b }, v7.16b
; CHECK-BE-NEXT: st1 { v18.16b }, [x11]
; CHECK-BE-NEXT: add x11, x9, #96
; CHECK-BE-NEXT: st1 { v19.16b }, [x10]
; CHECK-BE-NEXT: add x10, x9, #112
; CHECK-BE-NEXT: tbl v19.16b, { v17.16b }, v6.16b
; CHECK-BE-NEXT: st1 { v21.16b }, [x9]
; CHECK-BE-NEXT: tbl v22.16b, { v17.16b }, v3.16b
; CHECK-BE-NEXT: st1 { v16.16b }, [x10]
; CHECK-BE-NEXT: add x10, x9, #80
; CHECK-BE-NEXT: tbl v16.16b, { v17.16b }, v4.16b
; CHECK-BE-NEXT: st1 { v19.16b }, [x11]
; CHECK-BE-NEXT: add x11, x9, #64
; CHECK-BE-NEXT: st1 { v23.16b }, [x10]
; CHECK-BE-NEXT: add x10, x9, #48
; CHECK-BE-NEXT: tbl v18.16b, { v17.16b }, v1.16b
; CHECK-BE-NEXT: tbl v17.16b, { v17.16b }, v2.16b
; CHECK-BE-NEXT: st1 { v16.16b }, [x11]
; CHECK-BE-NEXT: st1 { v22.16b }, [x10]
; CHECK-BE-NEXT: add x10, x9, #32
; CHECK-BE-NEXT: add x11, x9, #16
; CHECK-BE-NEXT: add x9, x9, #128
; CHECK-BE-NEXT: st1 { v17.16b }, [x10]
; CHECK-BE-NEXT: st1 { v18.16b }, [x11]
; CHECK-BE-NEXT: b.ne .LBB18_1
; CHECK-BE-NEXT: // %bb.2: // %exit
; CHECK-BE-NEXT: ret
entry:
br label %loop
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
%src.gep = getelementptr i8, i8* %src, i64 %iv
%src.gep.cast = bitcast i8* %src.gep to <16 x i8>*
%load = load <16 x i8>, <16 x i8>* %src.gep.cast
%src.gep.2 = getelementptr i8, i8* %src.gep, i64 16
%src.gep.cast.2 = bitcast i8* %src.gep.2 to <16 x i8>*
%load.2 = load <16 x i8>, <16 x i8>* %src.gep.cast.2
%ext = zext <16 x i8> %load to <16 x i64>
%ext.2 = zext <16 x i8> %load.2 to <16 x i64>
%dst.gep = getelementptr i64, i64* %dst, i64 %iv
%dst.gep.cast = bitcast i64* %dst.gep to <16 x i64>*
store <16 x i64> %ext, <16 x i64>* %dst.gep.cast
%dst.gep.2 = getelementptr i64, i64* %dst.gep, i64 16
%dst.gep.cast.2 = bitcast i64* %dst.gep.2 to <16 x i64>*
store <16 x i64> %ext.2, <16 x i64>* %dst.gep.cast.2
%iv.next = add nuw i64 %iv, 16
%ec = icmp eq i64 %iv.next, 128
br i1 %ec, label %exit, label %loop
exit:
ret void
}
define void @zext_v16i8_to_v16i32_in_loop_scalable_vectors(i8* %src, i32* %dst) { define void @zext_v16i8_to_v16i32_in_loop_scalable_vectors(i8* %src, i32* %dst) {
; CHECK-LABEL: zext_v16i8_to_v16i32_in_loop_scalable_vectors: ; CHECK-LABEL: zext_v16i8_to_v16i32_in_loop_scalable_vectors:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: mov x8, xzr ; CHECK-NEXT: mov x8, xzr
; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: ptrue p0.s
; CHECK-NEXT: LBB17_1: ; %loop ; CHECK-NEXT: LBB19_1: ; %loop
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
; CHECK-NEXT: add x9, x0, x8 ; CHECK-NEXT: add x9, x0, x8
; CHECK-NEXT: ld1b { z0.s }, p0/z, [x0, x8] ; CHECK-NEXT: ld1b { z0.s }, p0/z, [x0, x8]
; CHECK-NEXT: ld1b { z1.s }, p0/z, [x9, #2, mul vl] ; CHECK-NEXT: ld1b { z1.s }, p0/z, [x9, #2, mul vl]
; CHECK-NEXT: ld1b { z2.s }, p0/z, [x9, #3, mul vl] ; CHECK-NEXT: ld1b { z2.s }, p0/z, [x9, #3, mul vl]
; CHECK-NEXT: ld1b { z3.s }, p0/z, [x9, #1, mul vl] ; CHECK-NEXT: ld1b { z3.s }, p0/z, [x9, #1, mul vl]
; CHECK-NEXT: add z0.s, z0.s, z0.s ; CHECK-NEXT: add z0.s, z0.s, z0.s
; CHECK-NEXT: add x9, x1, x8, lsl #2 ; CHECK-NEXT: add x9, x1, x8, lsl #2
; CHECK-NEXT: st1w { z0.s }, p0, [x1, x8, lsl #2] ; CHECK-NEXT: st1w { z0.s }, p0, [x1, x8, lsl #2]
; CHECK-NEXT: add x8, x8, #16 ; CHECK-NEXT: add x8, x8, #16
; CHECK-NEXT: cmp x8, #128 ; CHECK-NEXT: cmp x8, #128
; CHECK-NEXT: add z1.s, z1.s, z1.s ; CHECK-NEXT: add z1.s, z1.s, z1.s
; CHECK-NEXT: add z0.s, z3.s, z3.s ; CHECK-NEXT: add z0.s, z3.s, z3.s
; CHECK-NEXT: add z2.s, z2.s, z2.s ; CHECK-NEXT: add z2.s, z2.s, z2.s
; CHECK-NEXT: st1w { z1.s }, p0, [x9, #2, mul vl] ; CHECK-NEXT: st1w { z1.s }, p0, [x9, #2, mul vl]
; CHECK-NEXT: st1w { z2.s }, p0, [x9, #3, mul vl] ; CHECK-NEXT: st1w { z2.s }, p0, [x9, #3, mul vl]
; CHECK-NEXT: st1w { z0.s }, p0, [x9, #1, mul vl] ; CHECK-NEXT: st1w { z0.s }, p0, [x9, #1, mul vl]
; CHECK-NEXT: b.ne LBB17_1 ; CHECK-NEXT: b.ne LBB19_1
; CHECK-NEXT: ; %bb.2: ; %exit ; CHECK-NEXT: ; %bb.2: ; %exit
; CHECK-NEXT: ret ; CHECK-NEXT: ret
; ;
; CHECK-BE-LABEL: zext_v16i8_to_v16i32_in_loop_scalable_vectors: ; CHECK-BE-LABEL: zext_v16i8_to_v16i32_in_loop_scalable_vectors:
; CHECK-BE: // %bb.0: // %entry ; CHECK-BE: // %bb.0: // %entry
; CHECK-BE-NEXT: mov x8, xzr ; CHECK-BE-NEXT: mov x8, xzr
; CHECK-BE-NEXT: ptrue p0.s ; CHECK-BE-NEXT: ptrue p0.s
; CHECK-BE-NEXT: .LBB17_1: // %loop ; CHECK-BE-NEXT: .LBB19_1: // %loop
; CHECK-BE-NEXT: // =>This Inner Loop Header: Depth=1 ; CHECK-BE-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-BE-NEXT: add x9, x0, x8 ; CHECK-BE-NEXT: add x9, x0, x8
; CHECK-BE-NEXT: ld1b { z0.s }, p0/z, [x0, x8] ; CHECK-BE-NEXT: ld1b { z0.s }, p0/z, [x0, x8]
; CHECK-BE-NEXT: ld1b { z1.s }, p0/z, [x9, #2, mul vl] ; CHECK-BE-NEXT: ld1b { z1.s }, p0/z, [x9, #2, mul vl]
; CHECK-BE-NEXT: ld1b { z2.s }, p0/z, [x9, #3, mul vl] ; CHECK-BE-NEXT: ld1b { z2.s }, p0/z, [x9, #3, mul vl]
; CHECK-BE-NEXT: ld1b { z3.s }, p0/z, [x9, #1, mul vl] ; CHECK-BE-NEXT: ld1b { z3.s }, p0/z, [x9, #1, mul vl]
; CHECK-BE-NEXT: add z0.s, z0.s, z0.s ; CHECK-BE-NEXT: add z0.s, z0.s, z0.s
; CHECK-BE-NEXT: add x9, x1, x8, lsl #2 ; CHECK-BE-NEXT: add x9, x1, x8, lsl #2
; CHECK-BE-NEXT: st1w { z0.s }, p0, [x1, x8, lsl #2] ; CHECK-BE-NEXT: st1w { z0.s }, p0, [x1, x8, lsl #2]
; CHECK-BE-NEXT: add x8, x8, #16 ; CHECK-BE-NEXT: add x8, x8, #16
; CHECK-BE-NEXT: cmp x8, #128 ; CHECK-BE-NEXT: cmp x8, #128
; CHECK-BE-NEXT: add z1.s, z1.s, z1.s ; CHECK-BE-NEXT: add z1.s, z1.s, z1.s
; CHECK-BE-NEXT: add z0.s, z3.s, z3.s ; CHECK-BE-NEXT: add z0.s, z3.s, z3.s
; CHECK-BE-NEXT: add z2.s, z2.s, z2.s ; CHECK-BE-NEXT: add z2.s, z2.s, z2.s
; CHECK-BE-NEXT: st1w { z1.s }, p0, [x9, #2, mul vl] ; CHECK-BE-NEXT: st1w { z1.s }, p0, [x9, #2, mul vl]
; CHECK-BE-NEXT: st1w { z2.s }, p0, [x9, #3, mul vl] ; CHECK-BE-NEXT: st1w { z2.s }, p0, [x9, #3, mul vl]
; CHECK-BE-NEXT: st1w { z0.s }, p0, [x9, #1, mul vl] ; CHECK-BE-NEXT: st1w { z0.s }, p0, [x9, #1, mul vl]
; CHECK-BE-NEXT: b.ne .LBB17_1 ; CHECK-BE-NEXT: b.ne .LBB19_1
; CHECK-BE-NEXT: // %bb.2: // %exit ; CHECK-BE-NEXT: // %bb.2: // %exit
; CHECK-BE-NEXT: ret ; CHECK-BE-NEXT: ret
entry: entry:
br label %loop br label %loop
loop: loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
%src.gep = getelementptr i8, i8* %src, i64 %iv %src.gep = getelementptr i8, i8* %src, i64 %iv
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