Page MenuHomePhabricator

[MIPS] Emulate microMIPS instructions
ClosedPublic

Authored by bhushan on Sep 30 2015, 3:00 AM.

Details

Summary

This patch includes:

  1. Emulation of prologue/epilogue and branch instructions for microMIPS.
  1. Setting up alternate disassembler (to be used for microMIPS).

So there will be two disassembler instances, one for microMIPS and other for MIPS.
Appropriate disassembler will be used based on the address class of instruction address.

  1. Some of the branch instructions does not have fixed sized delay slot, that means delay slot instruction can be of 2-byte or 4-byte.

For this "m_next_inst_size" has been introduced which stores the size of next instruction (i.e size of delay slot instruction in case of branch).
This can be used wherever the size of next instruction is required.

  1. A minor change to use mips32 register names instead of mips64 names.

Diff Detail

Repository
rL LLVM

Event Timeline

bhushan updated this revision to Diff 36077.Sep 30 2015, 3:00 AM
bhushan retitled this revision from to [MIPS] Emulate microMIPS instructions.
bhushan updated this object.
bhushan added reviewers: clayborg, tberghammer.
bhushan set the repository for this revision to rL LLVM.
tberghammer accepted this revision.Sep 30 2015, 8:22 AM
tberghammer edited edge metadata.

LGTM

source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
683

(nit): "if (m_use_alt_disaasm)"

775

(nit): "if (m_use_alt_disaasm)"

848–849

You don't need this if you use SetReturnAddressRegister

This revision is now accepted and ready to land.Sep 30 2015, 8:22 AM
clayborg accepted this revision.Oct 5 2015, 12:54 PM
clayborg edited edge metadata.

Back from vacation, sorry for the delay. Looks good.

bhushan closed this revision.Dec 23 2015, 9:02 PM

This was committed on 6th Oct 15 by http://reviews.llvm.org/rL249381 ,closing it now.