[LLDB] Missing break in a switch statement alters the execution flow.

[fixathon]

Summary

Looks like a typo from the past code changes.

Differential Revision: https://reviews.llvm.org/D131244

lldb/source/Plugins/Process/Utility/ARMUtils.h

 static inline uint32_t Align(uint32_t val, uint32_t alignment) {
   return alignment * (val / alignment);
 }
 
 static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5,
                                       ARM_ShifterType &shift_t) {
   switch (type) {
   default:
-  // assert(0 && "Invalid shift type");
+    assert(0 && "Invalid shift type");
+    break;
   case 0:
     shift_t = SRType_LSL;
     return imm5;
   case 1:
     shift_t = SRType_LSR;
     return (imm5 == 0 ? 32 : imm5);
   case 2:
     shift_t = SRType_ASR;
static inline uint32_t ARMExpandImm(uint32_t opcode) {
   uint32_t carry_in = 0;
   uint32_t carry_out;
   return ARMExpandImm_C(opcode, carry_in, carry_out);
 }
 
 // (imm32, carry_out) = ThumbExpandImm_C(imm12, carry_in)
 static inline uint32_t ThumbExpandImm_C(uint32_t opcode, uint32_t carry_in,
                                         uint32_t &carry_out) {
-  uint32_t imm32; // the expanded result
+  uint32_t imm32 = 0; // the expanded result
   const uint32_t i = bit(opcode, 26);
   const uint32_t imm3 = bits(opcode, 14, 12);
   const uint32_t abcdefgh = bits(opcode, 7, 0);
   const uint32_t imm12 = i << 11 | imm3 << 8 | abcdefgh;
 
   if (bits(imm12, 11, 10) == 0) {
     switch (bits(imm12, 9, 8)) {
     default: // Keep static analyzer happy with a default case
+      break;
+
     case 0:
       imm32 = abcdefgh;
       break;
 
     case 1:
       imm32 = abcdefgh << 16 | abcdefgh;
       break;