This is an archive of the discontinued LLVM Phabricator instance.

Differential D13106

AMDGPU: Remove dead code
ClosedPublic

Authored by arsenm on Sep 23 2015, 10:11 AM.

Download Raw Diff

Details

Reviewers

• tstellarAMD

Summary

There's no point in checking VReg_1 because all uses
of it should already have been removed by SILowerI1Copies.

Diff Detail

Event Timeline

arsenm updated this revision to Diff 35522.Sep 23 2015, 10:11 AM

arsenm retitled this revision from to AMDGPU: Remove dead code.

arsenm updated this object.

arsenm added a reviewer: • tstellarAMD.

arsenm added a subscriber: llvm-commits.

Herald added a subscriber: arsenm. · View Herald TranscriptSep 23 2015, 10:11 AM

LGTM.

This revision is now accepted and ready to land.Oct 1 2015, 1:39 PM

r249081

Revision Contents

Path

Size

lib/

Target/

AMDGPU/

SIFixSGPRCopies.cpp

11 lines

Diff 35522

lib/Target/AMDGPU/SIFixSGPRCopies.cpp

Show First 20 Lines • Show All 187 Lines • ▼ Show 20 Lines	bool SIFixSGPRCopies::isVGPRToSGPRCopy(const MachineInstr &Copy,
unsigned SrcSubReg = Copy.getOperand(1).getSubReg();		unsigned SrcSubReg = Copy.getOperand(1).getSubReg();

if (!TargetRegisterInfo::isVirtualRegister(DstReg)) {		if (!TargetRegisterInfo::isVirtualRegister(DstReg)) {
// If the destination register is a physical register there isn't really		// If the destination register is a physical register there isn't really
// much we can do to fix this.		// much we can do to fix this.
return false;		return false;
}		}

const TargetRegisterClass *DstRC = MRI.getRegClass(DstReg);		if (!TargetRegisterInfo::isVirtualRegister(SrcReg))

const TargetRegisterClass *SrcRC;

if (!TargetRegisterInfo::isVirtualRegister(SrcReg) \|\|
MRI.getRegClass(SrcReg) == &AMDGPU::VReg_1RegClass)
return false;		return false;

SrcRC = TRI->getSubRegClass(MRI.getRegClass(SrcReg), SrcSubReg);		const TargetRegisterClass *DstRC = MRI.getRegClass(DstReg);
		const TargetRegisterClass *SrcRC
		= TRI->getSubRegClass(MRI.getRegClass(SrcReg), SrcSubReg);
return TRI->isSGPRClass(DstRC) && TRI->hasVGPRs(SrcRC);		return TRI->isSGPRClass(DstRC) && TRI->hasVGPRs(SrcRC);
}		}

bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {		bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
MachineRegisterInfo &MRI = MF.getRegInfo();		MachineRegisterInfo &MRI = MF.getRegInfo();
const SIRegisterInfo *TRI =		const SIRegisterInfo *TRI =
static_cast<const SIRegisterInfo *>(MF.getSubtarget().getRegisterInfo());		static_cast<const SIRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
const SIInstrInfo *TII =		const SIInstrInfo *TII =
▲ Show 20 Lines • Show All 133 Lines • Show Last 20 Lines